diff options
author | Tomoya <tomoya-linux@dsn.okisemi.com> | 2010-12-12 15:24:14 -0500 |
---|---|---|
committer | David S. Miller <davem@davemloft.net> | 2010-12-13 15:24:22 -0500 |
commit | 44c9aa890a2587f48920485b7487bc6d516dbbdf (patch) | |
tree | d16610c30db26a900f01c384ecba48712d166a12 /drivers/net/can/pch_can.c | |
parent | ca2b004e89484e89b1815157fae2d7f933c5af9e (diff) |
pch_can: Reduce register access
For improve tx/rx speed, reduce register access.
Signed-off-by: Tomoya MORINAGA <tomoya-linux@dsn.okisemi.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers/net/can/pch_can.c')
-rw-r--r-- | drivers/net/can/pch_can.c | 55 |
1 files changed, 21 insertions, 34 deletions
diff --git a/drivers/net/can/pch_can.c b/drivers/net/can/pch_can.c index c6c0842aeb75..0acc87755b24 100644 --- a/drivers/net/can/pch_can.c +++ b/drivers/net/can/pch_can.c | |||
@@ -372,9 +372,6 @@ static void pch_can_config_rx_tx_buffers(struct pch_can_priv *priv) | |||
372 | pch_can_bit_set(&priv->regs->ifregs[0].mcont, | 372 | pch_can_bit_set(&priv->regs->ifregs[0].mcont, |
373 | PCH_IF_MCONT_UMASK); | 373 | PCH_IF_MCONT_UMASK); |
374 | 374 | ||
375 | /* Set FIFO mode set to 0 except last Rx Obj*/ | ||
376 | pch_can_bit_clear(&priv->regs->ifregs[0].mcont, | ||
377 | PCH_IF_MCONT_EOB); | ||
378 | /* In case FIFO mode, Last EoB of Rx Obj must be 1 */ | 375 | /* In case FIFO mode, Last EoB of Rx Obj must be 1 */ |
379 | if (i == PCH_RX_OBJ_END) | 376 | if (i == PCH_RX_OBJ_END) |
380 | pch_can_bit_set(&priv->regs->ifregs[0].mcont, | 377 | pch_can_bit_set(&priv->regs->ifregs[0].mcont, |
@@ -402,14 +399,11 @@ static void pch_can_config_rx_tx_buffers(struct pch_can_priv *priv) | |||
402 | 399 | ||
403 | /* Resetting DIR bit for reception */ | 400 | /* Resetting DIR bit for reception */ |
404 | iowrite32(0x0, &priv->regs->ifregs[1].id1); | 401 | iowrite32(0x0, &priv->regs->ifregs[1].id1); |
405 | iowrite32(0x0, &priv->regs->ifregs[1].id2); | 402 | iowrite32(PCH_ID2_DIR, &priv->regs->ifregs[1].id2); |
406 | pch_can_bit_set(&priv->regs->ifregs[1].id2, PCH_ID2_DIR); | ||
407 | 403 | ||
408 | /* Setting EOB bit for transmitter */ | 404 | /* Setting EOB bit for transmitter */ |
409 | iowrite32(PCH_IF_MCONT_EOB, &priv->regs->ifregs[1].mcont); | 405 | iowrite32(PCH_IF_MCONT_EOB | PCH_IF_MCONT_UMASK, |
410 | 406 | &priv->regs->ifregs[1].mcont); | |
411 | pch_can_bit_set(&priv->regs->ifregs[1].mcont, | ||
412 | PCH_IF_MCONT_UMASK); | ||
413 | 407 | ||
414 | iowrite32(0, &priv->regs->ifregs[1].mask1); | 408 | iowrite32(0, &priv->regs->ifregs[1].mask1); |
415 | pch_can_bit_clear(&priv->regs->ifregs[1].mask2, 0x1fff); | 409 | pch_can_bit_clear(&priv->regs->ifregs[1].mask2, 0x1fff); |
@@ -524,12 +518,12 @@ static void pch_can_error(struct net_device *ndev, u32 status) | |||
524 | dev_err(&ndev->dev, "%s -> Bus Off occurres.\n", __func__); | 518 | dev_err(&ndev->dev, "%s -> Bus Off occurres.\n", __func__); |
525 | } | 519 | } |
526 | 520 | ||
521 | errc = ioread32(&priv->regs->errc); | ||
527 | /* Warning interrupt. */ | 522 | /* Warning interrupt. */ |
528 | if (status & PCH_EWARN) { | 523 | if (status & PCH_EWARN) { |
529 | state = CAN_STATE_ERROR_WARNING; | 524 | state = CAN_STATE_ERROR_WARNING; |
530 | priv->can.can_stats.error_warning++; | 525 | priv->can.can_stats.error_warning++; |
531 | cf->can_id |= CAN_ERR_CRTL; | 526 | cf->can_id |= CAN_ERR_CRTL; |
532 | errc = ioread32(&priv->regs->errc); | ||
533 | if (((errc & PCH_REC) >> 8) > 96) | 527 | if (((errc & PCH_REC) >> 8) > 96) |
534 | cf->data[1] |= CAN_ERR_CRTL_RX_WARNING; | 528 | cf->data[1] |= CAN_ERR_CRTL_RX_WARNING; |
535 | if ((errc & PCH_TEC) > 96) | 529 | if ((errc & PCH_TEC) > 96) |
@@ -542,7 +536,6 @@ static void pch_can_error(struct net_device *ndev, u32 status) | |||
542 | priv->can.can_stats.error_passive++; | 536 | priv->can.can_stats.error_passive++; |
543 | state = CAN_STATE_ERROR_PASSIVE; | 537 | state = CAN_STATE_ERROR_PASSIVE; |
544 | cf->can_id |= CAN_ERR_CRTL; | 538 | cf->can_id |= CAN_ERR_CRTL; |
545 | errc = ioread32(&priv->regs->errc); | ||
546 | if (((errc & PCH_REC) >> 8) > 127) | 539 | if (((errc & PCH_REC) >> 8) > 127) |
547 | cf->data[1] |= CAN_ERR_CRTL_RX_PASSIVE; | 540 | cf->data[1] |= CAN_ERR_CRTL_RX_PASSIVE; |
548 | if ((errc & PCH_TEC) > 127) | 541 | if ((errc & PCH_TEC) > 127) |
@@ -927,6 +920,7 @@ static netdev_tx_t pch_xmit(struct sk_buff *skb, struct net_device *ndev) | |||
927 | struct can_frame *cf = (struct can_frame *)skb->data; | 920 | struct can_frame *cf = (struct can_frame *)skb->data; |
928 | int tx_obj_no; | 921 | int tx_obj_no; |
929 | int i; | 922 | int i; |
923 | u32 id2; | ||
930 | 924 | ||
931 | if (can_dropped_invalid_skb(ndev, skb)) | 925 | if (can_dropped_invalid_skb(ndev, skb)) |
932 | return NETDEV_TX_OK; | 926 | return NETDEV_TX_OK; |
@@ -950,22 +944,23 @@ static netdev_tx_t pch_xmit(struct sk_buff *skb, struct net_device *ndev) | |||
950 | pch_can_bit_set(&priv->regs->ifregs[1].cmask, PCH_CMASK_ALL); | 944 | pch_can_bit_set(&priv->regs->ifregs[1].cmask, PCH_CMASK_ALL); |
951 | 945 | ||
952 | /* If ID extended is set. */ | 946 | /* If ID extended is set. */ |
953 | pch_can_bit_clear(&priv->regs->ifregs[1].id1, 0xffff); | ||
954 | pch_can_bit_clear(&priv->regs->ifregs[1].id2, 0x1fff | PCH_ID2_XTD); | ||
955 | if (cf->can_id & CAN_EFF_FLAG) { | 947 | if (cf->can_id & CAN_EFF_FLAG) { |
956 | pch_can_bit_set(&priv->regs->ifregs[1].id1, | 948 | iowrite32(cf->can_id & 0xffff, &priv->regs->ifregs[1].id1); |
957 | cf->can_id & 0xffff); | 949 | id2 = ((cf->can_id >> 16) & 0x1fff) | PCH_ID2_XTD; |
958 | pch_can_bit_set(&priv->regs->ifregs[1].id2, | ||
959 | ((cf->can_id >> 16) & 0x1fff) | PCH_ID2_XTD); | ||
960 | } else { | 950 | } else { |
961 | pch_can_bit_set(&priv->regs->ifregs[1].id1, 0); | 951 | iowrite32(0, &priv->regs->ifregs[1].id1); |
962 | pch_can_bit_set(&priv->regs->ifregs[1].id2, | 952 | id2 = (cf->can_id & CAN_SFF_MASK) << 2; |
963 | (cf->can_id & CAN_SFF_MASK) << 2); | ||
964 | } | 953 | } |
965 | 954 | ||
955 | id2 |= PCH_ID_MSGVAL; | ||
956 | |||
966 | /* If remote frame has to be transmitted.. */ | 957 | /* If remote frame has to be transmitted.. */ |
967 | if (cf->can_id & CAN_RTR_FLAG) | 958 | if (cf->can_id & CAN_RTR_FLAG) |
968 | pch_can_bit_clear(&priv->regs->ifregs[1].id2, PCH_ID2_DIR); | 959 | id2 &= ~PCH_ID2_DIR; |
960 | else | ||
961 | id2 |= PCH_ID2_DIR; | ||
962 | |||
963 | iowrite32(id2, &priv->regs->ifregs[1].id2); | ||
969 | 964 | ||
970 | /* Copy data to register */ | 965 | /* Copy data to register */ |
971 | for (i = 0; i < cf->can_dlc; i += 2) { | 966 | for (i = 0; i < cf->can_dlc; i += 2) { |
@@ -976,17 +971,8 @@ static netdev_tx_t pch_xmit(struct sk_buff *skb, struct net_device *ndev) | |||
976 | can_put_echo_skb(skb, ndev, tx_obj_no - PCH_RX_OBJ_END - 1); | 971 | can_put_echo_skb(skb, ndev, tx_obj_no - PCH_RX_OBJ_END - 1); |
977 | 972 | ||
978 | /* Updating the size of the data. */ | 973 | /* Updating the size of the data. */ |
979 | pch_can_bit_clear(&priv->regs->ifregs[1].mcont, 0x0f); | 974 | iowrite32(cf->can_dlc | PCH_IF_MCONT_NEWDAT | PCH_IF_MCONT_TXRQXT | |
980 | pch_can_bit_set(&priv->regs->ifregs[1].mcont, cf->can_dlc); | 975 | PCH_IF_MCONT_TXIE, &priv->regs->ifregs[1].mcont); |
981 | |||
982 | /* Clearing IntPend, NewDat & TxRqst */ | ||
983 | pch_can_bit_clear(&priv->regs->ifregs[1].mcont, | ||
984 | PCH_IF_MCONT_NEWDAT | PCH_IF_MCONT_INTPND | | ||
985 | PCH_IF_MCONT_TXRQXT); | ||
986 | |||
987 | /* Setting NewDat, TxRqst bits */ | ||
988 | pch_can_bit_set(&priv->regs->ifregs[1].mcont, | ||
989 | PCH_IF_MCONT_NEWDAT | PCH_IF_MCONT_TXRQXT); | ||
990 | 976 | ||
991 | pch_can_rw_msg_obj(&priv->regs->ifregs[1].creq, tx_obj_no); | 977 | pch_can_rw_msg_obj(&priv->regs->ifregs[1].creq, tx_obj_no); |
992 | 978 | ||
@@ -1211,9 +1197,10 @@ static int pch_can_get_berr_counter(const struct net_device *dev, | |||
1211 | struct can_berr_counter *bec) | 1197 | struct can_berr_counter *bec) |
1212 | { | 1198 | { |
1213 | struct pch_can_priv *priv = netdev_priv(dev); | 1199 | struct pch_can_priv *priv = netdev_priv(dev); |
1200 | u32 errc = ioread32(&priv->regs->errc); | ||
1214 | 1201 | ||
1215 | bec->txerr = ioread32(&priv->regs->errc) & PCH_TEC; | 1202 | bec->txerr = errc & PCH_TEC; |
1216 | bec->rxerr = (ioread32(&priv->regs->errc) & PCH_REC) >> 8; | 1203 | bec->rxerr = (errc & PCH_REC) >> 8; |
1217 | 1204 | ||
1218 | return 0; | 1205 | return 0; |
1219 | } | 1206 | } |