diff options
author | Tomoya <tomoya-linux@dsn.okisemi.com> | 2010-11-29 13:16:15 -0500 |
---|---|---|
committer | David S. Miller <davem@davemloft.net> | 2010-12-02 16:04:51 -0500 |
commit | d68f6837c4972b0433e41f8bee4b2b8205610f31 (patch) | |
tree | 9f6e646cfb07fb85f2432c375db22cff0c96a296 /drivers/net/can/pch_can.c | |
parent | 15ffc8fddf72712cc45d51c64bd500760ec63c80 (diff) |
can: EG20T PCH: Enumerate LEC macros
For easy to readable, LEC #define macros are replaced to enums.
Signed-off-by: Tomoya MORINAGA <tomoya-linux@dsn.okisemi.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers/net/can/pch_can.c')
-rw-r--r-- | drivers/net/can/pch_can.c | 77 |
1 files changed, 41 insertions, 36 deletions
diff --git a/drivers/net/can/pch_can.c b/drivers/net/can/pch_can.c index 982ff2d757a8..2d4ab0fc9184 100644 --- a/drivers/net/can/pch_can.c +++ b/drivers/net/can/pch_can.c | |||
@@ -71,21 +71,12 @@ | |||
71 | #define PCH_REC 0x00007f00 | 71 | #define PCH_REC 0x00007f00 |
72 | #define PCH_TEC 0x000000ff | 72 | #define PCH_TEC 0x000000ff |
73 | 73 | ||
74 | |||
74 | #define PCH_TX_OK BIT(3) | 75 | #define PCH_TX_OK BIT(3) |
75 | #define PCH_RX_OK BIT(4) | 76 | #define PCH_RX_OK BIT(4) |
76 | #define PCH_EPASSIV BIT(5) | 77 | #define PCH_EPASSIV BIT(5) |
77 | #define PCH_EWARN BIT(6) | 78 | #define PCH_EWARN BIT(6) |
78 | #define PCH_BUS_OFF BIT(7) | 79 | #define PCH_BUS_OFF BIT(7) |
79 | #define PCH_LEC0 BIT(0) | ||
80 | #define PCH_LEC1 BIT(1) | ||
81 | #define PCH_LEC2 BIT(2) | ||
82 | #define PCH_LEC_ALL (PCH_LEC0 | PCH_LEC1 | PCH_LEC2) | ||
83 | #define PCH_STUF_ERR PCH_LEC0 | ||
84 | #define PCH_FORM_ERR PCH_LEC1 | ||
85 | #define PCH_ACK_ERR (PCH_LEC0 | PCH_LEC1) | ||
86 | #define PCH_BIT1_ERR PCH_LEC2 | ||
87 | #define PCH_BIT0_ERR (PCH_LEC0 | PCH_LEC2) | ||
88 | #define PCH_CRC_ERR (PCH_LEC1 | PCH_LEC2) | ||
89 | 80 | ||
90 | /* bit position of certain controller bits. */ | 81 | /* bit position of certain controller bits. */ |
91 | #define PCH_BIT_BRP 0 | 82 | #define PCH_BIT_BRP 0 |
@@ -117,6 +108,16 @@ enum pch_ifreg { | |||
117 | PCH_TX_IFREG, | 108 | PCH_TX_IFREG, |
118 | }; | 109 | }; |
119 | 110 | ||
111 | enum pch_can_err { | ||
112 | PCH_STUF_ERR = 1, | ||
113 | PCH_FORM_ERR, | ||
114 | PCH_ACK_ERR, | ||
115 | PCH_BIT1_ERR, | ||
116 | PCH_BIT0_ERR, | ||
117 | PCH_CRC_ERR, | ||
118 | PCH_LEC_ALL, | ||
119 | }; | ||
120 | |||
120 | enum pch_can_mode { | 121 | enum pch_can_mode { |
121 | PCH_CAN_ENABLE, | 122 | PCH_CAN_ENABLE, |
122 | PCH_CAN_DISABLE, | 123 | PCH_CAN_DISABLE, |
@@ -620,7 +621,7 @@ static void pch_can_error(struct net_device *ndev, u32 status) | |||
620 | struct sk_buff *skb; | 621 | struct sk_buff *skb; |
621 | struct pch_can_priv *priv = netdev_priv(ndev); | 622 | struct pch_can_priv *priv = netdev_priv(ndev); |
622 | struct can_frame *cf; | 623 | struct can_frame *cf; |
623 | u32 errc; | 624 | u32 errc, lec; |
624 | struct net_device_stats *stats = &(priv->ndev->stats); | 625 | struct net_device_stats *stats = &(priv->ndev->stats); |
625 | enum can_state state = priv->can.state; | 626 | enum can_state state = priv->can.state; |
626 | 627 | ||
@@ -665,33 +666,37 @@ static void pch_can_error(struct net_device *ndev, u32 status) | |||
665 | "%s -> CAN controller is ERROR PASSIVE .\n", __func__); | 666 | "%s -> CAN controller is ERROR PASSIVE .\n", __func__); |
666 | } | 667 | } |
667 | 668 | ||
668 | if (status & PCH_LEC_ALL) { | 669 | lec = status & PCH_LEC_ALL; |
670 | switch (lec) { | ||
671 | case PCH_STUF_ERR: | ||
672 | cf->data[2] |= CAN_ERR_PROT_STUFF; | ||
669 | priv->can.can_stats.bus_error++; | 673 | priv->can.can_stats.bus_error++; |
670 | stats->rx_errors++; | 674 | stats->rx_errors++; |
671 | switch (status & PCH_LEC_ALL) { | 675 | break; |
672 | case PCH_STUF_ERR: | 676 | case PCH_FORM_ERR: |
673 | cf->data[2] |= CAN_ERR_PROT_STUFF; | 677 | cf->data[2] |= CAN_ERR_PROT_FORM; |
674 | break; | 678 | priv->can.can_stats.bus_error++; |
675 | case PCH_FORM_ERR: | 679 | stats->rx_errors++; |
676 | cf->data[2] |= CAN_ERR_PROT_FORM; | 680 | break; |
677 | break; | 681 | case PCH_ACK_ERR: |
678 | case PCH_ACK_ERR: | 682 | cf->can_id |= CAN_ERR_ACK; |
679 | cf->data[2] |= CAN_ERR_PROT_LOC_ACK | | 683 | priv->can.can_stats.bus_error++; |
680 | CAN_ERR_PROT_LOC_ACK_DEL; | 684 | stats->rx_errors++; |
681 | break; | 685 | break; |
682 | case PCH_BIT1_ERR: | 686 | case PCH_BIT1_ERR: |
683 | case PCH_BIT0_ERR: | 687 | case PCH_BIT0_ERR: |
684 | cf->data[2] |= CAN_ERR_PROT_BIT; | 688 | cf->data[2] |= CAN_ERR_PROT_BIT; |
685 | break; | 689 | priv->can.can_stats.bus_error++; |
686 | case PCH_CRC_ERR: | 690 | stats->rx_errors++; |
687 | cf->data[2] |= CAN_ERR_PROT_LOC_CRC_SEQ | | 691 | break; |
688 | CAN_ERR_PROT_LOC_CRC_DEL; | 692 | case PCH_CRC_ERR: |
689 | break; | 693 | cf->data[2] |= CAN_ERR_PROT_LOC_CRC_SEQ | |
690 | default: | 694 | CAN_ERR_PROT_LOC_CRC_DEL; |
691 | iowrite32(status | PCH_LEC_ALL, &priv->regs->stat); | 695 | priv->can.can_stats.bus_error++; |
692 | break; | 696 | stats->rx_errors++; |
693 | } | 697 | break; |
694 | 698 | case PCH_LEC_ALL: /* Written by CPU. No error status */ | |
699 | break; | ||
695 | } | 700 | } |
696 | 701 | ||
697 | priv->can.state = state; | 702 | priv->can.state = state; |