diff options
author | David Jander <david@protonic.nl> | 2014-09-03 10:47:22 -0400 |
---|---|---|
committer | Marc Kleine-Budde <mkl@pengutronix.de> | 2014-09-18 05:15:20 -0400 |
commit | 25e924450fcb23c11c07c95ea8964dd9f174652e (patch) | |
tree | e70b938081ffc7ae87981724ee01816aa7117d48 /drivers/net/can/flexcan.c | |
parent | fc05b884a31dbf259cc73cc856e634ec3acbebb6 (diff) |
can: flexcan: implement workaround for errata ERR005829
This patch implements the workaround mentioned in ERR005829:
ERR005829: FlexCAN: FlexCAN does not transmit a message that is enabled to
be transmitted in a specific moment during the arbitration process.
Workaround: The workaround consists of two extra steps after setting up a
message for transmission:
Step 8: Reserve the first valid mailbox as an inactive mailbox (CODE=0b1000).
If RX FIFO is disabled, this mailbox must be message buffer 0. Otherwise, the
first valid mailbox can be found using the "RX FIFO filters" table in the
FlexCAN chapter of the chip reference manual.
Step 9: Write twice INACTIVE code (0b1000) into the first valid mailbox.
Signed-off-by: David Jander <david@protonic.nl>
Cc: linux-stable <stable@vger.kernel.org>
Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
Diffstat (limited to 'drivers/net/can/flexcan.c')
-rw-r--r-- | drivers/net/can/flexcan.c | 16 |
1 files changed, 15 insertions, 1 deletions
diff --git a/drivers/net/can/flexcan.c b/drivers/net/can/flexcan.c index fc0769527e6b..54061c4bbf32 100644 --- a/drivers/net/can/flexcan.c +++ b/drivers/net/can/flexcan.c | |||
@@ -125,7 +125,9 @@ | |||
125 | FLEXCAN_ESR_BOFF_INT | FLEXCAN_ESR_ERR_INT) | 125 | FLEXCAN_ESR_BOFF_INT | FLEXCAN_ESR_ERR_INT) |
126 | 126 | ||
127 | /* FLEXCAN interrupt flag register (IFLAG) bits */ | 127 | /* FLEXCAN interrupt flag register (IFLAG) bits */ |
128 | #define FLEXCAN_TX_BUF_ID 8 | 128 | /* Errata ERR005829 step7: Reserve first valid MB */ |
129 | #define FLEXCAN_TX_BUF_RESERVED 8 | ||
130 | #define FLEXCAN_TX_BUF_ID 9 | ||
129 | #define FLEXCAN_IFLAG_BUF(x) BIT(x) | 131 | #define FLEXCAN_IFLAG_BUF(x) BIT(x) |
130 | #define FLEXCAN_IFLAG_RX_FIFO_OVERFLOW BIT(7) | 132 | #define FLEXCAN_IFLAG_RX_FIFO_OVERFLOW BIT(7) |
131 | #define FLEXCAN_IFLAG_RX_FIFO_WARN BIT(6) | 133 | #define FLEXCAN_IFLAG_RX_FIFO_WARN BIT(6) |
@@ -439,6 +441,14 @@ static int flexcan_start_xmit(struct sk_buff *skb, struct net_device *dev) | |||
439 | flexcan_write(can_id, ®s->cantxfg[FLEXCAN_TX_BUF_ID].can_id); | 441 | flexcan_write(can_id, ®s->cantxfg[FLEXCAN_TX_BUF_ID].can_id); |
440 | flexcan_write(ctrl, ®s->cantxfg[FLEXCAN_TX_BUF_ID].can_ctrl); | 442 | flexcan_write(ctrl, ®s->cantxfg[FLEXCAN_TX_BUF_ID].can_ctrl); |
441 | 443 | ||
444 | /* Errata ERR005829 step8: | ||
445 | * Write twice INACTIVE(0x8) code to first MB. | ||
446 | */ | ||
447 | flexcan_write(FLEXCAN_MB_CODE_TX_INACTIVE, | ||
448 | ®s->cantxfg[FLEXCAN_TX_BUF_RESERVED].can_ctrl); | ||
449 | flexcan_write(FLEXCAN_MB_CODE_TX_INACTIVE, | ||
450 | ®s->cantxfg[FLEXCAN_TX_BUF_RESERVED].can_ctrl); | ||
451 | |||
442 | return NETDEV_TX_OK; | 452 | return NETDEV_TX_OK; |
443 | } | 453 | } |
444 | 454 | ||
@@ -885,6 +895,10 @@ static int flexcan_chip_start(struct net_device *dev) | |||
885 | ®s->cantxfg[i].can_ctrl); | 895 | ®s->cantxfg[i].can_ctrl); |
886 | } | 896 | } |
887 | 897 | ||
898 | /* Errata ERR005829: mark first TX mailbox as INACTIVE */ | ||
899 | flexcan_write(FLEXCAN_MB_CODE_TX_INACTIVE, | ||
900 | ®s->cantxfg[FLEXCAN_TX_BUF_RESERVED].can_ctrl); | ||
901 | |||
888 | /* mark TX mailbox as INACTIVE */ | 902 | /* mark TX mailbox as INACTIVE */ |
889 | flexcan_write(FLEXCAN_MB_CODE_TX_INACTIVE, | 903 | flexcan_write(FLEXCAN_MB_CODE_TX_INACTIVE, |
890 | ®s->cantxfg[FLEXCAN_TX_BUF_ID].can_ctrl); | 904 | ®s->cantxfg[FLEXCAN_TX_BUF_ID].can_ctrl); |