bnx2x: Link order with external PHY

Link order with external PHY
When external PHY exists (second chip with the PHY to translate to
another physical medium) the link with the eternal PHY and the network
should be established before setting the link between the 5771x and the
PHY. This is the right order and it is important when using autoneg -
the link to the network should use the autoneg and the link between the
two chips should be forced to the network result.

Signed-off-by: Yaniv Rosner <yanivr@broadcom.com>
Signed-off-by: Eilon Greenstein <eilong@broadcom.com>
Signed-off-by: David S. Miller <davem@davemloft.net>

1 files changed, 2 insertions, 0 deletions

diff --git a/drivers/net/bnx2x_reg.h b/drivers/net/bnx2x_reg.h
index a85ff2073681..58fbeb1cf78d 100644
--- a/drivers/net/bnx2x_reg.h
+++ b/drivers/net/bnx2x_reg.h
@@ -5559,6 +5559,8 @@ Theotherbitsarereservedandshouldbezero*/
 #define MDIO_PMA_REG_GEN_CTRL           0xca10
 #define MDIO_PMA_REG_GEN_CTRL_ROM_RESET_INTERNAL_MP     0x0188
 #define MDIO_PMA_REG_GEN_CTRL_ROM_MICRO_RESET           0x018a
+#define MDIO_PMA_REG_M8051_MSGIN_REG    0xca12
+#define MDIO_PMA_REG_M8051_MSGOUT_REG   0xca13
 #define MDIO_PMA_REG_ROM_VER1           0xca19
 #define MDIO_PMA_REG_ROM_VER2           0xca1a
 #define MDIO_PMA_REG_EDC_FFE_MAIN       0xca1b