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authorEilon Greenstein <eilong@broadcom.com>2009-08-12 04:24:14 -0400
committerDavid S. Miller <davem@davemloft.net>2009-08-13 02:02:59 -0400
commit573f203574581faaf80ca4fc079d33452327fc3b (patch)
tree1bd1cce6b130dc6a30fced46665d3a112a168bfb /drivers/net/bnx2x_reg.h
parente4ed7113372a04df9b7aa985ce3860207dbb1141 (diff)
bnx2x: Re-factor the initialization code
Moving the code to a more logical place and beautifying it. No real change in behavior. Signed-off-by: Vladislav Zolotarov <vladz@broadcom.com> Signed-off-by: Eilon Greenstein <eilong@broadcom.com> Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers/net/bnx2x_reg.h')
-rw-r--r--drivers/net/bnx2x_reg.h113
1 files changed, 113 insertions, 0 deletions
diff --git a/drivers/net/bnx2x_reg.h b/drivers/net/bnx2x_reg.h
index 999838629be3..1e6f5aa4eb5a 100644
--- a/drivers/net/bnx2x_reg.h
+++ b/drivers/net/bnx2x_reg.h
@@ -6019,3 +6019,116 @@ Theotherbitsarereservedandshouldbezero*/
6019#define COMMAND_REG_SIMD_NOMASK 0x1c 6019#define COMMAND_REG_SIMD_NOMASK 0x1c
6020 6020
6021 6021
6022#define IGU_MEM_BASE 0x0000
6023
6024#define IGU_MEM_MSIX_BASE 0x0000
6025#define IGU_MEM_MSIX_UPPER 0x007f
6026#define IGU_MEM_MSIX_RESERVED_UPPER 0x01ff
6027
6028#define IGU_MEM_PBA_MSIX_BASE 0x0200
6029#define IGU_MEM_PBA_MSIX_UPPER 0x0200
6030
6031#define IGU_CMD_BACKWARD_COMP_PROD_UPD 0x0201
6032#define IGU_MEM_PBA_MSIX_RESERVED_UPPER 0x03ff
6033
6034#define IGU_CMD_INT_ACK_BASE 0x0400
6035#define IGU_CMD_INT_ACK_UPPER\
6036 (IGU_CMD_INT_ACK_BASE + MAX_SB_PER_PORT * NUM_OF_PORTS_PER_PATH - 1)
6037#define IGU_CMD_INT_ACK_RESERVED_UPPER 0x04ff
6038
6039#define IGU_CMD_E2_PROD_UPD_BASE 0x0500
6040#define IGU_CMD_E2_PROD_UPD_UPPER\
6041 (IGU_CMD_E2_PROD_UPD_BASE + MAX_SB_PER_PORT * NUM_OF_PORTS_PER_PATH - 1)
6042#define IGU_CMD_E2_PROD_UPD_RESERVED_UPPER 0x059f
6043
6044#define IGU_CMD_ATTN_BIT_UPD_UPPER 0x05a0
6045#define IGU_CMD_ATTN_BIT_SET_UPPER 0x05a1
6046#define IGU_CMD_ATTN_BIT_CLR_UPPER 0x05a2
6047
6048#define IGU_REG_SISR_MDPC_WMASK_UPPER 0x05a3
6049#define IGU_REG_SISR_MDPC_WMASK_LSB_UPPER 0x05a4
6050#define IGU_REG_SISR_MDPC_WMASK_MSB_UPPER 0x05a5
6051#define IGU_REG_SISR_MDPC_WOMASK_UPPER 0x05a6
6052
6053#define IGU_REG_RESERVED_UPPER 0x05ff
6054
6055
6056#define CDU_REGION_NUMBER_XCM_AG 2
6057#define CDU_REGION_NUMBER_UCM_AG 4
6058
6059
6060/**
6061 * String-to-compress [31:8] = CID (all 24 bits)
6062 * String-to-compress [7:4] = Region
6063 * String-to-compress [3:0] = Type
6064 */
6065#define CDU_VALID_DATA(_cid, _region, _type)\
6066 (((_cid) << 8) | (((_region)&0xf)<<4) | (((_type)&0xf)))
6067#define CDU_CRC8(_cid, _region, _type)\
6068 (calc_crc8(CDU_VALID_DATA(_cid, _region, _type), 0xff))
6069#define CDU_RSRVD_VALUE_TYPE_A(_cid, _region, _type)\
6070 (0x80 | ((CDU_CRC8(_cid, _region, _type)) & 0x7f))
6071#define CDU_RSRVD_VALUE_TYPE_B(_crc, _type)\
6072 (0x80 | ((_type)&0xf << 3) | ((CDU_CRC8(_cid, _region, _type)) & 0x7))
6073#define CDU_RSRVD_INVALIDATE_CONTEXT_VALUE(_val) ((_val) & ~0x80)
6074
6075/******************************************************************************
6076 * Description:
6077 * Calculates crc 8 on a word value: polynomial 0-1-2-8
6078 * Code was translated from Verilog.
6079 * Return:
6080 *****************************************************************************/
6081static inline u8 calc_crc8(u32 data, u8 crc)
6082{
6083 u8 D[32];
6084 u8 NewCRC[8];
6085 u8 C[8];
6086 u8 crc_res;
6087 u8 i;
6088
6089 /* split the data into 31 bits */
6090 for (i = 0; i < 32; i++) {
6091 D[i] = (u8)(data & 1);
6092 data = data >> 1;
6093 }
6094
6095 /* split the crc into 8 bits */
6096 for (i = 0; i < 8; i++) {
6097 C[i] = crc & 1;
6098 crc = crc >> 1;
6099 }
6100
6101 NewCRC[0] = D[31] ^ D[30] ^ D[28] ^ D[23] ^ D[21] ^ D[19] ^ D[18] ^
6102 D[16] ^ D[14] ^ D[12] ^ D[8] ^ D[7] ^ D[6] ^ D[0] ^ C[4] ^
6103 C[6] ^ C[7];
6104 NewCRC[1] = D[30] ^ D[29] ^ D[28] ^ D[24] ^ D[23] ^ D[22] ^ D[21] ^
6105 D[20] ^ D[18] ^ D[17] ^ D[16] ^ D[15] ^ D[14] ^ D[13] ^
6106 D[12] ^ D[9] ^ D[6] ^ D[1] ^ D[0] ^ C[0] ^ C[4] ^ C[5] ^
6107 C[6];
6108 NewCRC[2] = D[29] ^ D[28] ^ D[25] ^ D[24] ^ D[22] ^ D[17] ^ D[15] ^
6109 D[13] ^ D[12] ^ D[10] ^ D[8] ^ D[6] ^ D[2] ^ D[1] ^ D[0] ^
6110 C[0] ^ C[1] ^ C[4] ^ C[5];
6111 NewCRC[3] = D[30] ^ D[29] ^ D[26] ^ D[25] ^ D[23] ^ D[18] ^ D[16] ^
6112 D[14] ^ D[13] ^ D[11] ^ D[9] ^ D[7] ^ D[3] ^ D[2] ^ D[1] ^
6113 C[1] ^ C[2] ^ C[5] ^ C[6];
6114 NewCRC[4] = D[31] ^ D[30] ^ D[27] ^ D[26] ^ D[24] ^ D[19] ^ D[17] ^
6115 D[15] ^ D[14] ^ D[12] ^ D[10] ^ D[8] ^ D[4] ^ D[3] ^ D[2] ^
6116 C[0] ^ C[2] ^ C[3] ^ C[6] ^ C[7];
6117 NewCRC[5] = D[31] ^ D[28] ^ D[27] ^ D[25] ^ D[20] ^ D[18] ^ D[16] ^
6118 D[15] ^ D[13] ^ D[11] ^ D[9] ^ D[5] ^ D[4] ^ D[3] ^ C[1] ^
6119 C[3] ^ C[4] ^ C[7];
6120 NewCRC[6] = D[29] ^ D[28] ^ D[26] ^ D[21] ^ D[19] ^ D[17] ^ D[16] ^
6121 D[14] ^ D[12] ^ D[10] ^ D[6] ^ D[5] ^ D[4] ^ C[2] ^ C[4] ^
6122 C[5];
6123 NewCRC[7] = D[30] ^ D[29] ^ D[27] ^ D[22] ^ D[20] ^ D[18] ^ D[17] ^
6124 D[15] ^ D[13] ^ D[11] ^ D[7] ^ D[6] ^ D[5] ^ C[3] ^ C[5] ^
6125 C[6];
6126
6127 crc_res = 0;
6128 for (i = 0; i < 8; i++)
6129 crc_res |= (NewCRC[i] << i);
6130
6131 return crc_res;
6132}
6133
6134