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authorEilon Greenstein <eilong@broadcom.com>2009-08-12 04:24:29 -0400
committerDavid S. Miller <davem@davemloft.net>2009-08-13 02:03:01 -0400
commitab6ad5a4875e99dffe957a411fe890402a91f67f (patch)
tree26bb0b2a38808f099c0719d5e54ceb3ccc835fa9 /drivers/net/bnx2x_main.c
parent9c63de6293775b537614550fd61075a33ada9469 (diff)
bnx2x: Whitespaces and comments
Signed-off-by: Eilon Greenstein <eilong@broadcom.com> Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers/net/bnx2x_main.c')
-rw-r--r--drivers/net/bnx2x_main.c80
1 files changed, 41 insertions, 39 deletions
diff --git a/drivers/net/bnx2x_main.c b/drivers/net/bnx2x_main.c
index 8b6bb999d8e0..466c447c5fe9 100644
--- a/drivers/net/bnx2x_main.c
+++ b/drivers/net/bnx2x_main.c
@@ -63,8 +63,8 @@
63#include <linux/firmware.h> 63#include <linux/firmware.h>
64#include "bnx2x_fw_file_hdr.h" 64#include "bnx2x_fw_file_hdr.h"
65/* FW files */ 65/* FW files */
66#define FW_FILE_PREFIX_E1 "bnx2x-e1-" 66#define FW_FILE_PREFIX_E1 "bnx2x-e1-"
67#define FW_FILE_PREFIX_E1H "bnx2x-e1h-" 67#define FW_FILE_PREFIX_E1H "bnx2x-e1h-"
68 68
69/* Time in jiffies before concluding the transmitter is hung */ 69/* Time in jiffies before concluding the transmitter is hung */
70#define TX_TIMEOUT (5*HZ) 70#define TX_TIMEOUT (5*HZ)
@@ -723,7 +723,6 @@ static void bnx2x_int_disable(struct bnx2x *bp)
723 REG_WR(bp, addr, val); 723 REG_WR(bp, addr, val);
724 if (REG_RD(bp, addr) != val) 724 if (REG_RD(bp, addr) != val)
725 BNX2X_ERR("BUG! proper val not read from IGU!\n"); 725 BNX2X_ERR("BUG! proper val not read from IGU!\n");
726
727} 726}
728 727
729static void bnx2x_int_disable_sync(struct bnx2x *bp, int disable_hw) 728static void bnx2x_int_disable_sync(struct bnx2x *bp, int disable_hw)
@@ -1660,6 +1659,7 @@ reuse_rx:
1660 } 1659 }
1661 1660
1662 skb_record_rx_queue(skb, fp->index); 1661 skb_record_rx_queue(skb, fp->index);
1662
1663#ifdef BCM_VLAN 1663#ifdef BCM_VLAN
1664 if ((bp->vlgrp != NULL) && (bp->flags & HW_VLAN_RX_FLAG) && 1664 if ((bp->vlgrp != NULL) && (bp->flags & HW_VLAN_RX_FLAG) &&
1665 (le16_to_cpu(cqe->fast_path_cqe.pars_flags.flags) & 1665 (le16_to_cpu(cqe->fast_path_cqe.pars_flags.flags) &
@@ -2418,14 +2418,12 @@ static void bnx2x_link_attn(struct bnx2x *bp)
2418 int func; 2418 int func;
2419 int vn; 2419 int vn;
2420 2420
2421 /* Set the attention towards other drivers on the same port */
2421 for (vn = VN_0; vn < E1HVN_MAX; vn++) { 2422 for (vn = VN_0; vn < E1HVN_MAX; vn++) {
2422 if (vn == BP_E1HVN(bp)) 2423 if (vn == BP_E1HVN(bp))
2423 continue; 2424 continue;
2424 2425
2425 func = ((vn << 1) | port); 2426 func = ((vn << 1) | port);
2426
2427 /* Set the attention towards other drivers
2428 on the same port */
2429 REG_WR(bp, MISC_REG_AEU_GENERAL_ATTN_0 + 2427 REG_WR(bp, MISC_REG_AEU_GENERAL_ATTN_0 +
2430 (LINK_SYNC_ATTENTION_BIT_FUNC_0 + func)*4, 1); 2428 (LINK_SYNC_ATTENTION_BIT_FUNC_0 + func)*4, 1);
2431 } 2429 }
@@ -2880,6 +2878,7 @@ static inline void bnx2x_fan_failure(struct bnx2x *bp)
2880 " damage. Please contact Dell Support for assistance\n", 2878 " damage. Please contact Dell Support for assistance\n",
2881 bp->dev->name); 2879 bp->dev->name);
2882} 2880}
2881
2883static inline void bnx2x_attn_int_deasserted0(struct bnx2x *bp, u32 attn) 2882static inline void bnx2x_attn_int_deasserted0(struct bnx2x *bp, u32 attn)
2884{ 2883{
2885 int port = BP_PORT(bp); 2884 int port = BP_PORT(bp);
@@ -7660,9 +7659,11 @@ static int bnx2x_nic_unload(struct bnx2x *bp, int unload_mode)
7660 7659
7661 bp->state = BNX2X_STATE_CLOSING_WAIT4_HALT; 7660 bp->state = BNX2X_STATE_CLOSING_WAIT4_HALT;
7662 7661
7662 /* Set "drop all" */
7663 bp->rx_mode = BNX2X_RX_MODE_NONE; 7663 bp->rx_mode = BNX2X_RX_MODE_NONE;
7664 bnx2x_set_storm_rx_mode(bp); 7664 bnx2x_set_storm_rx_mode(bp);
7665 7665
7666 /* Disable HW interrupts, NAPI and Tx */
7666 bnx2x_netif_stop(bp, 1); 7667 bnx2x_netif_stop(bp, 1);
7667 7668
7668 del_timer_sync(&bp->timer); 7669 del_timer_sync(&bp->timer);
@@ -9158,8 +9159,7 @@ static int bnx2x_nway_reset(struct net_device *dev)
9158 return 0; 9159 return 0;
9159} 9160}
9160 9161
9161static u32 9162static u32 bnx2x_get_link(struct net_device *dev)
9162bnx2x_get_link(struct net_device *dev)
9163{ 9163{
9164 struct bnx2x *bp = netdev_priv(dev); 9164 struct bnx2x *bp = netdev_priv(dev);
9165 9165
@@ -10169,7 +10169,7 @@ static int bnx2x_test_nvram(struct bnx2x *bp)
10169 __be32 buf[0x350 / 4]; 10169 __be32 buf[0x350 / 4];
10170 u8 *data = (u8 *)buf; 10170 u8 *data = (u8 *)buf;
10171 int i, rc; 10171 int i, rc;
10172 u32 magic, csum; 10172 u32 magic, crc;
10173 10173
10174 rc = bnx2x_nvram_read(bp, 0, data, 4); 10174 rc = bnx2x_nvram_read(bp, 0, data, 4);
10175 if (rc) { 10175 if (rc) {
@@ -10194,10 +10194,10 @@ static int bnx2x_test_nvram(struct bnx2x *bp)
10194 goto test_nvram_exit; 10194 goto test_nvram_exit;
10195 } 10195 }
10196 10196
10197 csum = ether_crc_le(nvram_tbl[i].size, data); 10197 crc = ether_crc_le(nvram_tbl[i].size, data);
10198 if (csum != CRC32_RESIDUAL) { 10198 if (crc != CRC32_RESIDUAL) {
10199 DP(NETIF_MSG_PROBE, 10199 DP(NETIF_MSG_PROBE,
10200 "nvram_tbl[%d] csum value (0x%08x)\n", i, csum); 10200 "nvram_tbl[%d] crc value (0x%08x)\n", i, crc);
10201 rc = -ENODEV; 10201 rc = -ENODEV;
10202 goto test_nvram_exit; 10202 goto test_nvram_exit;
10203 } 10203 }
@@ -11771,17 +11771,17 @@ static int __devinit bnx2x_check_firmware(struct bnx2x *bp)
11771 BCM_5710_FW_MINOR_VERSION, 11771 BCM_5710_FW_MINOR_VERSION,
11772 BCM_5710_FW_REVISION_VERSION, 11772 BCM_5710_FW_REVISION_VERSION,
11773 BCM_5710_FW_ENGINEERING_VERSION); 11773 BCM_5710_FW_ENGINEERING_VERSION);
11774 return -EINVAL; 11774 return -EINVAL;
11775 } 11775 }
11776 11776
11777 return 0; 11777 return 0;
11778} 11778}
11779 11779
11780static void inline be32_to_cpu_n(const u8 *_source, u8 *_target, u32 n) 11780static inline void be32_to_cpu_n(const u8 *_source, u8 *_target, u32 n)
11781{ 11781{
11782 const __be32 *source = (const __be32 *)_source;
11783 u32 *target = (u32 *)_target;
11782 u32 i; 11784 u32 i;
11783 const __be32 *source = (const __be32*)_source;
11784 u32 *target = (u32*)_target;
11785 11785
11786 for (i = 0; i < n/4; i++) 11786 for (i = 0; i < n/4; i++)
11787 target[i] = be32_to_cpu(source[i]); 11787 target[i] = be32_to_cpu(source[i]);
@@ -11791,66 +11791,67 @@ static void inline be32_to_cpu_n(const u8 *_source, u8 *_target, u32 n)
11791 Ops array is stored in the following format: 11791 Ops array is stored in the following format:
11792 {op(8bit), offset(24bit, big endian), data(32bit, big endian)} 11792 {op(8bit), offset(24bit, big endian), data(32bit, big endian)}
11793 */ 11793 */
11794static void inline bnx2x_prep_ops(const u8 *_source, u8 *_target, u32 n) 11794static inline void bnx2x_prep_ops(const u8 *_source, u8 *_target, u32 n)
11795{ 11795{
11796 const __be32 *source = (const __be32 *)_source;
11797 struct raw_op *target = (struct raw_op *)_target;
11796 u32 i, j, tmp; 11798 u32 i, j, tmp;
11797 const __be32 *source = (const __be32*)_source;
11798 struct raw_op *target = (struct raw_op*)_target;
11799 11799
11800 for (i = 0, j = 0; i < n/8; i++, j+=2) { 11800 for (i = 0, j = 0; i < n/8; i++, j += 2) {
11801 tmp = be32_to_cpu(source[j]); 11801 tmp = be32_to_cpu(source[j]);
11802 target[i].op = (tmp >> 24) & 0xff; 11802 target[i].op = (tmp >> 24) & 0xff;
11803 target[i].offset = tmp & 0xffffff; 11803 target[i].offset = tmp & 0xffffff;
11804 target[i].raw_data = be32_to_cpu(source[j+1]); 11804 target[i].raw_data = be32_to_cpu(source[j+1]);
11805 } 11805 }
11806} 11806}
11807static void inline be16_to_cpu_n(const u8 *_source, u8 *_target, u32 n) 11807
11808static inline void be16_to_cpu_n(const u8 *_source, u8 *_target, u32 n)
11808{ 11809{
11810 const __be16 *source = (const __be16 *)_source;
11811 u16 *target = (u16 *)_target;
11809 u32 i; 11812 u32 i;
11810 u16 *target = (u16*)_target;
11811 const __be16 *source = (const __be16*)_source;
11812 11813
11813 for (i = 0; i < n/2; i++) 11814 for (i = 0; i < n/2; i++)
11814 target[i] = be16_to_cpu(source[i]); 11815 target[i] = be16_to_cpu(source[i]);
11815} 11816}
11816 11817
11817#define BNX2X_ALLOC_AND_SET(arr, lbl, func) \ 11818#define BNX2X_ALLOC_AND_SET(arr, lbl, func) \
11818 do { \ 11819 do { \
11819 u32 len = be32_to_cpu(fw_hdr->arr.len); \ 11820 u32 len = be32_to_cpu(fw_hdr->arr.len); \
11820 bp->arr = kmalloc(len, GFP_KERNEL); \ 11821 bp->arr = kmalloc(len, GFP_KERNEL); \
11821 if (!bp->arr) { \ 11822 if (!bp->arr) { \
11822 printk(KERN_ERR PFX "Failed to allocate %d bytes for "#arr"\n", len); \ 11823 printk(KERN_ERR PFX "Failed to allocate %d bytes " \
11824 "for "#arr"\n", len); \
11823 goto lbl; \ 11825 goto lbl; \
11824 } \ 11826 } \
11825 func(bp->firmware->data + \ 11827 func(bp->firmware->data + be32_to_cpu(fw_hdr->arr.offset), \
11826 be32_to_cpu(fw_hdr->arr.offset), \ 11828 (u8 *)bp->arr, len); \
11827 (u8*)bp->arr, len); \
11828 } while (0) 11829 } while (0)
11829 11830
11830
11831static int __devinit bnx2x_init_firmware(struct bnx2x *bp, struct device *dev) 11831static int __devinit bnx2x_init_firmware(struct bnx2x *bp, struct device *dev)
11832{ 11832{
11833 char fw_file_name[40] = {0}; 11833 char fw_file_name[40] = {0};
11834 int rc, offset;
11835 struct bnx2x_fw_file_hdr *fw_hdr; 11834 struct bnx2x_fw_file_hdr *fw_hdr;
11835 int rc, offset;
11836 11836
11837 /* Create a FW file name */ 11837 /* Create a FW file name */
11838 if (CHIP_IS_E1(bp)) 11838 if (CHIP_IS_E1(bp))
11839 offset = sprintf(fw_file_name, FW_FILE_PREFIX_E1); 11839 offset = sprintf(fw_file_name, FW_FILE_PREFIX_E1);
11840 else 11840 else
11841 offset = sprintf(fw_file_name, FW_FILE_PREFIX_E1H); 11841 offset = sprintf(fw_file_name, FW_FILE_PREFIX_E1H);
11842 11842
11843 sprintf(fw_file_name + offset, "%d.%d.%d.%d.fw", 11843 sprintf(fw_file_name + offset, "%d.%d.%d.%d.fw",
11844 BCM_5710_FW_MAJOR_VERSION, 11844 BCM_5710_FW_MAJOR_VERSION,
11845 BCM_5710_FW_MINOR_VERSION, 11845 BCM_5710_FW_MINOR_VERSION,
11846 BCM_5710_FW_REVISION_VERSION, 11846 BCM_5710_FW_REVISION_VERSION,
11847 BCM_5710_FW_ENGINEERING_VERSION); 11847 BCM_5710_FW_ENGINEERING_VERSION);
11848 11848
11849 printk(KERN_INFO PFX "Loading %s\n", fw_file_name); 11849 printk(KERN_INFO PFX "Loading %s\n", fw_file_name);
11850 11850
11851 rc = request_firmware(&bp->firmware, fw_file_name, dev); 11851 rc = request_firmware(&bp->firmware, fw_file_name, dev);
11852 if (rc) { 11852 if (rc) {
11853 printk(KERN_ERR PFX "Can't load firmware file %s\n", fw_file_name); 11853 printk(KERN_ERR PFX "Can't load firmware file %s\n",
11854 fw_file_name);
11854 goto request_firmware_exit; 11855 goto request_firmware_exit;
11855 } 11856 }
11856 11857
@@ -11870,7 +11871,8 @@ static int __devinit bnx2x_init_firmware(struct bnx2x *bp, struct device *dev)
11870 BNX2X_ALLOC_AND_SET(init_ops, init_ops_alloc_err, bnx2x_prep_ops); 11871 BNX2X_ALLOC_AND_SET(init_ops, init_ops_alloc_err, bnx2x_prep_ops);
11871 11872
11872 /* Offsets */ 11873 /* Offsets */
11873 BNX2X_ALLOC_AND_SET(init_ops_offsets, init_offsets_alloc_err, be16_to_cpu_n); 11874 BNX2X_ALLOC_AND_SET(init_ops_offsets, init_offsets_alloc_err,
11875 be16_to_cpu_n);
11874 11876
11875 /* STORMs firmware */ 11877 /* STORMs firmware */
11876 INIT_TSEM_INT_TABLE_DATA(bp) = bp->firmware->data + 11878 INIT_TSEM_INT_TABLE_DATA(bp) = bp->firmware->data +
@@ -11891,6 +11893,7 @@ static int __devinit bnx2x_init_firmware(struct bnx2x *bp, struct device *dev)
11891 be32_to_cpu(fw_hdr->csem_pram_data.offset); 11893 be32_to_cpu(fw_hdr->csem_pram_data.offset);
11892 11894
11893 return 0; 11895 return 0;
11896
11894init_offsets_alloc_err: 11897init_offsets_alloc_err:
11895 kfree(bp->init_ops); 11898 kfree(bp->init_ops);
11896init_ops_alloc_err: 11899init_ops_alloc_err:
@@ -11902,7 +11905,6 @@ request_firmware_exit:
11902} 11905}
11903 11906
11904 11907
11905
11906static int __devinit bnx2x_init_one(struct pci_dev *pdev, 11908static int __devinit bnx2x_init_one(struct pci_dev *pdev,
11907 const struct pci_device_id *ent) 11909 const struct pci_device_id *ent)
11908{ 11910{