diff options
author | Vladislav Zolotarov <vladz@broadcom.com> | 2010-04-18 21:13:57 -0400 |
---|---|---|
committer | David S. Miller <davem@davemloft.net> | 2010-04-19 16:17:08 -0400 |
commit | cdaa7cb84b63e0491582ef62fd0c7bf22a57e519 (patch) | |
tree | bdf17500a3e7670434c8ce96c1ceb581fdaa32d9 /drivers/net/bnx2x_main.c | |
parent | 2145a92057a94d2d1e3e9674fe03774cda7455ad (diff) |
bnx2x: White spaces
White spaces, code readability and prints.
Signed-off-by: Vladislav Zolotarov <vladz@broadcom.com>
Signed-off-by: Eilon Greenstein <eilong@broadcom.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers/net/bnx2x_main.c')
-rw-r--r-- | drivers/net/bnx2x_main.c | 365 |
1 files changed, 205 insertions, 160 deletions
diff --git a/drivers/net/bnx2x_main.c b/drivers/net/bnx2x_main.c index 22fbc4a1b368..d91a269161d6 100644 --- a/drivers/net/bnx2x_main.c +++ b/drivers/net/bnx2x_main.c | |||
@@ -102,7 +102,8 @@ MODULE_PARM_DESC(disable_tpa, " Disable the TPA (LRO) feature"); | |||
102 | 102 | ||
103 | static int int_mode; | 103 | static int int_mode; |
104 | module_param(int_mode, int, 0); | 104 | module_param(int_mode, int, 0); |
105 | MODULE_PARM_DESC(int_mode, " Force interrupt mode (1 INT#x; 2 MSI)"); | 105 | MODULE_PARM_DESC(int_mode, " Force interrupt mode other then MSI-X " |
106 | "(1 INT#x; 2 MSI)"); | ||
106 | 107 | ||
107 | static int dropless_fc; | 108 | static int dropless_fc; |
108 | module_param(dropless_fc, int, 0); | 109 | module_param(dropless_fc, int, 0); |
@@ -509,6 +510,7 @@ static int bnx2x_mc_assert(struct bnx2x *bp) | |||
509 | 510 | ||
510 | static void bnx2x_fw_dump(struct bnx2x *bp) | 511 | static void bnx2x_fw_dump(struct bnx2x *bp) |
511 | { | 512 | { |
513 | u32 addr; | ||
512 | u32 mark, offset; | 514 | u32 mark, offset; |
513 | __be32 data[9]; | 515 | __be32 data[9]; |
514 | int word; | 516 | int word; |
@@ -517,22 +519,22 @@ static void bnx2x_fw_dump(struct bnx2x *bp) | |||
517 | BNX2X_ERR("NO MCP - can not dump\n"); | 519 | BNX2X_ERR("NO MCP - can not dump\n"); |
518 | return; | 520 | return; |
519 | } | 521 | } |
520 | mark = REG_RD(bp, MCP_REG_MCPR_SCRATCH + 0xf104); | 522 | |
521 | mark = ((mark + 0x3) & ~0x3); | 523 | addr = bp->common.shmem_base - 0x0800 + 4; |
524 | mark = REG_RD(bp, addr); | ||
525 | mark = MCP_REG_MCPR_SCRATCH + ((mark + 0x3) & ~0x3) - 0x08000000; | ||
522 | pr_err("begin fw dump (mark 0x%x)\n", mark); | 526 | pr_err("begin fw dump (mark 0x%x)\n", mark); |
523 | 527 | ||
524 | pr_err(""); | 528 | pr_err(""); |
525 | for (offset = mark - 0x08000000; offset <= 0xF900; offset += 0x8*4) { | 529 | for (offset = mark; offset <= bp->common.shmem_base; offset += 0x8*4) { |
526 | for (word = 0; word < 8; word++) | 530 | for (word = 0; word < 8; word++) |
527 | data[word] = htonl(REG_RD(bp, MCP_REG_MCPR_SCRATCH + | 531 | data[word] = htonl(REG_RD(bp, offset + 4*word)); |
528 | offset + 4*word)); | ||
529 | data[8] = 0x0; | 532 | data[8] = 0x0; |
530 | pr_cont("%s", (char *)data); | 533 | pr_cont("%s", (char *)data); |
531 | } | 534 | } |
532 | for (offset = 0xF108; offset <= mark - 0x08000000; offset += 0x8*4) { | 535 | for (offset = addr + 4; offset <= mark; offset += 0x8*4) { |
533 | for (word = 0; word < 8; word++) | 536 | for (word = 0; word < 8; word++) |
534 | data[word] = htonl(REG_RD(bp, MCP_REG_MCPR_SCRATCH + | 537 | data[word] = htonl(REG_RD(bp, offset + 4*word)); |
535 | offset + 4*word)); | ||
536 | data[8] = 0x0; | 538 | data[8] = 0x0; |
537 | pr_cont("%s", (char *)data); | 539 | pr_cont("%s", (char *)data); |
538 | } | 540 | } |
@@ -551,9 +553,9 @@ static void bnx2x_panic_dump(struct bnx2x *bp) | |||
551 | 553 | ||
552 | /* Indices */ | 554 | /* Indices */ |
553 | /* Common */ | 555 | /* Common */ |
554 | BNX2X_ERR("def_c_idx(%u) def_u_idx(%u) def_x_idx(%u)" | 556 | BNX2X_ERR("def_c_idx(0x%x) def_u_idx(0x%x) def_x_idx(0x%x)" |
555 | " def_t_idx(%u) def_att_idx(%u) attn_state(%u)" | 557 | " def_t_idx(0x%x) def_att_idx(0x%x) attn_state(0x%x)" |
556 | " spq_prod_idx(%u)\n", | 558 | " spq_prod_idx(0x%x)\n", |
557 | bp->def_c_idx, bp->def_u_idx, bp->def_x_idx, bp->def_t_idx, | 559 | bp->def_c_idx, bp->def_u_idx, bp->def_x_idx, bp->def_t_idx, |
558 | bp->def_att_idx, bp->attn_state, bp->spq_prod_idx); | 560 | bp->def_att_idx, bp->attn_state, bp->spq_prod_idx); |
559 | 561 | ||
@@ -561,14 +563,14 @@ static void bnx2x_panic_dump(struct bnx2x *bp) | |||
561 | for_each_queue(bp, i) { | 563 | for_each_queue(bp, i) { |
562 | struct bnx2x_fastpath *fp = &bp->fp[i]; | 564 | struct bnx2x_fastpath *fp = &bp->fp[i]; |
563 | 565 | ||
564 | BNX2X_ERR("fp%d: rx_bd_prod(%x) rx_bd_cons(%x)" | 566 | BNX2X_ERR("fp%d: rx_bd_prod(0x%x) rx_bd_cons(0x%x)" |
565 | " *rx_bd_cons_sb(%x) rx_comp_prod(%x)" | 567 | " *rx_bd_cons_sb(0x%x) rx_comp_prod(0x%x)" |
566 | " rx_comp_cons(%x) *rx_cons_sb(%x)\n", | 568 | " rx_comp_cons(0x%x) *rx_cons_sb(0x%x)\n", |
567 | i, fp->rx_bd_prod, fp->rx_bd_cons, | 569 | i, fp->rx_bd_prod, fp->rx_bd_cons, |
568 | le16_to_cpu(*fp->rx_bd_cons_sb), fp->rx_comp_prod, | 570 | le16_to_cpu(*fp->rx_bd_cons_sb), fp->rx_comp_prod, |
569 | fp->rx_comp_cons, le16_to_cpu(*fp->rx_cons_sb)); | 571 | fp->rx_comp_cons, le16_to_cpu(*fp->rx_cons_sb)); |
570 | BNX2X_ERR(" rx_sge_prod(%x) last_max_sge(%x)" | 572 | BNX2X_ERR(" rx_sge_prod(0x%x) last_max_sge(0x%x)" |
571 | " fp_u_idx(%x) *sb_u_idx(%x)\n", | 573 | " fp_u_idx(0x%x) *sb_u_idx(0x%x)\n", |
572 | fp->rx_sge_prod, fp->last_max_sge, | 574 | fp->rx_sge_prod, fp->last_max_sge, |
573 | le16_to_cpu(fp->fp_u_idx), | 575 | le16_to_cpu(fp->fp_u_idx), |
574 | fp->status_blk->u_status_block.status_block_index); | 576 | fp->status_blk->u_status_block.status_block_index); |
@@ -578,12 +580,13 @@ static void bnx2x_panic_dump(struct bnx2x *bp) | |||
578 | for_each_queue(bp, i) { | 580 | for_each_queue(bp, i) { |
579 | struct bnx2x_fastpath *fp = &bp->fp[i]; | 581 | struct bnx2x_fastpath *fp = &bp->fp[i]; |
580 | 582 | ||
581 | BNX2X_ERR("fp%d: tx_pkt_prod(%x) tx_pkt_cons(%x)" | 583 | BNX2X_ERR("fp%d: tx_pkt_prod(0x%x) tx_pkt_cons(0x%x)" |
582 | " tx_bd_prod(%x) tx_bd_cons(%x) *tx_cons_sb(%x)\n", | 584 | " tx_bd_prod(0x%x) tx_bd_cons(0x%x)" |
585 | " *tx_cons_sb(0x%x)\n", | ||
583 | i, fp->tx_pkt_prod, fp->tx_pkt_cons, fp->tx_bd_prod, | 586 | i, fp->tx_pkt_prod, fp->tx_pkt_cons, fp->tx_bd_prod, |
584 | fp->tx_bd_cons, le16_to_cpu(*fp->tx_cons_sb)); | 587 | fp->tx_bd_cons, le16_to_cpu(*fp->tx_cons_sb)); |
585 | BNX2X_ERR(" fp_c_idx(%x) *sb_c_idx(%x)" | 588 | BNX2X_ERR(" fp_c_idx(0x%x) *sb_c_idx(0x%x)" |
586 | " tx_db_prod(%x)\n", le16_to_cpu(fp->fp_c_idx), | 589 | " tx_db_prod(0x%x)\n", le16_to_cpu(fp->fp_c_idx), |
587 | fp->status_blk->c_status_block.status_block_index, | 590 | fp->status_blk->c_status_block.status_block_index, |
588 | fp->tx_db.data.prod); | 591 | fp->tx_db.data.prod); |
589 | } | 592 | } |
@@ -1062,7 +1065,8 @@ static void bnx2x_sp_event(struct bnx2x_fastpath *fp, | |||
1062 | 1065 | ||
1063 | default: | 1066 | default: |
1064 | BNX2X_ERR("unexpected MC reply (%d) " | 1067 | BNX2X_ERR("unexpected MC reply (%d) " |
1065 | "fp->state is %x\n", command, fp->state); | 1068 | "fp[%d] state is %x\n", |
1069 | command, fp->index, fp->state); | ||
1066 | break; | 1070 | break; |
1067 | } | 1071 | } |
1068 | mb(); /* force bnx2x_wait_ramrod() to see the change */ | 1072 | mb(); /* force bnx2x_wait_ramrod() to see the change */ |
@@ -1341,7 +1345,7 @@ static void bnx2x_tpa_start(struct bnx2x_fastpath *fp, u16 queue, | |||
1341 | 1345 | ||
1342 | #ifdef BNX2X_STOP_ON_ERROR | 1346 | #ifdef BNX2X_STOP_ON_ERROR |
1343 | fp->tpa_queue_used |= (1 << queue); | 1347 | fp->tpa_queue_used |= (1 << queue); |
1344 | #ifdef __powerpc64__ | 1348 | #ifdef _ASM_GENERIC_INT_L64_H |
1345 | DP(NETIF_MSG_RX_STATUS, "fp->tpa_queue_used = 0x%lx\n", | 1349 | DP(NETIF_MSG_RX_STATUS, "fp->tpa_queue_used = 0x%lx\n", |
1346 | #else | 1350 | #else |
1347 | DP(NETIF_MSG_RX_STATUS, "fp->tpa_queue_used = 0x%llx\n", | 1351 | DP(NETIF_MSG_RX_STATUS, "fp->tpa_queue_used = 0x%llx\n", |
@@ -1370,8 +1374,7 @@ static int bnx2x_fill_frag_skb(struct bnx2x *bp, struct bnx2x_fastpath *fp, | |||
1370 | max(frag_size, (u32)len_on_bd)); | 1374 | max(frag_size, (u32)len_on_bd)); |
1371 | 1375 | ||
1372 | #ifdef BNX2X_STOP_ON_ERROR | 1376 | #ifdef BNX2X_STOP_ON_ERROR |
1373 | if (pages > | 1377 | if (pages > min_t(u32, 8, MAX_SKB_FRAGS)*SGE_PAGE_SIZE*PAGES_PER_SGE) { |
1374 | min((u32)8, (u32)MAX_SKB_FRAGS) * SGE_PAGE_SIZE * PAGES_PER_SGE) { | ||
1375 | BNX2X_ERR("SGL length is too long: %d. CQE index is %d\n", | 1378 | BNX2X_ERR("SGL length is too long: %d. CQE index is %d\n", |
1376 | pages, cqe_idx); | 1379 | pages, cqe_idx); |
1377 | BNX2X_ERR("fp_cqe->pkt_len = %d fp_cqe->len_on_bd = %d\n", | 1380 | BNX2X_ERR("fp_cqe->pkt_len = %d fp_cqe->len_on_bd = %d\n", |
@@ -1871,8 +1874,8 @@ static irqreturn_t bnx2x_interrupt(int irq, void *dev_instance) | |||
1871 | return IRQ_HANDLED; | 1874 | return IRQ_HANDLED; |
1872 | } | 1875 | } |
1873 | 1876 | ||
1874 | if (status) | 1877 | if (unlikely(status)) |
1875 | DP(NETIF_MSG_INTR, "got an unknown interrupt! (status %u)\n", | 1878 | DP(NETIF_MSG_INTR, "got an unknown interrupt! (status 0x%x)\n", |
1876 | status); | 1879 | status); |
1877 | 1880 | ||
1878 | return IRQ_HANDLED; | 1881 | return IRQ_HANDLED; |
@@ -2432,10 +2435,10 @@ static void bnx2x_init_vn_minmax(struct bnx2x *bp, int func) | |||
2432 | T_FAIR_COEF / (8 * vn_weight_sum) will always be greater | 2435 | T_FAIR_COEF / (8 * vn_weight_sum) will always be greater |
2433 | than zero */ | 2436 | than zero */ |
2434 | m_fair_vn.vn_credit_delta = | 2437 | m_fair_vn.vn_credit_delta = |
2435 | max((u32)(vn_min_rate * (T_FAIR_COEF / | 2438 | max_t(u32, (vn_min_rate * (T_FAIR_COEF / |
2436 | (8 * bp->vn_weight_sum))), | 2439 | (8 * bp->vn_weight_sum))), |
2437 | (u32)(bp->cmng.fair_vars.fair_threshold * 2)); | 2440 | (bp->cmng.fair_vars.fair_threshold * 2)); |
2438 | DP(NETIF_MSG_IFUP, "m_fair_vn.vn_credit_delta=%d\n", | 2441 | DP(NETIF_MSG_IFUP, "m_fair_vn.vn_credit_delta %d\n", |
2439 | m_fair_vn.vn_credit_delta); | 2442 | m_fair_vn.vn_credit_delta); |
2440 | } | 2443 | } |
2441 | 2444 | ||
@@ -2605,7 +2608,6 @@ u32 bnx2x_fw_command(struct bnx2x *bp, u32 command) | |||
2605 | return rc; | 2608 | return rc; |
2606 | } | 2609 | } |
2607 | 2610 | ||
2608 | static void bnx2x_set_storm_rx_mode(struct bnx2x *bp); | ||
2609 | static void bnx2x_set_eth_mac_addr_e1h(struct bnx2x *bp, int set); | 2611 | static void bnx2x_set_eth_mac_addr_e1h(struct bnx2x *bp, int set); |
2610 | static void bnx2x_set_rx_mode(struct net_device *dev); | 2612 | static void bnx2x_set_rx_mode(struct net_device *dev); |
2611 | 2613 | ||
@@ -2741,12 +2743,6 @@ static int bnx2x_sp_post(struct bnx2x *bp, int command, int cid, | |||
2741 | { | 2743 | { |
2742 | struct eth_spe *spe; | 2744 | struct eth_spe *spe; |
2743 | 2745 | ||
2744 | DP(BNX2X_MSG_SP/*NETIF_MSG_TIMER*/, | ||
2745 | "SPQE (%x:%x) command %d hw_cid %x data (%x:%x) left %x\n", | ||
2746 | (u32)U64_HI(bp->spq_mapping), (u32)(U64_LO(bp->spq_mapping) + | ||
2747 | (void *)bp->spq_prod_bd - (void *)bp->spq), command, | ||
2748 | HW_CID(bp, cid), data_hi, data_lo, bp->spq_left); | ||
2749 | |||
2750 | #ifdef BNX2X_STOP_ON_ERROR | 2746 | #ifdef BNX2X_STOP_ON_ERROR |
2751 | if (unlikely(bp->panic)) | 2747 | if (unlikely(bp->panic)) |
2752 | return -EIO; | 2748 | return -EIO; |
@@ -2765,8 +2761,8 @@ static int bnx2x_sp_post(struct bnx2x *bp, int command, int cid, | |||
2765 | 2761 | ||
2766 | /* CID needs port number to be encoded int it */ | 2762 | /* CID needs port number to be encoded int it */ |
2767 | spe->hdr.conn_and_cmd_data = | 2763 | spe->hdr.conn_and_cmd_data = |
2768 | cpu_to_le32(((command << SPE_HDR_CMD_ID_SHIFT) | | 2764 | cpu_to_le32((command << SPE_HDR_CMD_ID_SHIFT) | |
2769 | HW_CID(bp, cid))); | 2765 | HW_CID(bp, cid)); |
2770 | spe->hdr.type = cpu_to_le16(ETH_CONNECTION_TYPE); | 2766 | spe->hdr.type = cpu_to_le16(ETH_CONNECTION_TYPE); |
2771 | if (common) | 2767 | if (common) |
2772 | spe->hdr.type |= | 2768 | spe->hdr.type |= |
@@ -2777,6 +2773,13 @@ static int bnx2x_sp_post(struct bnx2x *bp, int command, int cid, | |||
2777 | 2773 | ||
2778 | bp->spq_left--; | 2774 | bp->spq_left--; |
2779 | 2775 | ||
2776 | DP(BNX2X_MSG_SP/*NETIF_MSG_TIMER*/, | ||
2777 | "SPQE[%x] (%x:%x) command %d hw_cid %x data (%x:%x) left %x\n", | ||
2778 | bp->spq_prod_idx, (u32)U64_HI(bp->spq_mapping), | ||
2779 | (u32)(U64_LO(bp->spq_mapping) + | ||
2780 | (void *)bp->spq_prod_bd - (void *)bp->spq), command, | ||
2781 | HW_CID(bp, cid), data_hi, data_lo, bp->spq_left); | ||
2782 | |||
2780 | bnx2x_sp_prod_update(bp); | 2783 | bnx2x_sp_prod_update(bp); |
2781 | spin_unlock_bh(&bp->spq_lock); | 2784 | spin_unlock_bh(&bp->spq_lock); |
2782 | return 0; | 2785 | return 0; |
@@ -2952,8 +2955,9 @@ static inline void bnx2x_fan_failure(struct bnx2x *bp) | |||
2952 | bp->link_params.ext_phy_config); | 2955 | bp->link_params.ext_phy_config); |
2953 | 2956 | ||
2954 | /* log the failure */ | 2957 | /* log the failure */ |
2955 | netdev_err(bp->dev, "Fan Failure on Network Controller has caused the driver to shutdown the card to prevent permanent damage.\n" | 2958 | netdev_err(bp->dev, "Fan Failure on Network Controller has caused" |
2956 | "Please contact Dell Support for assistance.\n"); | 2959 | " the driver to shutdown the card to prevent permanent" |
2960 | " damage. Please contact OEM Support for assistance\n"); | ||
2957 | } | 2961 | } |
2958 | 2962 | ||
2959 | static inline void bnx2x_attn_int_deasserted0(struct bnx2x *bp, u32 attn) | 2963 | static inline void bnx2x_attn_int_deasserted0(struct bnx2x *bp, u32 attn) |
@@ -3575,11 +3579,23 @@ static void bnx2x_sp_task(struct work_struct *work) | |||
3575 | /* if (status == 0) */ | 3579 | /* if (status == 0) */ |
3576 | /* BNX2X_ERR("spurious slowpath interrupt!\n"); */ | 3580 | /* BNX2X_ERR("spurious slowpath interrupt!\n"); */ |
3577 | 3581 | ||
3578 | DP(NETIF_MSG_INTR, "got a slowpath interrupt (updated %x)\n", status); | 3582 | DP(NETIF_MSG_INTR, "got a slowpath interrupt (status 0x%x)\n", status); |
3579 | 3583 | ||
3580 | /* HW attentions */ | 3584 | /* HW attentions */ |
3581 | if (status & 0x1) | 3585 | if (status & 0x1) { |
3582 | bnx2x_attn_int(bp); | 3586 | bnx2x_attn_int(bp); |
3587 | status &= ~0x1; | ||
3588 | } | ||
3589 | |||
3590 | /* CStorm events: STAT_QUERY */ | ||
3591 | if (status & 0x2) { | ||
3592 | DP(BNX2X_MSG_SP, "CStorm events: STAT_QUERY\n"); | ||
3593 | status &= ~0x2; | ||
3594 | } | ||
3595 | |||
3596 | if (unlikely(status)) | ||
3597 | DP(NETIF_MSG_INTR, "got an unknown interrupt! (status 0x%x)\n", | ||
3598 | status); | ||
3583 | 3599 | ||
3584 | bnx2x_ack_sb(bp, DEF_SB_ID, ATTENTION_ID, le16_to_cpu(bp->def_att_idx), | 3600 | bnx2x_ack_sb(bp, DEF_SB_ID, ATTENTION_ID, le16_to_cpu(bp->def_att_idx), |
3585 | IGU_INT_NOP, 1); | 3601 | IGU_INT_NOP, 1); |
@@ -3591,7 +3607,6 @@ static void bnx2x_sp_task(struct work_struct *work) | |||
3591 | IGU_INT_NOP, 1); | 3607 | IGU_INT_NOP, 1); |
3592 | bnx2x_ack_sb(bp, DEF_SB_ID, TSTORM_ID, le16_to_cpu(bp->def_t_idx), | 3608 | bnx2x_ack_sb(bp, DEF_SB_ID, TSTORM_ID, le16_to_cpu(bp->def_t_idx), |
3593 | IGU_INT_ENABLE, 1); | 3609 | IGU_INT_ENABLE, 1); |
3594 | |||
3595 | } | 3610 | } |
3596 | 3611 | ||
3597 | static irqreturn_t bnx2x_msix_sp_int(int irq, void *dev_instance) | 3612 | static irqreturn_t bnx2x_msix_sp_int(int irq, void *dev_instance) |
@@ -4376,21 +4391,21 @@ static int bnx2x_storm_stats_update(struct bnx2x *bp) | |||
4376 | if ((u16)(le16_to_cpu(xclient->stats_counter) + 1) != | 4391 | if ((u16)(le16_to_cpu(xclient->stats_counter) + 1) != |
4377 | bp->stats_counter) { | 4392 | bp->stats_counter) { |
4378 | DP(BNX2X_MSG_STATS, "[%d] stats not updated by xstorm" | 4393 | DP(BNX2X_MSG_STATS, "[%d] stats not updated by xstorm" |
4379 | " xstorm counter (%d) != stats_counter (%d)\n", | 4394 | " xstorm counter (0x%x) != stats_counter (0x%x)\n", |
4380 | i, xclient->stats_counter, bp->stats_counter); | 4395 | i, xclient->stats_counter, bp->stats_counter); |
4381 | return -1; | 4396 | return -1; |
4382 | } | 4397 | } |
4383 | if ((u16)(le16_to_cpu(tclient->stats_counter) + 1) != | 4398 | if ((u16)(le16_to_cpu(tclient->stats_counter) + 1) != |
4384 | bp->stats_counter) { | 4399 | bp->stats_counter) { |
4385 | DP(BNX2X_MSG_STATS, "[%d] stats not updated by tstorm" | 4400 | DP(BNX2X_MSG_STATS, "[%d] stats not updated by tstorm" |
4386 | " tstorm counter (%d) != stats_counter (%d)\n", | 4401 | " tstorm counter (0x%x) != stats_counter (0x%x)\n", |
4387 | i, tclient->stats_counter, bp->stats_counter); | 4402 | i, tclient->stats_counter, bp->stats_counter); |
4388 | return -2; | 4403 | return -2; |
4389 | } | 4404 | } |
4390 | if ((u16)(le16_to_cpu(uclient->stats_counter) + 1) != | 4405 | if ((u16)(le16_to_cpu(uclient->stats_counter) + 1) != |
4391 | bp->stats_counter) { | 4406 | bp->stats_counter) { |
4392 | DP(BNX2X_MSG_STATS, "[%d] stats not updated by ustorm" | 4407 | DP(BNX2X_MSG_STATS, "[%d] stats not updated by ustorm" |
4393 | " ustorm counter (%d) != stats_counter (%d)\n", | 4408 | " ustorm counter (0x%x) != stats_counter (0x%x)\n", |
4394 | i, uclient->stats_counter, bp->stats_counter); | 4409 | i, uclient->stats_counter, bp->stats_counter); |
4395 | return -4; | 4410 | return -4; |
4396 | } | 4411 | } |
@@ -4819,6 +4834,9 @@ static void bnx2x_stats_handle(struct bnx2x *bp, enum bnx2x_stats_event event) | |||
4819 | { | 4834 | { |
4820 | enum bnx2x_stats_state state = bp->stats_state; | 4835 | enum bnx2x_stats_state state = bp->stats_state; |
4821 | 4836 | ||
4837 | if (unlikely(bp->panic)) | ||
4838 | return; | ||
4839 | |||
4822 | bnx2x_stats_stm[state][event].action(bp); | 4840 | bnx2x_stats_stm[state][event].action(bp); |
4823 | bp->stats_state = bnx2x_stats_stm[state][event].next_state; | 4841 | bp->stats_state = bnx2x_stats_stm[state][event].next_state; |
4824 | 4842 | ||
@@ -5423,8 +5441,8 @@ static void bnx2x_init_rx_rings(struct bnx2x *bp) | |||
5423 | 5441 | ||
5424 | fp->rx_bd_prod = ring_prod; | 5442 | fp->rx_bd_prod = ring_prod; |
5425 | /* must not have more available CQEs than BDs */ | 5443 | /* must not have more available CQEs than BDs */ |
5426 | fp->rx_comp_prod = min((u16)(NUM_RCQ_RINGS*RCQ_DESC_CNT), | 5444 | fp->rx_comp_prod = min_t(u16, NUM_RCQ_RINGS*RCQ_DESC_CNT, |
5427 | cqe_ring_prod); | 5445 | cqe_ring_prod); |
5428 | fp->rx_pkt = fp->rx_calls = 0; | 5446 | fp->rx_pkt = fp->rx_calls = 0; |
5429 | 5447 | ||
5430 | /* Warning! | 5448 | /* Warning! |
@@ -5530,8 +5548,8 @@ static void bnx2x_init_context(struct bnx2x *bp) | |||
5530 | context->ustorm_st_context.common.flags |= | 5548 | context->ustorm_st_context.common.flags |= |
5531 | USTORM_ETH_ST_CONTEXT_CONFIG_ENABLE_TPA; | 5549 | USTORM_ETH_ST_CONTEXT_CONFIG_ENABLE_TPA; |
5532 | context->ustorm_st_context.common.sge_buff_size = | 5550 | context->ustorm_st_context.common.sge_buff_size = |
5533 | (u16)min((u32)SGE_PAGE_SIZE*PAGES_PER_SGE, | 5551 | (u16)min_t(u32, SGE_PAGE_SIZE*PAGES_PER_SGE, |
5534 | (u32)0xffff); | 5552 | 0xffff); |
5535 | context->ustorm_st_context.common.sge_page_base_hi = | 5553 | context->ustorm_st_context.common.sge_page_base_hi = |
5536 | U64_HI(fp->rx_sge_mapping); | 5554 | U64_HI(fp->rx_sge_mapping); |
5537 | context->ustorm_st_context.common.sge_page_base_lo = | 5555 | context->ustorm_st_context.common.sge_page_base_lo = |
@@ -5828,10 +5846,8 @@ static void bnx2x_init_internal_func(struct bnx2x *bp) | |||
5828 | } | 5846 | } |
5829 | 5847 | ||
5830 | /* Init CQ ring mapping and aggregation size, the FW limit is 8 frags */ | 5848 | /* Init CQ ring mapping and aggregation size, the FW limit is 8 frags */ |
5831 | max_agg_size = | 5849 | max_agg_size = min_t(u32, (min_t(u32, 8, MAX_SKB_FRAGS) * |
5832 | min((u32)(min((u32)8, (u32)MAX_SKB_FRAGS) * | 5850 | SGE_PAGE_SIZE * PAGES_PER_SGE), 0xffff); |
5833 | SGE_PAGE_SIZE * PAGES_PER_SGE), | ||
5834 | (u32)0xffff); | ||
5835 | for_each_queue(bp, i) { | 5851 | for_each_queue(bp, i) { |
5836 | struct bnx2x_fastpath *fp = &bp->fp[i]; | 5852 | struct bnx2x_fastpath *fp = &bp->fp[i]; |
5837 | 5853 | ||
@@ -5917,7 +5933,7 @@ static void bnx2x_init_internal_func(struct bnx2x *bp) | |||
5917 | } | 5933 | } |
5918 | 5934 | ||
5919 | 5935 | ||
5920 | /* Store it to internal memory */ | 5936 | /* Store cmng structures to internal memory */ |
5921 | if (bp->port.pmf) | 5937 | if (bp->port.pmf) |
5922 | for (i = 0; i < sizeof(struct cmng_struct_per_port) / 4; i++) | 5938 | for (i = 0; i < sizeof(struct cmng_struct_per_port) / 4; i++) |
5923 | REG_WR(bp, BAR_XSTRORM_INTMEM + | 5939 | REG_WR(bp, BAR_XSTRORM_INTMEM + |
@@ -6035,7 +6051,8 @@ gunzip_nomem2: | |||
6035 | bp->gunzip_buf = NULL; | 6051 | bp->gunzip_buf = NULL; |
6036 | 6052 | ||
6037 | gunzip_nomem1: | 6053 | gunzip_nomem1: |
6038 | netdev_err(bp->dev, "Cannot allocate firmware buffer for un-compression\n"); | 6054 | netdev_err(bp->dev, "Cannot allocate firmware buffer for" |
6055 | " un-compression\n"); | ||
6039 | return -ENOMEM; | 6056 | return -ENOMEM; |
6040 | } | 6057 | } |
6041 | 6058 | ||
@@ -6086,8 +6103,9 @@ static int bnx2x_gunzip(struct bnx2x *bp, const u8 *zbuf, int len) | |||
6086 | 6103 | ||
6087 | bp->gunzip_outlen = (FW_BUF_SIZE - bp->strm->avail_out); | 6104 | bp->gunzip_outlen = (FW_BUF_SIZE - bp->strm->avail_out); |
6088 | if (bp->gunzip_outlen & 0x3) | 6105 | if (bp->gunzip_outlen & 0x3) |
6089 | netdev_err(bp->dev, "Firmware decompression error: gunzip_outlen (%d) not aligned\n", | 6106 | netdev_err(bp->dev, "Firmware decompression error:" |
6090 | bp->gunzip_outlen); | 6107 | " gunzip_outlen (%d) not aligned\n", |
6108 | bp->gunzip_outlen); | ||
6091 | bp->gunzip_outlen >>= 2; | 6109 | bp->gunzip_outlen >>= 2; |
6092 | 6110 | ||
6093 | zlib_inflateEnd(bp->strm); | 6111 | zlib_inflateEnd(bp->strm); |
@@ -6433,7 +6451,7 @@ static void bnx2x_setup_fan_failure_detection(struct bnx2x *bp) | |||
6433 | /* set to active low mode */ | 6451 | /* set to active low mode */ |
6434 | val = REG_RD(bp, MISC_REG_SPIO_INT); | 6452 | val = REG_RD(bp, MISC_REG_SPIO_INT); |
6435 | val |= ((1 << MISC_REGISTERS_SPIO_5) << | 6453 | val |= ((1 << MISC_REGISTERS_SPIO_5) << |
6436 | MISC_REGISTERS_SPIO_INT_OLD_SET_POS); | 6454 | MISC_REGISTERS_SPIO_INT_OLD_SET_POS); |
6437 | REG_WR(bp, MISC_REG_SPIO_INT, val); | 6455 | REG_WR(bp, MISC_REG_SPIO_INT, val); |
6438 | 6456 | ||
6439 | /* enable interrupt to signal the IGU */ | 6457 | /* enable interrupt to signal the IGU */ |
@@ -6620,7 +6638,8 @@ static int bnx2x_init_common(struct bnx2x *bp) | |||
6620 | 6638 | ||
6621 | if (sizeof(union cdu_context) != 1024) | 6639 | if (sizeof(union cdu_context) != 1024) |
6622 | /* we currently assume that a context is 1024 bytes */ | 6640 | /* we currently assume that a context is 1024 bytes */ |
6623 | pr_alert("please adjust the size of cdu_context(%ld)\n", | 6641 | dev_alert(&bp->pdev->dev, "please adjust the size " |
6642 | "of cdu_context(%ld)\n", | ||
6624 | (long)sizeof(union cdu_context)); | 6643 | (long)sizeof(union cdu_context)); |
6625 | 6644 | ||
6626 | bnx2x_init_block(bp, CDU_BLOCK, COMMON_STAGE); | 6645 | bnx2x_init_block(bp, CDU_BLOCK, COMMON_STAGE); |
@@ -6724,7 +6743,7 @@ static int bnx2x_init_port(struct bnx2x *bp) | |||
6724 | u32 low, high; | 6743 | u32 low, high; |
6725 | u32 val; | 6744 | u32 val; |
6726 | 6745 | ||
6727 | DP(BNX2X_MSG_MCP, "starting port init port %x\n", port); | 6746 | DP(BNX2X_MSG_MCP, "starting port init port %d\n", port); |
6728 | 6747 | ||
6729 | REG_WR(bp, NIG_REG_MASK_INTERRUPT_PORT0 + port*4, 0); | 6748 | REG_WR(bp, NIG_REG_MASK_INTERRUPT_PORT0 + port*4, 0); |
6730 | 6749 | ||
@@ -6743,6 +6762,7 @@ static int bnx2x_init_port(struct bnx2x *bp) | |||
6743 | REG_WR(bp, TM_REG_LIN0_SCAN_TIME + port*4, 20); | 6762 | REG_WR(bp, TM_REG_LIN0_SCAN_TIME + port*4, 20); |
6744 | REG_WR(bp, TM_REG_LIN0_MAX_ACTIVE_CID + port*4, 31); | 6763 | REG_WR(bp, TM_REG_LIN0_MAX_ACTIVE_CID + port*4, 31); |
6745 | #endif | 6764 | #endif |
6765 | |||
6746 | bnx2x_init_block(bp, DQ_BLOCK, init_stage); | 6766 | bnx2x_init_block(bp, DQ_BLOCK, init_stage); |
6747 | 6767 | ||
6748 | bnx2x_init_block(bp, BRB1_BLOCK, init_stage); | 6768 | bnx2x_init_block(bp, BRB1_BLOCK, init_stage); |
@@ -6935,7 +6955,7 @@ static int bnx2x_init_func(struct bnx2x *bp) | |||
6935 | u32 addr, val; | 6955 | u32 addr, val; |
6936 | int i; | 6956 | int i; |
6937 | 6957 | ||
6938 | DP(BNX2X_MSG_MCP, "starting func init func %x\n", func); | 6958 | DP(BNX2X_MSG_MCP, "starting func init func %d\n", func); |
6939 | 6959 | ||
6940 | /* set MSI reconfigure capability */ | 6960 | /* set MSI reconfigure capability */ |
6941 | addr = (port ? HC_REG_CONFIG_1 : HC_REG_CONFIG_0); | 6961 | addr = (port ? HC_REG_CONFIG_1 : HC_REG_CONFIG_0); |
@@ -7429,10 +7449,11 @@ static int bnx2x_req_msix_irqs(struct bnx2x *bp) | |||
7429 | } | 7449 | } |
7430 | 7450 | ||
7431 | i = BNX2X_NUM_QUEUES(bp); | 7451 | i = BNX2X_NUM_QUEUES(bp); |
7432 | netdev_info(bp->dev, "using MSI-X IRQs: sp %d fp[%d] %d ... fp[%d] %d\n", | 7452 | netdev_info(bp->dev, "using MSI-X IRQs: sp %d fp[%d] %d" |
7433 | bp->msix_table[0].vector, | 7453 | " ... fp[%d] %d\n", |
7434 | 0, bp->msix_table[offset].vector, | 7454 | bp->msix_table[0].vector, |
7435 | i - 1, bp->msix_table[offset + i - 1].vector); | 7455 | 0, bp->msix_table[offset].vector, |
7456 | i - 1, bp->msix_table[offset + i - 1].vector); | ||
7436 | 7457 | ||
7437 | return 0; | 7458 | return 0; |
7438 | } | 7459 | } |
@@ -9143,7 +9164,7 @@ static void __devinit bnx2x_get_common_hwinfo(struct bnx2x *bp) | |||
9143 | val = SHMEM_RD(bp, validity_map[BP_PORT(bp)]); | 9164 | val = SHMEM_RD(bp, validity_map[BP_PORT(bp)]); |
9144 | if ((val & (SHR_MEM_VALIDITY_DEV_INFO | SHR_MEM_VALIDITY_MB)) | 9165 | if ((val & (SHR_MEM_VALIDITY_DEV_INFO | SHR_MEM_VALIDITY_MB)) |
9145 | != (SHR_MEM_VALIDITY_DEV_INFO | SHR_MEM_VALIDITY_MB)) | 9166 | != (SHR_MEM_VALIDITY_DEV_INFO | SHR_MEM_VALIDITY_MB)) |
9146 | BNX2X_ERR("BAD MCP validity signature\n"); | 9167 | BNX2X_ERROR("BAD MCP validity signature\n"); |
9147 | 9168 | ||
9148 | bp->common.hw_config = SHMEM_RD(bp, dev_info.shared_hw_config.config); | 9169 | bp->common.hw_config = SHMEM_RD(bp, dev_info.shared_hw_config.config); |
9149 | BNX2X_DEV_INFO("hw_config 0x%08x\n", bp->common.hw_config); | 9170 | BNX2X_DEV_INFO("hw_config 0x%08x\n", bp->common.hw_config); |
@@ -9167,8 +9188,8 @@ static void __devinit bnx2x_get_common_hwinfo(struct bnx2x *bp) | |||
9167 | if (val < BNX2X_BC_VER) { | 9188 | if (val < BNX2X_BC_VER) { |
9168 | /* for now only warn | 9189 | /* for now only warn |
9169 | * later we might need to enforce this */ | 9190 | * later we might need to enforce this */ |
9170 | BNX2X_ERR("This driver needs bc_ver %X but found %X," | 9191 | BNX2X_ERROR("This driver needs bc_ver %X but found %X, " |
9171 | " please upgrade BC\n", BNX2X_BC_VER, val); | 9192 | "please upgrade BC\n", BNX2X_BC_VER, val); |
9172 | } | 9193 | } |
9173 | bp->link_params.feature_config_flags |= | 9194 | bp->link_params.feature_config_flags |= |
9174 | (val >= REQ_BC_VER_4_VRFY_OPT_MDL) ? | 9195 | (val >= REQ_BC_VER_4_VRFY_OPT_MDL) ? |
@@ -9189,7 +9210,8 @@ static void __devinit bnx2x_get_common_hwinfo(struct bnx2x *bp) | |||
9189 | val3 = SHMEM_RD(bp, dev_info.shared_hw_config.part_num[8]); | 9210 | val3 = SHMEM_RD(bp, dev_info.shared_hw_config.part_num[8]); |
9190 | val4 = SHMEM_RD(bp, dev_info.shared_hw_config.part_num[12]); | 9211 | val4 = SHMEM_RD(bp, dev_info.shared_hw_config.part_num[12]); |
9191 | 9212 | ||
9192 | pr_info("part number %X-%X-%X-%X\n", val, val2, val3, val4); | 9213 | dev_info(&bp->pdev->dev, "part number %X-%X-%X-%X\n", |
9214 | val, val2, val3, val4); | ||
9193 | } | 9215 | } |
9194 | 9216 | ||
9195 | static void __devinit bnx2x_link_settings_supported(struct bnx2x *bp, | 9217 | static void __devinit bnx2x_link_settings_supported(struct bnx2x *bp, |
@@ -9467,11 +9489,11 @@ static void __devinit bnx2x_link_settings_requested(struct bnx2x *bp) | |||
9467 | bp->port.advertising = (ADVERTISED_10baseT_Full | | 9489 | bp->port.advertising = (ADVERTISED_10baseT_Full | |
9468 | ADVERTISED_TP); | 9490 | ADVERTISED_TP); |
9469 | } else { | 9491 | } else { |
9470 | BNX2X_ERR("NVRAM config error. " | 9492 | BNX2X_ERROR("NVRAM config error. " |
9471 | "Invalid link_config 0x%x" | 9493 | "Invalid link_config 0x%x" |
9472 | " speed_cap_mask 0x%x\n", | 9494 | " speed_cap_mask 0x%x\n", |
9473 | bp->port.link_config, | 9495 | bp->port.link_config, |
9474 | bp->link_params.speed_cap_mask); | 9496 | bp->link_params.speed_cap_mask); |
9475 | return; | 9497 | return; |
9476 | } | 9498 | } |
9477 | break; | 9499 | break; |
@@ -9483,11 +9505,11 @@ static void __devinit bnx2x_link_settings_requested(struct bnx2x *bp) | |||
9483 | bp->port.advertising = (ADVERTISED_10baseT_Half | | 9505 | bp->port.advertising = (ADVERTISED_10baseT_Half | |
9484 | ADVERTISED_TP); | 9506 | ADVERTISED_TP); |
9485 | } else { | 9507 | } else { |
9486 | BNX2X_ERR("NVRAM config error. " | 9508 | BNX2X_ERROR("NVRAM config error. " |
9487 | "Invalid link_config 0x%x" | 9509 | "Invalid link_config 0x%x" |
9488 | " speed_cap_mask 0x%x\n", | 9510 | " speed_cap_mask 0x%x\n", |
9489 | bp->port.link_config, | 9511 | bp->port.link_config, |
9490 | bp->link_params.speed_cap_mask); | 9512 | bp->link_params.speed_cap_mask); |
9491 | return; | 9513 | return; |
9492 | } | 9514 | } |
9493 | break; | 9515 | break; |
@@ -9498,11 +9520,11 @@ static void __devinit bnx2x_link_settings_requested(struct bnx2x *bp) | |||
9498 | bp->port.advertising = (ADVERTISED_100baseT_Full | | 9520 | bp->port.advertising = (ADVERTISED_100baseT_Full | |
9499 | ADVERTISED_TP); | 9521 | ADVERTISED_TP); |
9500 | } else { | 9522 | } else { |
9501 | BNX2X_ERR("NVRAM config error. " | 9523 | BNX2X_ERROR("NVRAM config error. " |
9502 | "Invalid link_config 0x%x" | 9524 | "Invalid link_config 0x%x" |
9503 | " speed_cap_mask 0x%x\n", | 9525 | " speed_cap_mask 0x%x\n", |
9504 | bp->port.link_config, | 9526 | bp->port.link_config, |
9505 | bp->link_params.speed_cap_mask); | 9527 | bp->link_params.speed_cap_mask); |
9506 | return; | 9528 | return; |
9507 | } | 9529 | } |
9508 | break; | 9530 | break; |
@@ -9514,11 +9536,11 @@ static void __devinit bnx2x_link_settings_requested(struct bnx2x *bp) | |||
9514 | bp->port.advertising = (ADVERTISED_100baseT_Half | | 9536 | bp->port.advertising = (ADVERTISED_100baseT_Half | |
9515 | ADVERTISED_TP); | 9537 | ADVERTISED_TP); |
9516 | } else { | 9538 | } else { |
9517 | BNX2X_ERR("NVRAM config error. " | 9539 | BNX2X_ERROR("NVRAM config error. " |
9518 | "Invalid link_config 0x%x" | 9540 | "Invalid link_config 0x%x" |
9519 | " speed_cap_mask 0x%x\n", | 9541 | " speed_cap_mask 0x%x\n", |
9520 | bp->port.link_config, | 9542 | bp->port.link_config, |
9521 | bp->link_params.speed_cap_mask); | 9543 | bp->link_params.speed_cap_mask); |
9522 | return; | 9544 | return; |
9523 | } | 9545 | } |
9524 | break; | 9546 | break; |
@@ -9529,11 +9551,11 @@ static void __devinit bnx2x_link_settings_requested(struct bnx2x *bp) | |||
9529 | bp->port.advertising = (ADVERTISED_1000baseT_Full | | 9551 | bp->port.advertising = (ADVERTISED_1000baseT_Full | |
9530 | ADVERTISED_TP); | 9552 | ADVERTISED_TP); |
9531 | } else { | 9553 | } else { |
9532 | BNX2X_ERR("NVRAM config error. " | 9554 | BNX2X_ERROR("NVRAM config error. " |
9533 | "Invalid link_config 0x%x" | 9555 | "Invalid link_config 0x%x" |
9534 | " speed_cap_mask 0x%x\n", | 9556 | " speed_cap_mask 0x%x\n", |
9535 | bp->port.link_config, | 9557 | bp->port.link_config, |
9536 | bp->link_params.speed_cap_mask); | 9558 | bp->link_params.speed_cap_mask); |
9537 | return; | 9559 | return; |
9538 | } | 9560 | } |
9539 | break; | 9561 | break; |
@@ -9544,11 +9566,11 @@ static void __devinit bnx2x_link_settings_requested(struct bnx2x *bp) | |||
9544 | bp->port.advertising = (ADVERTISED_2500baseX_Full | | 9566 | bp->port.advertising = (ADVERTISED_2500baseX_Full | |
9545 | ADVERTISED_TP); | 9567 | ADVERTISED_TP); |
9546 | } else { | 9568 | } else { |
9547 | BNX2X_ERR("NVRAM config error. " | 9569 | BNX2X_ERROR("NVRAM config error. " |
9548 | "Invalid link_config 0x%x" | 9570 | "Invalid link_config 0x%x" |
9549 | " speed_cap_mask 0x%x\n", | 9571 | " speed_cap_mask 0x%x\n", |
9550 | bp->port.link_config, | 9572 | bp->port.link_config, |
9551 | bp->link_params.speed_cap_mask); | 9573 | bp->link_params.speed_cap_mask); |
9552 | return; | 9574 | return; |
9553 | } | 9575 | } |
9554 | break; | 9576 | break; |
@@ -9561,19 +9583,19 @@ static void __devinit bnx2x_link_settings_requested(struct bnx2x *bp) | |||
9561 | bp->port.advertising = (ADVERTISED_10000baseT_Full | | 9583 | bp->port.advertising = (ADVERTISED_10000baseT_Full | |
9562 | ADVERTISED_FIBRE); | 9584 | ADVERTISED_FIBRE); |
9563 | } else { | 9585 | } else { |
9564 | BNX2X_ERR("NVRAM config error. " | 9586 | BNX2X_ERROR("NVRAM config error. " |
9565 | "Invalid link_config 0x%x" | 9587 | "Invalid link_config 0x%x" |
9566 | " speed_cap_mask 0x%x\n", | 9588 | " speed_cap_mask 0x%x\n", |
9567 | bp->port.link_config, | 9589 | bp->port.link_config, |
9568 | bp->link_params.speed_cap_mask); | 9590 | bp->link_params.speed_cap_mask); |
9569 | return; | 9591 | return; |
9570 | } | 9592 | } |
9571 | break; | 9593 | break; |
9572 | 9594 | ||
9573 | default: | 9595 | default: |
9574 | BNX2X_ERR("NVRAM config error. " | 9596 | BNX2X_ERROR("NVRAM config error. " |
9575 | "BAD link speed link_config 0x%x\n", | 9597 | "BAD link speed link_config 0x%x\n", |
9576 | bp->port.link_config); | 9598 | bp->port.link_config); |
9577 | bp->link_params.req_line_speed = SPEED_AUTO_NEG; | 9599 | bp->link_params.req_line_speed = SPEED_AUTO_NEG; |
9578 | bp->port.advertising = bp->port.supported; | 9600 | bp->port.advertising = bp->port.supported; |
9579 | break; | 9601 | break; |
@@ -9723,14 +9745,14 @@ static int __devinit bnx2x_get_hwinfo(struct bnx2x *bp) | |||
9723 | "(0x%04x)\n", | 9745 | "(0x%04x)\n", |
9724 | func, bp->e1hov, bp->e1hov); | 9746 | func, bp->e1hov, bp->e1hov); |
9725 | } else { | 9747 | } else { |
9726 | BNX2X_ERR("!!! No valid E1HOV for func %d," | 9748 | BNX2X_ERROR("No valid E1HOV for func %d," |
9727 | " aborting\n", func); | 9749 | " aborting\n", func); |
9728 | rc = -EPERM; | 9750 | rc = -EPERM; |
9729 | } | 9751 | } |
9730 | } else { | 9752 | } else { |
9731 | if (BP_E1HVN(bp)) { | 9753 | if (BP_E1HVN(bp)) { |
9732 | BNX2X_ERR("!!! VN %d in single function mode," | 9754 | BNX2X_ERROR("VN %d in single function mode," |
9733 | " aborting\n", BP_E1HVN(bp)); | 9755 | " aborting\n", BP_E1HVN(bp)); |
9734 | rc = -EPERM; | 9756 | rc = -EPERM; |
9735 | } | 9757 | } |
9736 | } | 9758 | } |
@@ -9766,7 +9788,7 @@ static int __devinit bnx2x_get_hwinfo(struct bnx2x *bp) | |||
9766 | 9788 | ||
9767 | if (BP_NOMCP(bp)) { | 9789 | if (BP_NOMCP(bp)) { |
9768 | /* only supposed to happen on emulation/FPGA */ | 9790 | /* only supposed to happen on emulation/FPGA */ |
9769 | BNX2X_ERR("warning random MAC workaround active\n"); | 9791 | BNX2X_ERROR("warning: random MAC workaround active\n"); |
9770 | random_ether_addr(bp->dev->dev_addr); | 9792 | random_ether_addr(bp->dev->dev_addr); |
9771 | memcpy(bp->dev->perm_addr, bp->dev->dev_addr, ETH_ALEN); | 9793 | memcpy(bp->dev->perm_addr, bp->dev->dev_addr, ETH_ALEN); |
9772 | } | 9794 | } |
@@ -9865,15 +9887,17 @@ static int __devinit bnx2x_init_bp(struct bnx2x *bp) | |||
9865 | bnx2x_undi_unload(bp); | 9887 | bnx2x_undi_unload(bp); |
9866 | 9888 | ||
9867 | if (CHIP_REV_IS_FPGA(bp)) | 9889 | if (CHIP_REV_IS_FPGA(bp)) |
9868 | pr_err("FPGA detected\n"); | 9890 | dev_err(&bp->pdev->dev, "FPGA detected\n"); |
9869 | 9891 | ||
9870 | if (BP_NOMCP(bp) && (func == 0)) | 9892 | if (BP_NOMCP(bp) && (func == 0)) |
9871 | pr_err("MCP disabled, must load devices in order!\n"); | 9893 | dev_err(&bp->pdev->dev, "MCP disabled, " |
9894 | "must load devices in order!\n"); | ||
9872 | 9895 | ||
9873 | /* Set multi queue mode */ | 9896 | /* Set multi queue mode */ |
9874 | if ((multi_mode != ETH_RSS_MODE_DISABLED) && | 9897 | if ((multi_mode != ETH_RSS_MODE_DISABLED) && |
9875 | ((int_mode == INT_MODE_INTx) || (int_mode == INT_MODE_MSI))) { | 9898 | ((int_mode == INT_MODE_INTx) || (int_mode == INT_MODE_MSI))) { |
9876 | pr_err("Multi disabled since int_mode requested is not MSI-X\n"); | 9899 | dev_err(&bp->pdev->dev, "Multi disabled since int_mode " |
9900 | "requested is not MSI-X\n"); | ||
9877 | multi_mode = ETH_RSS_MODE_DISABLED; | 9901 | multi_mode = ETH_RSS_MODE_DISABLED; |
9878 | } | 9902 | } |
9879 | bp->multi_mode = multi_mode; | 9903 | bp->multi_mode = multi_mode; |
@@ -10790,19 +10814,18 @@ static int bnx2x_get_coalesce(struct net_device *dev, | |||
10790 | return 0; | 10814 | return 0; |
10791 | } | 10815 | } |
10792 | 10816 | ||
10793 | #define BNX2X_MAX_COALES_TOUT (0xf0*12) /* Maximal coalescing timeout in us */ | ||
10794 | static int bnx2x_set_coalesce(struct net_device *dev, | 10817 | static int bnx2x_set_coalesce(struct net_device *dev, |
10795 | struct ethtool_coalesce *coal) | 10818 | struct ethtool_coalesce *coal) |
10796 | { | 10819 | { |
10797 | struct bnx2x *bp = netdev_priv(dev); | 10820 | struct bnx2x *bp = netdev_priv(dev); |
10798 | 10821 | ||
10799 | bp->rx_ticks = (u16) coal->rx_coalesce_usecs; | 10822 | bp->rx_ticks = (u16)coal->rx_coalesce_usecs; |
10800 | if (bp->rx_ticks > BNX2X_MAX_COALES_TOUT) | 10823 | if (bp->rx_ticks > BNX2X_MAX_COALESCE_TOUT) |
10801 | bp->rx_ticks = BNX2X_MAX_COALES_TOUT; | 10824 | bp->rx_ticks = BNX2X_MAX_COALESCE_TOUT; |
10802 | 10825 | ||
10803 | bp->tx_ticks = (u16) coal->tx_coalesce_usecs; | 10826 | bp->tx_ticks = (u16)coal->tx_coalesce_usecs; |
10804 | if (bp->tx_ticks > BNX2X_MAX_COALES_TOUT) | 10827 | if (bp->tx_ticks > BNX2X_MAX_COALESCE_TOUT) |
10805 | bp->tx_ticks = BNX2X_MAX_COALES_TOUT; | 10828 | bp->tx_ticks = BNX2X_MAX_COALESCE_TOUT; |
10806 | 10829 | ||
10807 | if (netif_running(dev)) | 10830 | if (netif_running(dev)) |
10808 | bnx2x_update_coalesce(bp); | 10831 | bnx2x_update_coalesce(bp); |
@@ -11013,9 +11036,9 @@ static int bnx2x_test_registers(struct bnx2x *bp) | |||
11013 | u32 wr_val = 0; | 11036 | u32 wr_val = 0; |
11014 | int port = BP_PORT(bp); | 11037 | int port = BP_PORT(bp); |
11015 | static const struct { | 11038 | static const struct { |
11016 | u32 offset0; | 11039 | u32 offset0; |
11017 | u32 offset1; | 11040 | u32 offset1; |
11018 | u32 mask; | 11041 | u32 mask; |
11019 | } reg_tbl[] = { | 11042 | } reg_tbl[] = { |
11020 | /* 0 */ { BRB1_REG_PAUSE_LOW_THRESHOLD_0, 4, 0x000003ff }, | 11043 | /* 0 */ { BRB1_REG_PAUSE_LOW_THRESHOLD_0, 4, 0x000003ff }, |
11021 | { DORQ_REG_DB_ADDR0, 4, 0xffffffff }, | 11044 | { DORQ_REG_DB_ADDR0, 4, 0xffffffff }, |
@@ -11088,9 +11111,13 @@ static int bnx2x_test_registers(struct bnx2x *bp) | |||
11088 | /* Restore the original register's value */ | 11111 | /* Restore the original register's value */ |
11089 | REG_WR(bp, offset, save_val); | 11112 | REG_WR(bp, offset, save_val); |
11090 | 11113 | ||
11091 | /* verify that value is as expected value */ | 11114 | /* verify value is as expected */ |
11092 | if ((val & mask) != (wr_val & mask)) | 11115 | if ((val & mask) != (wr_val & mask)) { |
11116 | DP(NETIF_MSG_PROBE, | ||
11117 | "offset 0x%x: val 0x%x != 0x%x mask 0x%x\n", | ||
11118 | offset, val, wr_val, mask); | ||
11093 | goto test_reg_exit; | 11119 | goto test_reg_exit; |
11120 | } | ||
11094 | } | 11121 | } |
11095 | } | 11122 | } |
11096 | 11123 | ||
@@ -11639,7 +11666,7 @@ static int bnx2x_get_sset_count(struct net_device *dev, int stringset) | |||
11639 | struct bnx2x *bp = netdev_priv(dev); | 11666 | struct bnx2x *bp = netdev_priv(dev); |
11640 | int i, num_stats; | 11667 | int i, num_stats; |
11641 | 11668 | ||
11642 | switch(stringset) { | 11669 | switch (stringset) { |
11643 | case ETH_SS_STATS: | 11670 | case ETH_SS_STATS: |
11644 | if (is_multi(bp)) { | 11671 | if (is_multi(bp)) { |
11645 | num_stats = BNX2X_NUM_Q_STATS * bp->num_queues; | 11672 | num_stats = BNX2X_NUM_Q_STATS * bp->num_queues; |
@@ -12804,18 +12831,21 @@ static int __devinit bnx2x_init_dev(struct pci_dev *pdev, | |||
12804 | 12831 | ||
12805 | rc = pci_enable_device(pdev); | 12832 | rc = pci_enable_device(pdev); |
12806 | if (rc) { | 12833 | if (rc) { |
12807 | pr_err("Cannot enable PCI device, aborting\n"); | 12834 | dev_err(&bp->pdev->dev, |
12835 | "Cannot enable PCI device, aborting\n"); | ||
12808 | goto err_out; | 12836 | goto err_out; |
12809 | } | 12837 | } |
12810 | 12838 | ||
12811 | if (!(pci_resource_flags(pdev, 0) & IORESOURCE_MEM)) { | 12839 | if (!(pci_resource_flags(pdev, 0) & IORESOURCE_MEM)) { |
12812 | pr_err("Cannot find PCI device base address, aborting\n"); | 12840 | dev_err(&bp->pdev->dev, |
12841 | "Cannot find PCI device base address, aborting\n"); | ||
12813 | rc = -ENODEV; | 12842 | rc = -ENODEV; |
12814 | goto err_out_disable; | 12843 | goto err_out_disable; |
12815 | } | 12844 | } |
12816 | 12845 | ||
12817 | if (!(pci_resource_flags(pdev, 2) & IORESOURCE_MEM)) { | 12846 | if (!(pci_resource_flags(pdev, 2) & IORESOURCE_MEM)) { |
12818 | pr_err("Cannot find second PCI device base address, aborting\n"); | 12847 | dev_err(&bp->pdev->dev, "Cannot find second PCI device" |
12848 | " base address, aborting\n"); | ||
12819 | rc = -ENODEV; | 12849 | rc = -ENODEV; |
12820 | goto err_out_disable; | 12850 | goto err_out_disable; |
12821 | } | 12851 | } |
@@ -12823,7 +12853,8 @@ static int __devinit bnx2x_init_dev(struct pci_dev *pdev, | |||
12823 | if (atomic_read(&pdev->enable_cnt) == 1) { | 12853 | if (atomic_read(&pdev->enable_cnt) == 1) { |
12824 | rc = pci_request_regions(pdev, DRV_MODULE_NAME); | 12854 | rc = pci_request_regions(pdev, DRV_MODULE_NAME); |
12825 | if (rc) { | 12855 | if (rc) { |
12826 | pr_err("Cannot obtain PCI resources, aborting\n"); | 12856 | dev_err(&bp->pdev->dev, |
12857 | "Cannot obtain PCI resources, aborting\n"); | ||
12827 | goto err_out_disable; | 12858 | goto err_out_disable; |
12828 | } | 12859 | } |
12829 | 12860 | ||
@@ -12833,14 +12864,16 @@ static int __devinit bnx2x_init_dev(struct pci_dev *pdev, | |||
12833 | 12864 | ||
12834 | bp->pm_cap = pci_find_capability(pdev, PCI_CAP_ID_PM); | 12865 | bp->pm_cap = pci_find_capability(pdev, PCI_CAP_ID_PM); |
12835 | if (bp->pm_cap == 0) { | 12866 | if (bp->pm_cap == 0) { |
12836 | pr_err("Cannot find power management capability, aborting\n"); | 12867 | dev_err(&bp->pdev->dev, |
12868 | "Cannot find power management capability, aborting\n"); | ||
12837 | rc = -EIO; | 12869 | rc = -EIO; |
12838 | goto err_out_release; | 12870 | goto err_out_release; |
12839 | } | 12871 | } |
12840 | 12872 | ||
12841 | bp->pcie_cap = pci_find_capability(pdev, PCI_CAP_ID_EXP); | 12873 | bp->pcie_cap = pci_find_capability(pdev, PCI_CAP_ID_EXP); |
12842 | if (bp->pcie_cap == 0) { | 12874 | if (bp->pcie_cap == 0) { |
12843 | pr_err("Cannot find PCI Express capability, aborting\n"); | 12875 | dev_err(&bp->pdev->dev, |
12876 | "Cannot find PCI Express capability, aborting\n"); | ||
12844 | rc = -EIO; | 12877 | rc = -EIO; |
12845 | goto err_out_release; | 12878 | goto err_out_release; |
12846 | } | 12879 | } |
@@ -12848,13 +12881,15 @@ static int __devinit bnx2x_init_dev(struct pci_dev *pdev, | |||
12848 | if (dma_set_mask(&pdev->dev, DMA_BIT_MASK(64)) == 0) { | 12881 | if (dma_set_mask(&pdev->dev, DMA_BIT_MASK(64)) == 0) { |
12849 | bp->flags |= USING_DAC_FLAG; | 12882 | bp->flags |= USING_DAC_FLAG; |
12850 | if (dma_set_coherent_mask(&pdev->dev, DMA_BIT_MASK(64)) != 0) { | 12883 | if (dma_set_coherent_mask(&pdev->dev, DMA_BIT_MASK(64)) != 0) { |
12851 | pr_err("dma_set_coherent_mask failed, aborting\n"); | 12884 | dev_err(&bp->pdev->dev, "dma_set_coherent_mask" |
12885 | " failed, aborting\n"); | ||
12852 | rc = -EIO; | 12886 | rc = -EIO; |
12853 | goto err_out_release; | 12887 | goto err_out_release; |
12854 | } | 12888 | } |
12855 | 12889 | ||
12856 | } else if (dma_set_mask(&pdev->dev, DMA_BIT_MASK(32)) != 0) { | 12890 | } else if (dma_set_mask(&pdev->dev, DMA_BIT_MASK(32)) != 0) { |
12857 | pr_err("System does not support DMA, aborting\n"); | 12891 | dev_err(&bp->pdev->dev, |
12892 | "System does not support DMA, aborting\n"); | ||
12858 | rc = -EIO; | 12893 | rc = -EIO; |
12859 | goto err_out_release; | 12894 | goto err_out_release; |
12860 | } | 12895 | } |
@@ -12867,7 +12902,8 @@ static int __devinit bnx2x_init_dev(struct pci_dev *pdev, | |||
12867 | 12902 | ||
12868 | bp->regview = pci_ioremap_bar(pdev, 0); | 12903 | bp->regview = pci_ioremap_bar(pdev, 0); |
12869 | if (!bp->regview) { | 12904 | if (!bp->regview) { |
12870 | pr_err("Cannot map register space, aborting\n"); | 12905 | dev_err(&bp->pdev->dev, |
12906 | "Cannot map register space, aborting\n"); | ||
12871 | rc = -ENOMEM; | 12907 | rc = -ENOMEM; |
12872 | goto err_out_release; | 12908 | goto err_out_release; |
12873 | } | 12909 | } |
@@ -12876,7 +12912,8 @@ static int __devinit bnx2x_init_dev(struct pci_dev *pdev, | |||
12876 | min_t(u64, BNX2X_DB_SIZE, | 12912 | min_t(u64, BNX2X_DB_SIZE, |
12877 | pci_resource_len(pdev, 2))); | 12913 | pci_resource_len(pdev, 2))); |
12878 | if (!bp->doorbells) { | 12914 | if (!bp->doorbells) { |
12879 | pr_err("Cannot map doorbell space, aborting\n"); | 12915 | dev_err(&bp->pdev->dev, |
12916 | "Cannot map doorbell space, aborting\n"); | ||
12880 | rc = -ENOMEM; | 12917 | rc = -ENOMEM; |
12881 | goto err_out_unmap; | 12918 | goto err_out_unmap; |
12882 | } | 12919 | } |
@@ -12981,7 +13018,8 @@ static int __devinit bnx2x_check_firmware(struct bnx2x *bp) | |||
12981 | offset = be32_to_cpu(sections[i].offset); | 13018 | offset = be32_to_cpu(sections[i].offset); |
12982 | len = be32_to_cpu(sections[i].len); | 13019 | len = be32_to_cpu(sections[i].len); |
12983 | if (offset + len > firmware->size) { | 13020 | if (offset + len > firmware->size) { |
12984 | pr_err("Section %d length is out of bounds\n", i); | 13021 | dev_err(&bp->pdev->dev, |
13022 | "Section %d length is out of bounds\n", i); | ||
12985 | return -EINVAL; | 13023 | return -EINVAL; |
12986 | } | 13024 | } |
12987 | } | 13025 | } |
@@ -12993,7 +13031,8 @@ static int __devinit bnx2x_check_firmware(struct bnx2x *bp) | |||
12993 | 13031 | ||
12994 | for (i = 0; i < be32_to_cpu(fw_hdr->init_ops_offsets.len) / 2; i++) { | 13032 | for (i = 0; i < be32_to_cpu(fw_hdr->init_ops_offsets.len) / 2; i++) { |
12995 | if (be16_to_cpu(ops_offsets[i]) > num_ops) { | 13033 | if (be16_to_cpu(ops_offsets[i]) > num_ops) { |
12996 | pr_err("Section offset %d is out of bounds\n", i); | 13034 | dev_err(&bp->pdev->dev, |
13035 | "Section offset %d is out of bounds\n", i); | ||
12997 | return -EINVAL; | 13036 | return -EINVAL; |
12998 | } | 13037 | } |
12999 | } | 13038 | } |
@@ -13005,7 +13044,8 @@ static int __devinit bnx2x_check_firmware(struct bnx2x *bp) | |||
13005 | (fw_ver[1] != BCM_5710_FW_MINOR_VERSION) || | 13044 | (fw_ver[1] != BCM_5710_FW_MINOR_VERSION) || |
13006 | (fw_ver[2] != BCM_5710_FW_REVISION_VERSION) || | 13045 | (fw_ver[2] != BCM_5710_FW_REVISION_VERSION) || |
13007 | (fw_ver[3] != BCM_5710_FW_ENGINEERING_VERSION)) { | 13046 | (fw_ver[3] != BCM_5710_FW_ENGINEERING_VERSION)) { |
13008 | pr_err("Bad FW version:%d.%d.%d.%d. Should be %d.%d.%d.%d\n", | 13047 | dev_err(&bp->pdev->dev, |
13048 | "Bad FW version:%d.%d.%d.%d. Should be %d.%d.%d.%d\n", | ||
13009 | fw_ver[0], fw_ver[1], fw_ver[2], | 13049 | fw_ver[0], fw_ver[1], fw_ver[2], |
13010 | fw_ver[3], BCM_5710_FW_MAJOR_VERSION, | 13050 | fw_ver[3], BCM_5710_FW_MAJOR_VERSION, |
13011 | BCM_5710_FW_MINOR_VERSION, | 13051 | BCM_5710_FW_MINOR_VERSION, |
@@ -13040,8 +13080,8 @@ static inline void bnx2x_prep_ops(const u8 *_source, u8 *_target, u32 n) | |||
13040 | for (i = 0, j = 0; i < n/8; i++, j += 2) { | 13080 | for (i = 0, j = 0; i < n/8; i++, j += 2) { |
13041 | tmp = be32_to_cpu(source[j]); | 13081 | tmp = be32_to_cpu(source[j]); |
13042 | target[i].op = (tmp >> 24) & 0xff; | 13082 | target[i].op = (tmp >> 24) & 0xff; |
13043 | target[i].offset = tmp & 0xffffff; | 13083 | target[i].offset = tmp & 0xffffff; |
13044 | target[i].raw_data = be32_to_cpu(source[j+1]); | 13084 | target[i].raw_data = be32_to_cpu(source[j + 1]); |
13045 | } | 13085 | } |
13046 | } | 13086 | } |
13047 | 13087 | ||
@@ -13075,20 +13115,24 @@ static int __devinit bnx2x_init_firmware(struct bnx2x *bp, struct device *dev) | |||
13075 | 13115 | ||
13076 | if (CHIP_IS_E1(bp)) | 13116 | if (CHIP_IS_E1(bp)) |
13077 | fw_file_name = FW_FILE_NAME_E1; | 13117 | fw_file_name = FW_FILE_NAME_E1; |
13078 | else | 13118 | else if (CHIP_IS_E1H(bp)) |
13079 | fw_file_name = FW_FILE_NAME_E1H; | 13119 | fw_file_name = FW_FILE_NAME_E1H; |
13120 | else { | ||
13121 | dev_err(dev, "Unsupported chip revision\n"); | ||
13122 | return -EINVAL; | ||
13123 | } | ||
13080 | 13124 | ||
13081 | pr_info("Loading %s\n", fw_file_name); | 13125 | dev_info(dev, "Loading %s\n", fw_file_name); |
13082 | 13126 | ||
13083 | rc = request_firmware(&bp->firmware, fw_file_name, dev); | 13127 | rc = request_firmware(&bp->firmware, fw_file_name, dev); |
13084 | if (rc) { | 13128 | if (rc) { |
13085 | pr_err("Can't load firmware file %s\n", fw_file_name); | 13129 | dev_err(dev, "Can't load firmware file %s\n", fw_file_name); |
13086 | goto request_firmware_exit; | 13130 | goto request_firmware_exit; |
13087 | } | 13131 | } |
13088 | 13132 | ||
13089 | rc = bnx2x_check_firmware(bp); | 13133 | rc = bnx2x_check_firmware(bp); |
13090 | if (rc) { | 13134 | if (rc) { |
13091 | pr_err("Corrupt firmware file %s\n", fw_file_name); | 13135 | dev_err(dev, "Corrupt firmware file %s\n", fw_file_name); |
13092 | goto request_firmware_exit; | 13136 | goto request_firmware_exit; |
13093 | } | 13137 | } |
13094 | 13138 | ||
@@ -13147,7 +13191,7 @@ static int __devinit bnx2x_init_one(struct pci_dev *pdev, | |||
13147 | /* dev zeroed in init_etherdev */ | 13191 | /* dev zeroed in init_etherdev */ |
13148 | dev = alloc_etherdev_mq(sizeof(*bp), MAX_CONTEXT); | 13192 | dev = alloc_etherdev_mq(sizeof(*bp), MAX_CONTEXT); |
13149 | if (!dev) { | 13193 | if (!dev) { |
13150 | pr_err("Cannot allocate net device\n"); | 13194 | dev_err(&pdev->dev, "Cannot allocate net device\n"); |
13151 | return -ENOMEM; | 13195 | return -ENOMEM; |
13152 | } | 13196 | } |
13153 | 13197 | ||
@@ -13169,7 +13213,7 @@ static int __devinit bnx2x_init_one(struct pci_dev *pdev, | |||
13169 | /* Set init arrays */ | 13213 | /* Set init arrays */ |
13170 | rc = bnx2x_init_firmware(bp, &pdev->dev); | 13214 | rc = bnx2x_init_firmware(bp, &pdev->dev); |
13171 | if (rc) { | 13215 | if (rc) { |
13172 | pr_err("Error loading firmware\n"); | 13216 | dev_err(&pdev->dev, "Error loading firmware\n"); |
13173 | goto init_one_exit; | 13217 | goto init_one_exit; |
13174 | } | 13218 | } |
13175 | 13219 | ||
@@ -13180,11 +13224,12 @@ static int __devinit bnx2x_init_one(struct pci_dev *pdev, | |||
13180 | } | 13224 | } |
13181 | 13225 | ||
13182 | bnx2x_get_pcie_width_speed(bp, &pcie_width, &pcie_speed); | 13226 | bnx2x_get_pcie_width_speed(bp, &pcie_width, &pcie_speed); |
13183 | netdev_info(dev, "%s (%c%d) PCI-E x%d %s found at mem %lx, IRQ %d, node addr %pM\n", | 13227 | netdev_info(dev, "%s (%c%d) PCI-E x%d %s found at mem %lx," |
13184 | board_info[ent->driver_data].name, | 13228 | " IRQ %d, ", board_info[ent->driver_data].name, |
13185 | (CHIP_REV(bp) >> 12) + 'A', (CHIP_METAL(bp) >> 4), | 13229 | (CHIP_REV(bp) >> 12) + 'A', (CHIP_METAL(bp) >> 4), |
13186 | pcie_width, (pcie_speed == 2) ? "5GHz (Gen2)" : "2.5GHz", | 13230 | pcie_width, (pcie_speed == 2) ? "5GHz (Gen2)" : "2.5GHz", |
13187 | dev->base_addr, bp->pdev->irq, dev->dev_addr); | 13231 | dev->base_addr, bp->pdev->irq); |
13232 | pr_cont("node addr %pM\n", dev->dev_addr); | ||
13188 | 13233 | ||
13189 | return 0; | 13234 | return 0; |
13190 | 13235 | ||
@@ -13212,7 +13257,7 @@ static void __devexit bnx2x_remove_one(struct pci_dev *pdev) | |||
13212 | struct bnx2x *bp; | 13257 | struct bnx2x *bp; |
13213 | 13258 | ||
13214 | if (!dev) { | 13259 | if (!dev) { |
13215 | pr_err("BAD net device from bnx2x_init_one\n"); | 13260 | dev_err(&pdev->dev, "BAD net device from bnx2x_init_one\n"); |
13216 | return; | 13261 | return; |
13217 | } | 13262 | } |
13218 | bp = netdev_priv(dev); | 13263 | bp = netdev_priv(dev); |
@@ -13248,7 +13293,7 @@ static int bnx2x_suspend(struct pci_dev *pdev, pm_message_t state) | |||
13248 | struct bnx2x *bp; | 13293 | struct bnx2x *bp; |
13249 | 13294 | ||
13250 | if (!dev) { | 13295 | if (!dev) { |
13251 | pr_err("BAD net device from bnx2x_init_one\n"); | 13296 | dev_err(&pdev->dev, "BAD net device from bnx2x_init_one\n"); |
13252 | return -ENODEV; | 13297 | return -ENODEV; |
13253 | } | 13298 | } |
13254 | bp = netdev_priv(dev); | 13299 | bp = netdev_priv(dev); |
@@ -13280,7 +13325,7 @@ static int bnx2x_resume(struct pci_dev *pdev) | |||
13280 | int rc; | 13325 | int rc; |
13281 | 13326 | ||
13282 | if (!dev) { | 13327 | if (!dev) { |
13283 | pr_err("BAD net device from bnx2x_init_one\n"); | 13328 | dev_err(&pdev->dev, "BAD net device from bnx2x_init_one\n"); |
13284 | return -ENODEV; | 13329 | return -ENODEV; |
13285 | } | 13330 | } |
13286 | bp = netdev_priv(dev); | 13331 | bp = netdev_priv(dev); |