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authorEilon Greenstein <eilong@broadcom.com>2009-02-12 03:37:14 -0500
committerDavid S. Miller <davem@davemloft.net>2009-02-16 02:31:41 -0500
commitc2c8b03e200bdda3ba23d27f5c33bac784dced01 (patch)
treec15811bb47f3790e106660e5919cb690f288f3af /drivers/net/bnx2x_main.c
parented8680a7e68fc07d6b2bfa977e8f5f3d3c568d14 (diff)
bnx2x: Pre emphasis configuration
Supporting non-default pre-emphasis settings for the internal and some external PHYs Signed-off-by: Yaniv Rosner <yanivr@broadcom.com> Signed-off-by: Eilon Greenstein <eilong@broadcom.com> Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers/net/bnx2x_main.c')
-rw-r--r--drivers/net/bnx2x_main.c31
1 files changed, 25 insertions, 6 deletions
diff --git a/drivers/net/bnx2x_main.c b/drivers/net/bnx2x_main.c
index 0d2d5564f255..60a4e94e6840 100644
--- a/drivers/net/bnx2x_main.c
+++ b/drivers/net/bnx2x_main.c
@@ -7550,6 +7550,15 @@ static void __devinit bnx2x_get_common_hwinfo(struct bnx2x *bp)
7550 SHARED_HW_CFG_LED_MODE_MASK) >> 7550 SHARED_HW_CFG_LED_MODE_MASK) >>
7551 SHARED_HW_CFG_LED_MODE_SHIFT); 7551 SHARED_HW_CFG_LED_MODE_SHIFT);
7552 7552
7553 bp->link_params.feature_config_flags = 0;
7554 val = SHMEM_RD(bp, dev_info.shared_feature_config.config);
7555 if (val & SHARED_FEAT_CFG_OVERRIDE_PREEMPHASIS_CFG_ENABLED)
7556 bp->link_params.feature_config_flags |=
7557 FEATURE_CONFIG_OVERRIDE_PREEMPHASIS_ENABLED;
7558 else
7559 bp->link_params.feature_config_flags &=
7560 ~FEATURE_CONFIG_OVERRIDE_PREEMPHASIS_ENABLED;
7561
7553 val = SHMEM_RD(bp, dev_info.bc_rev) >> 8; 7562 val = SHMEM_RD(bp, dev_info.bc_rev) >> 8;
7554 bp->common.bc_ver = val; 7563 bp->common.bc_ver = val;
7555 BNX2X_DEV_INFO("bc_ver %X\n", val); 7564 BNX2X_DEV_INFO("bc_ver %X\n", val);
@@ -7972,12 +7981,11 @@ static void __devinit bnx2x_get_port_hwinfo(struct bnx2x *bp)
7972 int port = BP_PORT(bp); 7981 int port = BP_PORT(bp);
7973 u32 val, val2; 7982 u32 val, val2;
7974 u32 config; 7983 u32 config;
7984 u16 i;
7975 7985
7976 bp->link_params.bp = bp; 7986 bp->link_params.bp = bp;
7977 bp->link_params.port = port; 7987 bp->link_params.port = port;
7978 7988
7979 bp->link_params.serdes_config =
7980 SHMEM_RD(bp, dev_info.port_hw_config[port].serdes_config);
7981 bp->link_params.lane_config = 7989 bp->link_params.lane_config =
7982 SHMEM_RD(bp, dev_info.port_hw_config[port].lane_config); 7990 SHMEM_RD(bp, dev_info.port_hw_config[port].lane_config);
7983 bp->link_params.ext_phy_config = 7991 bp->link_params.ext_phy_config =
@@ -7990,6 +7998,19 @@ static void __devinit bnx2x_get_port_hwinfo(struct bnx2x *bp)
7990 bp->port.link_config = 7998 bp->port.link_config =
7991 SHMEM_RD(bp, dev_info.port_feature_config[port].link_config); 7999 SHMEM_RD(bp, dev_info.port_feature_config[port].link_config);
7992 8000
8001 /* Get the 4 lanes xgxs config rx and tx */
8002 for (i = 0; i < 2; i++) {
8003 val = SHMEM_RD(bp,
8004 dev_info.port_hw_config[port].xgxs_config_rx[i<<1]);
8005 bp->link_params.xgxs_config_rx[i << 1] = ((val>>16) & 0xffff);
8006 bp->link_params.xgxs_config_rx[(i << 1) + 1] = (val & 0xffff);
8007
8008 val = SHMEM_RD(bp,
8009 dev_info.port_hw_config[port].xgxs_config_tx[i<<1]);
8010 bp->link_params.xgxs_config_tx[i << 1] = ((val>>16) & 0xffff);
8011 bp->link_params.xgxs_config_tx[(i << 1) + 1] = (val & 0xffff);
8012 }
8013
7993 config = SHMEM_RD(bp, dev_info.port_feature_config[port].config); 8014 config = SHMEM_RD(bp, dev_info.port_feature_config[port].config);
7994 if (config & PORT_FEAT_CFG_OPT_MDL_ENFRCMNT_ENABLED) 8015 if (config & PORT_FEAT_CFG_OPT_MDL_ENFRCMNT_ENABLED)
7995 bp->link_params.feature_config_flags |= 8016 bp->link_params.feature_config_flags |=
@@ -7998,10 +8019,8 @@ static void __devinit bnx2x_get_port_hwinfo(struct bnx2x *bp)
7998 bp->link_params.feature_config_flags &= 8019 bp->link_params.feature_config_flags &=
7999 ~FEATURE_CONFIG_MODULE_ENFORCMENT_ENABLED; 8020 ~FEATURE_CONFIG_MODULE_ENFORCMENT_ENABLED;
8000 8021
8001 BNX2X_DEV_INFO("serdes_config 0x%08x lane_config 0x%08x\n" 8022 BNX2X_DEV_INFO("lane_config 0x%08x ext_phy_config 0x%08x"
8002 KERN_INFO " ext_phy_config 0x%08x speed_cap_mask 0x%08x" 8023 " speed_cap_mask 0x%08x link_config 0x%08x\n",
8003 " link_config 0x%08x\n",
8004 bp->link_params.serdes_config,
8005 bp->link_params.lane_config, 8024 bp->link_params.lane_config,
8006 bp->link_params.ext_phy_config, 8025 bp->link_params.ext_phy_config,
8007 bp->link_params.speed_cap_mask, bp->port.link_config); 8026 bp->link_params.speed_cap_mask, bp->port.link_config);