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authorEilon Greenstein <eilong@broadcom.com>2009-02-12 03:36:40 -0500
committerDavid S. Miller <davem@davemloft.net>2009-02-16 02:31:14 -0500
commit8a1c38d17d88c8df3dcbea1c01a390ab2087f8ad (patch)
tree786527b3f4b3b7af13380fdc752f00898ebddf44 /drivers/net/bnx2x_main.c
parent748e543974eec6afb1f55f8430781150d0da8b0a (diff)
bnx2x: BW shaper enhancements
Some of the configuration can be set when loading the device and shouldn't be re-calculated after each link up indication since it is not dependent on the link speed Signed-off-by: Eilon Greenstein <eilong@broadcom.com> Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers/net/bnx2x_main.c')
-rw-r--r--drivers/net/bnx2x_main.c314
1 files changed, 136 insertions, 178 deletions
diff --git a/drivers/net/bnx2x_main.c b/drivers/net/bnx2x_main.c
index 891a3fb9fcf4..ce55e84c44da 100644
--- a/drivers/net/bnx2x_main.c
+++ b/drivers/net/bnx2x_main.c
@@ -2054,119 +2054,42 @@ static u8 bnx2x_link_test(struct bnx2x *bp)
2054 return rc; 2054 return rc;
2055} 2055}
2056 2056
2057/* Calculates the sum of vn_min_rates. 2057static void bnx2x_init_port_minmax(struct bnx2x *bp)
2058 It's needed for further normalizing of the min_rates.
2059
2060 Returns:
2061 sum of vn_min_rates
2062 or
2063 0 - if all the min_rates are 0.
2064 In the later case fairness algorithm should be deactivated.
2065 If not all min_rates are zero then those that are zeroes will
2066 be set to 1.
2067 */
2068static u32 bnx2x_calc_vn_wsum(struct bnx2x *bp)
2069{ 2058{
2070 int i, port = BP_PORT(bp); 2059 u32 r_param = bp->link_vars.line_speed / 8;
2071 u32 wsum = 0; 2060 u32 fair_periodic_timeout_usec;
2072 int all_zero = 1; 2061 u32 t_fair;
2073 2062
2074 for (i = 0; i < E1HVN_MAX; i++) { 2063 memset(&(bp->cmng.rs_vars), 0,
2075 u32 vn_cfg = 2064 sizeof(struct rate_shaping_vars_per_port));
2076 SHMEM_RD(bp, mf_cfg.func_mf_config[2*i + port].config); 2065 memset(&(bp->cmng.fair_vars), 0, sizeof(struct fairness_vars_per_port));
2077 u32 vn_min_rate = ((vn_cfg & FUNC_MF_CFG_MIN_BW_MASK) >>
2078 FUNC_MF_CFG_MIN_BW_SHIFT) * 100;
2079 if (!(vn_cfg & FUNC_MF_CFG_FUNC_HIDE)) {
2080 /* If min rate is zero - set it to 1 */
2081 if (!vn_min_rate)
2082 vn_min_rate = DEF_MIN_RATE;
2083 else
2084 all_zero = 0;
2085
2086 wsum += vn_min_rate;
2087 }
2088 }
2089 2066
2090 /* ... only if all min rates are zeros - disable FAIRNESS */ 2067 /* 100 usec in SDM ticks = 25 since each tick is 4 usec */
2091 if (all_zero) 2068 bp->cmng.rs_vars.rs_periodic_timeout = RS_PERIODIC_TIMEOUT_USEC / 4;
2092 return 0;
2093
2094 return wsum;
2095}
2096
2097static void bnx2x_init_port_minmax(struct bnx2x *bp,
2098 int en_fness,
2099 u16 port_rate,
2100 struct cmng_struct_per_port *m_cmng_port)
2101{
2102 u32 r_param = port_rate / 8;
2103 int port = BP_PORT(bp);
2104 int i;
2105
2106 memset(m_cmng_port, 0, sizeof(struct cmng_struct_per_port));
2107
2108 /* Enable minmax only if we are in e1hmf mode */
2109 if (IS_E1HMF(bp)) {
2110 u32 fair_periodic_timeout_usec;
2111 u32 t_fair;
2112
2113 /* Enable rate shaping and fairness */
2114 m_cmng_port->flags.cmng_vn_enable = 1;
2115 m_cmng_port->flags.fairness_enable = en_fness ? 1 : 0;
2116 m_cmng_port->flags.rate_shaping_enable = 1;
2117 2069
2118 if (!en_fness) 2070 /* this is the threshold below which no timer arming will occur
2119 DP(NETIF_MSG_IFUP, "All MIN values are zeroes" 2071 1.25 coefficient is for the threshold to be a little bigger
2120 " fairness will be disabled\n"); 2072 than the real time, to compensate for timer in-accuracy */
2121 2073 bp->cmng.rs_vars.rs_threshold =
2122 /* 100 usec in SDM ticks = 25 since each tick is 4 usec */
2123 m_cmng_port->rs_vars.rs_periodic_timeout =
2124 RS_PERIODIC_TIMEOUT_USEC / 4;
2125
2126 /* this is the threshold below which no timer arming will occur
2127 1.25 coefficient is for the threshold to be a little bigger
2128 than the real time, to compensate for timer in-accuracy */
2129 m_cmng_port->rs_vars.rs_threshold =
2130 (RS_PERIODIC_TIMEOUT_USEC * r_param * 5) / 4; 2074 (RS_PERIODIC_TIMEOUT_USEC * r_param * 5) / 4;
2131 2075
2132 /* resolution of fairness timer */ 2076 /* resolution of fairness timer */
2133 fair_periodic_timeout_usec = QM_ARB_BYTES / r_param; 2077 fair_periodic_timeout_usec = QM_ARB_BYTES / r_param;
2134 /* for 10G it is 1000usec. for 1G it is 10000usec. */ 2078 /* for 10G it is 1000usec. for 1G it is 10000usec. */
2135 t_fair = T_FAIR_COEF / port_rate; 2079 t_fair = T_FAIR_COEF / bp->link_vars.line_speed;
2136 2080
2137 /* this is the threshold below which we won't arm 2081 /* this is the threshold below which we won't arm the timer anymore */
2138 the timer anymore */ 2082 bp->cmng.fair_vars.fair_threshold = QM_ARB_BYTES;
2139 m_cmng_port->fair_vars.fair_threshold = QM_ARB_BYTES;
2140
2141 /* we multiply by 1e3/8 to get bytes/msec.
2142 We don't want the credits to pass a credit
2143 of the T_FAIR*FAIR_MEM (algorithm resolution) */
2144 m_cmng_port->fair_vars.upper_bound =
2145 r_param * t_fair * FAIR_MEM;
2146 /* since each tick is 4 usec */
2147 m_cmng_port->fair_vars.fairness_timeout =
2148 fair_periodic_timeout_usec / 4;
2149
2150 } else {
2151 /* Disable rate shaping and fairness */
2152 m_cmng_port->flags.cmng_vn_enable = 0;
2153 m_cmng_port->flags.fairness_enable = 0;
2154 m_cmng_port->flags.rate_shaping_enable = 0;
2155 2083
2156 DP(NETIF_MSG_IFUP, 2084 /* we multiply by 1e3/8 to get bytes/msec.
2157 "Single function mode minmax will be disabled\n"); 2085 We don't want the credits to pass a credit
2158 } 2086 of the t_fair*FAIR_MEM (algorithm resolution) */
2159 2087 bp->cmng.fair_vars.upper_bound = r_param * t_fair * FAIR_MEM;
2160 /* Store it to internal memory */ 2088 /* since each tick is 4 usec */
2161 for (i = 0; i < sizeof(struct cmng_struct_per_port) / 4; i++) 2089 bp->cmng.fair_vars.fairness_timeout = fair_periodic_timeout_usec / 4;
2162 REG_WR(bp, BAR_XSTRORM_INTMEM +
2163 XSTORM_CMNG_PER_PORT_VARS_OFFSET(port) + i * 4,
2164 ((u32 *)(m_cmng_port))[i]);
2165} 2090}
2166 2091
2167static void bnx2x_init_vn_minmax(struct bnx2x *bp, int func, 2092static void bnx2x_init_vn_minmax(struct bnx2x *bp, int func)
2168 u32 wsum, u16 port_rate,
2169 struct cmng_struct_per_port *m_cmng_port)
2170{ 2093{
2171 struct rate_shaping_vars_per_vn m_rs_vn; 2094 struct rate_shaping_vars_per_vn m_rs_vn;
2172 struct fairness_vars_per_vn m_fair_vn; 2095 struct fairness_vars_per_vn m_fair_vn;
@@ -2182,17 +2105,18 @@ static void bnx2x_init_vn_minmax(struct bnx2x *bp, int func,
2182 } else { 2105 } else {
2183 vn_min_rate = ((vn_cfg & FUNC_MF_CFG_MIN_BW_MASK) >> 2106 vn_min_rate = ((vn_cfg & FUNC_MF_CFG_MIN_BW_MASK) >>
2184 FUNC_MF_CFG_MIN_BW_SHIFT) * 100; 2107 FUNC_MF_CFG_MIN_BW_SHIFT) * 100;
2185 /* If FAIRNESS is enabled (not all min rates are zeroes) and 2108 /* If fairness is enabled (not all min rates are zeroes) and
2186 if current min rate is zero - set it to 1. 2109 if current min rate is zero - set it to 1.
2187 This is a requirement of the algorithm. */ 2110 This is a requirement of the algorithm. */
2188 if ((vn_min_rate == 0) && wsum) 2111 if (bp->vn_weight_sum && (vn_min_rate == 0))
2189 vn_min_rate = DEF_MIN_RATE; 2112 vn_min_rate = DEF_MIN_RATE;
2190 vn_max_rate = ((vn_cfg & FUNC_MF_CFG_MAX_BW_MASK) >> 2113 vn_max_rate = ((vn_cfg & FUNC_MF_CFG_MAX_BW_MASK) >>
2191 FUNC_MF_CFG_MAX_BW_SHIFT) * 100; 2114 FUNC_MF_CFG_MAX_BW_SHIFT) * 100;
2192 } 2115 }
2193 2116
2194 DP(NETIF_MSG_IFUP, "func %d: vn_min_rate=%d vn_max_rate=%d " 2117 DP(NETIF_MSG_IFUP,
2195 "wsum=%d\n", func, vn_min_rate, vn_max_rate, wsum); 2118 "func %d: vn_min_rate=%d vn_max_rate=%d vn_weight_sum=%d\n",
2119 func, vn_min_rate, vn_max_rate, bp->vn_weight_sum);
2196 2120
2197 memset(&m_rs_vn, 0, sizeof(struct rate_shaping_vars_per_vn)); 2121 memset(&m_rs_vn, 0, sizeof(struct rate_shaping_vars_per_vn));
2198 memset(&m_fair_vn, 0, sizeof(struct fairness_vars_per_vn)); 2122 memset(&m_fair_vn, 0, sizeof(struct fairness_vars_per_vn));
@@ -2204,55 +2128,20 @@ static void bnx2x_init_vn_minmax(struct bnx2x *bp, int func,
2204 m_rs_vn.vn_counter.quota = 2128 m_rs_vn.vn_counter.quota =
2205 (vn_max_rate * RS_PERIODIC_TIMEOUT_USEC) / 8; 2129 (vn_max_rate * RS_PERIODIC_TIMEOUT_USEC) / 8;
2206 2130
2207#ifdef BNX2X_PER_PROT_QOS 2131 if (bp->vn_weight_sum) {
2208 /* per protocol counter */
2209 for (protocol = 0; protocol < NUM_OF_PROTOCOLS; protocol++) {
2210 /* maximal Mbps for this protocol */
2211 m_rs_vn.protocol_counters[protocol].rate =
2212 protocol_max_rate[protocol];
2213 /* the quota in each timer period -
2214 number of bytes transmitted in this period */
2215 m_rs_vn.protocol_counters[protocol].quota =
2216 (u32)(rs_periodic_timeout_usec *
2217 ((double)m_rs_vn.
2218 protocol_counters[protocol].rate/8));
2219 }
2220#endif
2221
2222 if (wsum) {
2223 /* credit for each period of the fairness algorithm: 2132 /* credit for each period of the fairness algorithm:
2224 number of bytes in T_FAIR (the vn share the port rate). 2133 number of bytes in T_FAIR (the vn share the port rate).
2225 wsum should not be larger than 10000, thus 2134 vn_weight_sum should not be larger than 10000, thus
2226 T_FAIR_COEF / (8 * wsum) will always be grater than zero */ 2135 T_FAIR_COEF / (8 * vn_weight_sum) will always be greater
2136 than zero */
2227 m_fair_vn.vn_credit_delta = 2137 m_fair_vn.vn_credit_delta =
2228 max((u64)(vn_min_rate * (T_FAIR_COEF / (8 * wsum))), 2138 max((u32)(vn_min_rate * (T_FAIR_COEF /
2229 (u64)(m_cmng_port->fair_vars.fair_threshold * 2)); 2139 (8 * bp->vn_weight_sum))),
2140 (u32)(bp->cmng.fair_vars.fair_threshold * 2));
2230 DP(NETIF_MSG_IFUP, "m_fair_vn.vn_credit_delta=%d\n", 2141 DP(NETIF_MSG_IFUP, "m_fair_vn.vn_credit_delta=%d\n",
2231 m_fair_vn.vn_credit_delta); 2142 m_fair_vn.vn_credit_delta);
2232 } 2143 }
2233 2144
2234#ifdef BNX2X_PER_PROT_QOS
2235 do {
2236 u32 protocolWeightSum = 0;
2237
2238 for (protocol = 0; protocol < NUM_OF_PROTOCOLS; protocol++)
2239 protocolWeightSum +=
2240 drvInit.protocol_min_rate[protocol];
2241 /* per protocol counter -
2242 NOT NEEDED IF NO PER-PROTOCOL CONGESTION MANAGEMENT */
2243 if (protocolWeightSum > 0) {
2244 for (protocol = 0;
2245 protocol < NUM_OF_PROTOCOLS; protocol++)
2246 /* credit for each period of the
2247 fairness algorithm - number of bytes in
2248 T_FAIR (the protocol share the vn rate) */
2249 m_fair_vn.protocol_credit_delta[protocol] =
2250 (u32)((vn_min_rate / 8) * t_fair *
2251 protocol_min_rate / protocolWeightSum);
2252 }
2253 } while (0);
2254#endif
2255
2256 /* Store it to internal memory */ 2145 /* Store it to internal memory */
2257 for (i = 0; i < sizeof(struct rate_shaping_vars_per_vn)/4; i++) 2146 for (i = 0; i < sizeof(struct rate_shaping_vars_per_vn)/4; i++)
2258 REG_WR(bp, BAR_XSTRORM_INTMEM + 2147 REG_WR(bp, BAR_XSTRORM_INTMEM +
@@ -2265,11 +2154,10 @@ static void bnx2x_init_vn_minmax(struct bnx2x *bp, int func,
2265 ((u32 *)(&m_fair_vn))[i]); 2154 ((u32 *)(&m_fair_vn))[i]);
2266} 2155}
2267 2156
2157
2268/* This function is called upon link interrupt */ 2158/* This function is called upon link interrupt */
2269static void bnx2x_link_attn(struct bnx2x *bp) 2159static void bnx2x_link_attn(struct bnx2x *bp)
2270{ 2160{
2271 int vn;
2272
2273 /* Make sure that we are synced with the current statistics */ 2161 /* Make sure that we are synced with the current statistics */
2274 bnx2x_stats_handle(bp, STATS_EVENT_STOP); 2162 bnx2x_stats_handle(bp, STATS_EVENT_STOP);
2275 2163
@@ -2294,36 +2182,38 @@ static void bnx2x_link_attn(struct bnx2x *bp)
2294 bnx2x_link_report(bp); 2182 bnx2x_link_report(bp);
2295 2183
2296 if (IS_E1HMF(bp)) { 2184 if (IS_E1HMF(bp)) {
2185 int port = BP_PORT(bp);
2297 int func; 2186 int func;
2187 int vn;
2298 2188
2299 for (vn = VN_0; vn < E1HVN_MAX; vn++) { 2189 for (vn = VN_0; vn < E1HVN_MAX; vn++) {
2300 if (vn == BP_E1HVN(bp)) 2190 if (vn == BP_E1HVN(bp))
2301 continue; 2191 continue;
2302 2192
2303 func = ((vn << 1) | BP_PORT(bp)); 2193 func = ((vn << 1) | port);
2304 2194
2305 /* Set the attention towards other drivers 2195 /* Set the attention towards other drivers
2306 on the same port */ 2196 on the same port */
2307 REG_WR(bp, MISC_REG_AEU_GENERAL_ATTN_0 + 2197 REG_WR(bp, MISC_REG_AEU_GENERAL_ATTN_0 +
2308 (LINK_SYNC_ATTENTION_BIT_FUNC_0 + func)*4, 1); 2198 (LINK_SYNC_ATTENTION_BIT_FUNC_0 + func)*4, 1);
2309 } 2199 }
2310 }
2311 2200
2312 if (CHIP_IS_E1H(bp) && (bp->link_vars.line_speed > 0)) { 2201 if (bp->link_vars.link_up) {
2313 struct cmng_struct_per_port m_cmng_port; 2202 int i;
2314 u32 wsum; 2203
2315 int port = BP_PORT(bp); 2204 /* Init rate shaping and fairness contexts */
2205 bnx2x_init_port_minmax(bp);
2316 2206
2317 /* Init RATE SHAPING and FAIRNESS contexts */
2318 wsum = bnx2x_calc_vn_wsum(bp);
2319 bnx2x_init_port_minmax(bp, (int)wsum,
2320 bp->link_vars.line_speed,
2321 &m_cmng_port);
2322 if (IS_E1HMF(bp))
2323 for (vn = VN_0; vn < E1HVN_MAX; vn++) 2207 for (vn = VN_0; vn < E1HVN_MAX; vn++)
2324 bnx2x_init_vn_minmax(bp, 2*vn + port, 2208 bnx2x_init_vn_minmax(bp, 2*vn + port);
2325 wsum, bp->link_vars.line_speed, 2209
2326 &m_cmng_port); 2210 /* Store it to internal memory */
2211 for (i = 0;
2212 i < sizeof(struct cmng_struct_per_port) / 4; i++)
2213 REG_WR(bp, BAR_XSTRORM_INTMEM +
2214 XSTORM_CMNG_PER_PORT_VARS_OFFSET(port) + i*4,
2215 ((u32 *)(&bp->cmng))[i]);
2216 }
2327 } 2217 }
2328} 2218}
2329 2219
@@ -4848,6 +4738,47 @@ static void bnx2x_init_internal_port(struct bnx2x *bp)
4848 REG_WR(bp, BAR_XSTRORM_INTMEM + XSTORM_HC_BTR_OFFSET(port), BNX2X_BTR); 4738 REG_WR(bp, BAR_XSTRORM_INTMEM + XSTORM_HC_BTR_OFFSET(port), BNX2X_BTR);
4849} 4739}
4850 4740
4741/* Calculates the sum of vn_min_rates.
4742 It's needed for further normalizing of the min_rates.
4743 Returns:
4744 sum of vn_min_rates.
4745 or
4746 0 - if all the min_rates are 0.
4747 In the later case fainess algorithm should be deactivated.
4748 If not all min_rates are zero then those that are zeroes will be set to 1.
4749 */
4750static void bnx2x_calc_vn_weight_sum(struct bnx2x *bp)
4751{
4752 int all_zero = 1;
4753 int port = BP_PORT(bp);
4754 int vn;
4755
4756 bp->vn_weight_sum = 0;
4757 for (vn = VN_0; vn < E1HVN_MAX; vn++) {
4758 int func = 2*vn + port;
4759 u32 vn_cfg =
4760 SHMEM_RD(bp, mf_cfg.func_mf_config[func].config);
4761 u32 vn_min_rate = ((vn_cfg & FUNC_MF_CFG_MIN_BW_MASK) >>
4762 FUNC_MF_CFG_MIN_BW_SHIFT) * 100;
4763
4764 /* Skip hidden vns */
4765 if (vn_cfg & FUNC_MF_CFG_FUNC_HIDE)
4766 continue;
4767
4768 /* If min rate is zero - set it to 1 */
4769 if (!vn_min_rate)
4770 vn_min_rate = DEF_MIN_RATE;
4771 else
4772 all_zero = 0;
4773
4774 bp->vn_weight_sum += vn_min_rate;
4775 }
4776
4777 /* ... only if all min rates are zeros - disable fairness */
4778 if (all_zero)
4779 bp->vn_weight_sum = 0;
4780}
4781
4851static void bnx2x_init_internal_func(struct bnx2x *bp) 4782static void bnx2x_init_internal_func(struct bnx2x *bp)
4852{ 4783{
4853 struct tstorm_eth_function_common_config tstorm_config = {0}; 4784 struct tstorm_eth_function_common_config tstorm_config = {0};
@@ -4977,6 +4908,45 @@ static void bnx2x_init_internal_func(struct bnx2x *bp)
4977 USTORM_MAX_AGG_SIZE_OFFSET(port, FP_CL_ID(fp)), 4908 USTORM_MAX_AGG_SIZE_OFFSET(port, FP_CL_ID(fp)),
4978 max_agg_size); 4909 max_agg_size);
4979 } 4910 }
4911
4912 memset(&(bp->cmng), 0, sizeof(struct cmng_struct_per_port));
4913
4914 /* Init rate shaping and fairness contexts */
4915 if (IS_E1HMF(bp)) {
4916 int vn;
4917
4918 /* During init there is no active link
4919 Until link is up, set link rate to 10Gbps */
4920 bp->link_vars.line_speed = SPEED_10000;
4921 bnx2x_init_port_minmax(bp);
4922
4923 bnx2x_calc_vn_weight_sum(bp);
4924
4925 for (vn = VN_0; vn < E1HVN_MAX; vn++)
4926 bnx2x_init_vn_minmax(bp, 2*vn + port);
4927
4928 /* Enable rate shaping and fairness */
4929 bp->cmng.flags.cmng_enables =
4930 CMNG_FLAGS_PER_PORT_RATE_SHAPING_VN;
4931 if (bp->vn_weight_sum)
4932 bp->cmng.flags.cmng_enables |=
4933 CMNG_FLAGS_PER_PORT_FAIRNESS_VN;
4934 else
4935 DP(NETIF_MSG_IFUP, "All MIN values are zeroes"
4936 " fairness will be disabled\n");
4937 } else {
4938 /* rate shaping and fairness are disabled */
4939 DP(NETIF_MSG_IFUP,
4940 "single function mode minmax will be disabled\n");
4941 }
4942
4943
4944 /* Store it to internal memory */
4945 if (bp->port.pmf)
4946 for (i = 0; i < sizeof(struct cmng_struct_per_port) / 4; i++)
4947 REG_WR(bp, BAR_XSTRORM_INTMEM +
4948 XSTORM_CMNG_PER_PORT_VARS_OFFSET(port) + i * 4,
4949 ((u32 *)(&bp->cmng))[i]);
4980} 4950}
4981 4951
4982static void bnx2x_init_internal(struct bnx2x *bp, u32 load_code) 4952static void bnx2x_init_internal(struct bnx2x *bp, u32 load_code)
@@ -5780,22 +5750,10 @@ static int bnx2x_init_port(struct bnx2x *bp)
5780 REG_WR(bp, NIG_REG_XGXS_SERDES0_MODE_SEL + port*4, 1); 5750 REG_WR(bp, NIG_REG_XGXS_SERDES0_MODE_SEL + port*4, 1);
5781 5751
5782 if (CHIP_IS_E1H(bp)) { 5752 if (CHIP_IS_E1H(bp)) {
5783 u32 wsum;
5784 struct cmng_struct_per_port m_cmng_port;
5785 int vn;
5786
5787 /* 0x2 disable e1hov, 0x1 enable */ 5753 /* 0x2 disable e1hov, 0x1 enable */
5788 REG_WR(bp, NIG_REG_LLH0_BRB1_DRV_MASK_MF + port*4, 5754 REG_WR(bp, NIG_REG_LLH0_BRB1_DRV_MASK_MF + port*4,
5789 (IS_E1HMF(bp) ? 0x1 : 0x2)); 5755 (IS_E1HMF(bp) ? 0x1 : 0x2));
5790 5756
5791 /* Init RATE SHAPING and FAIRNESS contexts.
5792 Initialize as if there is 10G link. */
5793 wsum = bnx2x_calc_vn_wsum(bp);
5794 bnx2x_init_port_minmax(bp, (int)wsum, 10000, &m_cmng_port);
5795 if (IS_E1HMF(bp))
5796 for (vn = VN_0; vn < E1HVN_MAX; vn++)
5797 bnx2x_init_vn_minmax(bp, 2*vn + port,
5798 wsum, 10000, &m_cmng_port);
5799 } 5757 }
5800 5758
5801 /* Port MCP comes here */ 5759 /* Port MCP comes here */