diff options
author | Eilon Greenstein <eilong@broadcom.com> | 2009-02-12 03:38:14 -0500 |
---|---|---|
committer | David S. Miller <davem@davemloft.net> | 2009-02-16 02:31:51 -0500 |
commit | 0626b89971d75b35698f208fd7abe4303e1588b9 (patch) | |
tree | 457830677ffef8bcc48b394a8860d2bcc02d52ae /drivers/net/bnx2x_main.c | |
parent | 5cd65a93e9335393d5e1f18d35d337b7ba1280f8 (diff) |
bnx2x: Removing redundant macros
Signed-off-by: Harvey Harrison <harvey.harrison@gmail.com>
Signed-off-by: Eilon Greenstein <eilong@broadcom.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers/net/bnx2x_main.c')
-rw-r--r-- | drivers/net/bnx2x_main.c | 52 |
1 files changed, 26 insertions, 26 deletions
diff --git a/drivers/net/bnx2x_main.c b/drivers/net/bnx2x_main.c index 96e23fd7eb4a..2542ba88a290 100644 --- a/drivers/net/bnx2x_main.c +++ b/drivers/net/bnx2x_main.c | |||
@@ -929,12 +929,12 @@ static void bnx2x_sp_event(struct bnx2x_fastpath *fp, | |||
929 | 929 | ||
930 | DP(BNX2X_MSG_SP, | 930 | DP(BNX2X_MSG_SP, |
931 | "fp %d cid %d got ramrod #%d state is %x type is %d\n", | 931 | "fp %d cid %d got ramrod #%d state is %x type is %d\n", |
932 | FP_IDX(fp), cid, command, bp->state, | 932 | fp->index, cid, command, bp->state, |
933 | rr_cqe->ramrod_cqe.ramrod_type); | 933 | rr_cqe->ramrod_cqe.ramrod_type); |
934 | 934 | ||
935 | bp->spq_left++; | 935 | bp->spq_left++; |
936 | 936 | ||
937 | if (FP_IDX(fp)) { | 937 | if (fp->index) { |
938 | switch (command | fp->state) { | 938 | switch (command | fp->state) { |
939 | case (RAMROD_CMD_ID_ETH_CLIENT_SETUP | | 939 | case (RAMROD_CMD_ID_ETH_CLIENT_SETUP | |
940 | BNX2X_FP_STATE_OPENING): | 940 | BNX2X_FP_STATE_OPENING): |
@@ -1411,7 +1411,7 @@ static inline void bnx2x_update_rx_prod(struct bnx2x *bp, | |||
1411 | 1411 | ||
1412 | for (i = 0; i < sizeof(struct ustorm_eth_rx_producers)/4; i++) | 1412 | for (i = 0; i < sizeof(struct ustorm_eth_rx_producers)/4; i++) |
1413 | REG_WR(bp, BAR_USTRORM_INTMEM + | 1413 | REG_WR(bp, BAR_USTRORM_INTMEM + |
1414 | USTORM_RX_PRODS_OFFSET(BP_PORT(bp), FP_CL_ID(fp)) + i*4, | 1414 | USTORM_RX_PRODS_OFFSET(BP_PORT(bp), fp->cl_id) + i*4, |
1415 | ((u32 *)&rx_prods)[i]); | 1415 | ((u32 *)&rx_prods)[i]); |
1416 | 1416 | ||
1417 | mmiowb(); /* keep prod updates ordered */ | 1417 | mmiowb(); /* keep prod updates ordered */ |
@@ -1452,7 +1452,7 @@ static int bnx2x_rx_int(struct bnx2x_fastpath *fp, int budget) | |||
1452 | 1452 | ||
1453 | DP(NETIF_MSG_RX_STATUS, | 1453 | DP(NETIF_MSG_RX_STATUS, |
1454 | "queue[%d]: hw_comp_cons %u sw_comp_cons %u\n", | 1454 | "queue[%d]: hw_comp_cons %u sw_comp_cons %u\n", |
1455 | FP_IDX(fp), hw_comp_cons, sw_comp_cons); | 1455 | fp->index, hw_comp_cons, sw_comp_cons); |
1456 | 1456 | ||
1457 | while (sw_comp_cons != hw_comp_cons) { | 1457 | while (sw_comp_cons != hw_comp_cons) { |
1458 | struct sw_rx_bd *rx_buf = NULL; | 1458 | struct sw_rx_bd *rx_buf = NULL; |
@@ -1648,7 +1648,7 @@ static irqreturn_t bnx2x_msix_fp_int(int irq, void *fp_cookie) | |||
1648 | { | 1648 | { |
1649 | struct bnx2x_fastpath *fp = fp_cookie; | 1649 | struct bnx2x_fastpath *fp = fp_cookie; |
1650 | struct bnx2x *bp = fp->bp; | 1650 | struct bnx2x *bp = fp->bp; |
1651 | int index = FP_IDX(fp); | 1651 | int index = fp->index; |
1652 | 1652 | ||
1653 | /* Return here if interrupt is disabled */ | 1653 | /* Return here if interrupt is disabled */ |
1654 | if (unlikely(atomic_read(&bp->intr_sem) != 0)) { | 1654 | if (unlikely(atomic_read(&bp->intr_sem) != 0)) { |
@@ -1657,8 +1657,8 @@ static irqreturn_t bnx2x_msix_fp_int(int irq, void *fp_cookie) | |||
1657 | } | 1657 | } |
1658 | 1658 | ||
1659 | DP(BNX2X_MSG_FP, "got an MSI-X interrupt on IDX:SB [%d:%d]\n", | 1659 | DP(BNX2X_MSG_FP, "got an MSI-X interrupt on IDX:SB [%d:%d]\n", |
1660 | index, FP_SB_ID(fp)); | 1660 | index, fp->sb_id); |
1661 | bnx2x_ack_sb(bp, FP_SB_ID(fp), USTORM_ID, 0, IGU_INT_DISABLE, 0); | 1661 | bnx2x_ack_sb(bp, fp->sb_id, USTORM_ID, 0, IGU_INT_DISABLE, 0); |
1662 | 1662 | ||
1663 | #ifdef BNX2X_STOP_ON_ERROR | 1663 | #ifdef BNX2X_STOP_ON_ERROR |
1664 | if (unlikely(bp->panic)) | 1664 | if (unlikely(bp->panic)) |
@@ -2641,7 +2641,7 @@ static inline void bnx2x_attn_int_deasserted1(struct bnx2x *bp, u32 attn) | |||
2641 | { | 2641 | { |
2642 | u32 val; | 2642 | u32 val; |
2643 | 2643 | ||
2644 | if (attn & BNX2X_DOORQ_ASSERT) { | 2644 | if (attn & AEU_INPUTS_ATTN_BITS_DOORBELLQ_HW_INTERRUPT) { |
2645 | 2645 | ||
2646 | val = REG_RD(bp, DORQ_REG_DORQ_INT_STS_CLR); | 2646 | val = REG_RD(bp, DORQ_REG_DORQ_INT_STS_CLR); |
2647 | BNX2X_ERR("DB hw attention 0x%x\n", val); | 2647 | BNX2X_ERR("DB hw attention 0x%x\n", val); |
@@ -4641,11 +4641,11 @@ static void bnx2x_init_context(struct bnx2x *bp) | |||
4641 | struct eth_context *context = bnx2x_sp(bp, context[i].eth); | 4641 | struct eth_context *context = bnx2x_sp(bp, context[i].eth); |
4642 | struct bnx2x_fastpath *fp = &bp->fp[i]; | 4642 | struct bnx2x_fastpath *fp = &bp->fp[i]; |
4643 | u8 cl_id = fp->cl_id; | 4643 | u8 cl_id = fp->cl_id; |
4644 | u8 sb_id = FP_SB_ID(fp); | 4644 | u8 sb_id = fp->sb_id; |
4645 | 4645 | ||
4646 | context->ustorm_st_context.common.sb_index_numbers = | 4646 | context->ustorm_st_context.common.sb_index_numbers = |
4647 | BNX2X_RX_SB_INDEX_NUM; | 4647 | BNX2X_RX_SB_INDEX_NUM; |
4648 | context->ustorm_st_context.common.clientId = FP_CL_ID(fp); | 4648 | context->ustorm_st_context.common.clientId = cl_id; |
4649 | context->ustorm_st_context.common.status_block_id = sb_id; | 4649 | context->ustorm_st_context.common.status_block_id = sb_id; |
4650 | context->ustorm_st_context.common.flags = | 4650 | context->ustorm_st_context.common.flags = |
4651 | (USTORM_ETH_ST_CONTEXT_CONFIG_ENABLE_MC_ALIGNMENT | | 4651 | (USTORM_ETH_ST_CONTEXT_CONFIG_ENABLE_MC_ALIGNMENT | |
@@ -4686,7 +4686,7 @@ static void bnx2x_init_context(struct bnx2x *bp) | |||
4686 | U64_HI(fp->tx_prods_mapping); | 4686 | U64_HI(fp->tx_prods_mapping); |
4687 | context->xstorm_st_context.db_data_addr_lo = | 4687 | context->xstorm_st_context.db_data_addr_lo = |
4688 | U64_LO(fp->tx_prods_mapping); | 4688 | U64_LO(fp->tx_prods_mapping); |
4689 | context->xstorm_st_context.statistics_data = (fp->cl_id | | 4689 | context->xstorm_st_context.statistics_data = (cl_id | |
4690 | XSTORM_ETH_ST_CONTEXT_STATISTICS_ENABLE); | 4690 | XSTORM_ETH_ST_CONTEXT_STATISTICS_ENABLE); |
4691 | context->cstorm_st_context.sb_index_number = | 4691 | context->cstorm_st_context.sb_index_number = |
4692 | C_SB_ETH_TX_CQ_INDEX; | 4692 | C_SB_ETH_TX_CQ_INDEX; |
@@ -4712,7 +4712,7 @@ static void bnx2x_init_ind_table(struct bnx2x *bp) | |||
4712 | for (i = 0; i < TSTORM_INDIRECTION_TABLE_SIZE; i++) | 4712 | for (i = 0; i < TSTORM_INDIRECTION_TABLE_SIZE; i++) |
4713 | REG_WR8(bp, BAR_TSTRORM_INTMEM + | 4713 | REG_WR8(bp, BAR_TSTRORM_INTMEM + |
4714 | TSTORM_INDIRECTION_TABLE_OFFSET(func) + i, | 4714 | TSTORM_INDIRECTION_TABLE_OFFSET(func) + i, |
4715 | BP_CL_ID(bp) + (i % bp->num_rx_queues)); | 4715 | bp->fp->cl_id + (i % bp->num_rx_queues)); |
4716 | } | 4716 | } |
4717 | 4717 | ||
4718 | static void bnx2x_set_client_config(struct bnx2x *bp) | 4718 | static void bnx2x_set_client_config(struct bnx2x *bp) |
@@ -4998,14 +4998,14 @@ static void bnx2x_init_internal_func(struct bnx2x *bp) | |||
4998 | struct bnx2x_fastpath *fp = &bp->fp[i]; | 4998 | struct bnx2x_fastpath *fp = &bp->fp[i]; |
4999 | 4999 | ||
5000 | REG_WR(bp, BAR_USTRORM_INTMEM + | 5000 | REG_WR(bp, BAR_USTRORM_INTMEM + |
5001 | USTORM_CQE_PAGE_BASE_OFFSET(port, FP_CL_ID(fp)), | 5001 | USTORM_CQE_PAGE_BASE_OFFSET(port, fp->cl_id), |
5002 | U64_LO(fp->rx_comp_mapping)); | 5002 | U64_LO(fp->rx_comp_mapping)); |
5003 | REG_WR(bp, BAR_USTRORM_INTMEM + | 5003 | REG_WR(bp, BAR_USTRORM_INTMEM + |
5004 | USTORM_CQE_PAGE_BASE_OFFSET(port, FP_CL_ID(fp)) + 4, | 5004 | USTORM_CQE_PAGE_BASE_OFFSET(port, fp->cl_id) + 4, |
5005 | U64_HI(fp->rx_comp_mapping)); | 5005 | U64_HI(fp->rx_comp_mapping)); |
5006 | 5006 | ||
5007 | REG_WR16(bp, BAR_USTRORM_INTMEM + | 5007 | REG_WR16(bp, BAR_USTRORM_INTMEM + |
5008 | USTORM_MAX_AGG_SIZE_OFFSET(port, FP_CL_ID(fp)), | 5008 | USTORM_MAX_AGG_SIZE_OFFSET(port, fp->cl_id), |
5009 | max_agg_size); | 5009 | max_agg_size); |
5010 | } | 5010 | } |
5011 | 5011 | ||
@@ -5116,9 +5116,9 @@ static void bnx2x_nic_init(struct bnx2x *bp, u32 load_code) | |||
5116 | fp->sb_id = fp->cl_id; | 5116 | fp->sb_id = fp->cl_id; |
5117 | DP(NETIF_MSG_IFUP, | 5117 | DP(NETIF_MSG_IFUP, |
5118 | "bnx2x_init_sb(%p,%p) index %d cl_id %d sb %d\n", | 5118 | "bnx2x_init_sb(%p,%p) index %d cl_id %d sb %d\n", |
5119 | bp, fp->status_blk, i, FP_CL_ID(fp), FP_SB_ID(fp)); | 5119 | bp, fp->status_blk, i, fp->cl_id, fp->sb_id); |
5120 | bnx2x_init_sb(bp, fp->status_blk, fp->status_blk_mapping, | 5120 | bnx2x_init_sb(bp, fp->status_blk, fp->status_blk_mapping, |
5121 | FP_SB_ID(fp)); | 5121 | fp->sb_id); |
5122 | bnx2x_update_fpsb_idx(fp); | 5122 | bnx2x_update_fpsb_idx(fp); |
5123 | } | 5123 | } |
5124 | 5124 | ||
@@ -6585,7 +6585,7 @@ static void bnx2x_set_mac_addr_e1(struct bnx2x *bp, int set) | |||
6585 | */ | 6585 | */ |
6586 | config->hdr.length = 2; | 6586 | config->hdr.length = 2; |
6587 | config->hdr.offset = port ? 32 : 0; | 6587 | config->hdr.offset = port ? 32 : 0; |
6588 | config->hdr.client_id = BP_CL_ID(bp); | 6588 | config->hdr.client_id = bp->fp->cl_id; |
6589 | config->hdr.reserved1 = 0; | 6589 | config->hdr.reserved1 = 0; |
6590 | 6590 | ||
6591 | /* primary MAC */ | 6591 | /* primary MAC */ |
@@ -6643,7 +6643,7 @@ static void bnx2x_set_mac_addr_e1h(struct bnx2x *bp, int set) | |||
6643 | */ | 6643 | */ |
6644 | config->hdr.length = 1; | 6644 | config->hdr.length = 1; |
6645 | config->hdr.offset = BP_FUNC(bp); | 6645 | config->hdr.offset = BP_FUNC(bp); |
6646 | config->hdr.client_id = BP_CL_ID(bp); | 6646 | config->hdr.client_id = bp->fp->cl_id; |
6647 | config->hdr.reserved1 = 0; | 6647 | config->hdr.reserved1 = 0; |
6648 | 6648 | ||
6649 | /* primary MAC */ | 6649 | /* primary MAC */ |
@@ -7045,7 +7045,7 @@ static int bnx2x_stop_leading(struct bnx2x *bp) | |||
7045 | 7045 | ||
7046 | /* Send HALT ramrod */ | 7046 | /* Send HALT ramrod */ |
7047 | bp->fp[0].state = BNX2X_FP_STATE_HALTING; | 7047 | bp->fp[0].state = BNX2X_FP_STATE_HALTING; |
7048 | bnx2x_sp_post(bp, RAMROD_CMD_ID_ETH_HALT, 0, 0, BP_CL_ID(bp), 0); | 7048 | bnx2x_sp_post(bp, RAMROD_CMD_ID_ETH_HALT, 0, 0, bp->fp->cl_id, 0); |
7049 | 7049 | ||
7050 | /* Wait for completion */ | 7050 | /* Wait for completion */ |
7051 | rc = bnx2x_wait_ramrod(bp, BNX2X_FP_STATE_HALTED, 0, | 7051 | rc = bnx2x_wait_ramrod(bp, BNX2X_FP_STATE_HALTED, 0, |
@@ -7215,7 +7215,7 @@ static int bnx2x_nic_unload(struct bnx2x *bp, int unload_mode) | |||
7215 | config->hdr.offset = BNX2X_MAX_EMUL_MULTI*(1 + port); | 7215 | config->hdr.offset = BNX2X_MAX_EMUL_MULTI*(1 + port); |
7216 | else | 7216 | else |
7217 | config->hdr.offset = BNX2X_MAX_MULTICAST*(1 + port); | 7217 | config->hdr.offset = BNX2X_MAX_MULTICAST*(1 + port); |
7218 | config->hdr.client_id = BP_CL_ID(bp); | 7218 | config->hdr.client_id = bp->fp->cl_id; |
7219 | config->hdr.reserved1 = 0; | 7219 | config->hdr.reserved1 = 0; |
7220 | 7220 | ||
7221 | bnx2x_sp_post(bp, RAMROD_CMD_ID_ETH_SET_MAC, 0, | 7221 | bnx2x_sp_post(bp, RAMROD_CMD_ID_ETH_SET_MAC, 0, |
@@ -9392,7 +9392,7 @@ static int bnx2x_run_loopback(struct bnx2x *bp, int loopback_mode, u8 link_up) | |||
9392 | mb(); /* FW restriction: must not reorder writing nbd and packets */ | 9392 | mb(); /* FW restriction: must not reorder writing nbd and packets */ |
9393 | fp->hw_tx_prods->packets_prod = | 9393 | fp->hw_tx_prods->packets_prod = |
9394 | cpu_to_le32(le32_to_cpu(fp->hw_tx_prods->packets_prod) + 1); | 9394 | cpu_to_le32(le32_to_cpu(fp->hw_tx_prods->packets_prod) + 1); |
9395 | DOORBELL(bp, FP_IDX(fp), 0); | 9395 | DOORBELL(bp, fp->index, 0); |
9396 | 9396 | ||
9397 | mmiowb(); | 9397 | mmiowb(); |
9398 | 9398 | ||
@@ -9545,7 +9545,7 @@ static int bnx2x_test_intr(struct bnx2x *bp) | |||
9545 | config->hdr.offset = (BP_PORT(bp) ? 32 : 0); | 9545 | config->hdr.offset = (BP_PORT(bp) ? 32 : 0); |
9546 | else | 9546 | else |
9547 | config->hdr.offset = BP_FUNC(bp); | 9547 | config->hdr.offset = BP_FUNC(bp); |
9548 | config->hdr.client_id = BP_CL_ID(bp); | 9548 | config->hdr.client_id = bp->fp->cl_id; |
9549 | config->hdr.reserved1 = 0; | 9549 | config->hdr.reserved1 = 0; |
9550 | 9550 | ||
9551 | rc = bnx2x_sp_post(bp, RAMROD_CMD_ID_ETH_SET_MAC, 0, | 9551 | rc = bnx2x_sp_post(bp, RAMROD_CMD_ID_ETH_SET_MAC, 0, |
@@ -10050,9 +10050,9 @@ poll_panic: | |||
10050 | #endif | 10050 | #endif |
10051 | napi_complete(napi); | 10051 | napi_complete(napi); |
10052 | 10052 | ||
10053 | bnx2x_ack_sb(bp, FP_SB_ID(fp), USTORM_ID, | 10053 | bnx2x_ack_sb(bp, fp->sb_id, USTORM_ID, |
10054 | le16_to_cpu(fp->fp_u_idx), IGU_INT_NOP, 1); | 10054 | le16_to_cpu(fp->fp_u_idx), IGU_INT_NOP, 1); |
10055 | bnx2x_ack_sb(bp, FP_SB_ID(fp), CSTORM_ID, | 10055 | bnx2x_ack_sb(bp, fp->sb_id, CSTORM_ID, |
10056 | le16_to_cpu(fp->fp_c_idx), IGU_INT_ENABLE, 1); | 10056 | le16_to_cpu(fp->fp_c_idx), IGU_INT_ENABLE, 1); |
10057 | } | 10057 | } |
10058 | return work_done; | 10058 | return work_done; |
@@ -10491,7 +10491,7 @@ static int bnx2x_start_xmit(struct sk_buff *skb, struct net_device *dev) | |||
10491 | mb(); /* FW restriction: must not reorder writing nbd and packets */ | 10491 | mb(); /* FW restriction: must not reorder writing nbd and packets */ |
10492 | fp->hw_tx_prods->packets_prod = | 10492 | fp->hw_tx_prods->packets_prod = |
10493 | cpu_to_le32(le32_to_cpu(fp->hw_tx_prods->packets_prod) + 1); | 10493 | cpu_to_le32(le32_to_cpu(fp->hw_tx_prods->packets_prod) + 1); |
10494 | DOORBELL(bp, FP_IDX(fp), 0); | 10494 | DOORBELL(bp, fp->index, 0); |
10495 | 10495 | ||
10496 | mmiowb(); | 10496 | mmiowb(); |
10497 | 10497 | ||