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authorEilon Greenstein <eilong@broadcom.com>2009-07-21 01:47:27 -0400
committerDavid S. Miller <davem@davemloft.net>2009-07-21 14:18:26 -0400
commitfd4ef40d5977e1c226e9cd9659398e82cc4a1e85 (patch)
treefef7d128105a7cf789d6088d013c64fee1416402 /drivers/net/bnx2x_main.c
parent279abdf59c766a06db89b50c6d3615b4f2b19ed3 (diff)
bnx2x: Fan failure
Setup fan failure for different PHY types or according to nvram settings Signed-off-by: Eilon Greenstein <eilong@broadcom.com> Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers/net/bnx2x_main.c')
-rw-r--r--drivers/net/bnx2x_main.c112
1 files changed, 75 insertions, 37 deletions
diff --git a/drivers/net/bnx2x_main.c b/drivers/net/bnx2x_main.c
index 177cb467ba90..ae8b7b517ea8 100644
--- a/drivers/net/bnx2x_main.c
+++ b/drivers/net/bnx2x_main.c
@@ -2598,6 +2598,22 @@ static void bnx2x_attn_int_asserted(struct bnx2x *bp, u32 asserted)
2598 } 2598 }
2599} 2599}
2600 2600
2601static inline void bnx2x_fan_failure(struct bnx2x *bp)
2602{
2603 int port = BP_PORT(bp);
2604
2605 /* mark the failure */
2606 bp->link_params.ext_phy_config &= ~PORT_HW_CFG_XGXS_EXT_PHY_TYPE_MASK;
2607 bp->link_params.ext_phy_config |= PORT_HW_CFG_XGXS_EXT_PHY_TYPE_FAILURE;
2608 SHMEM_WR(bp, dev_info.port_hw_config[port].external_phy_config,
2609 bp->link_params.ext_phy_config);
2610
2611 /* log the failure */
2612 printk(KERN_ERR PFX "Fan Failure on Network Controller %s has caused"
2613 " the driver to shutdown the card to prevent permanent"
2614 " damage. Please contact Dell Support for assistance\n",
2615 bp->dev->name);
2616}
2601static inline void bnx2x_attn_int_deasserted0(struct bnx2x *bp, u32 attn) 2617static inline void bnx2x_attn_int_deasserted0(struct bnx2x *bp, u32 attn)
2602{ 2618{
2603 int port = BP_PORT(bp); 2619 int port = BP_PORT(bp);
@@ -2615,36 +2631,21 @@ static inline void bnx2x_attn_int_deasserted0(struct bnx2x *bp, u32 attn)
2615 2631
2616 BNX2X_ERR("SPIO5 hw attention\n"); 2632 BNX2X_ERR("SPIO5 hw attention\n");
2617 2633
2634 /* Fan failure attention */
2618 switch (XGXS_EXT_PHY_TYPE(bp->link_params.ext_phy_config)) { 2635 switch (XGXS_EXT_PHY_TYPE(bp->link_params.ext_phy_config)) {
2619 case PORT_HW_CFG_XGXS_EXT_PHY_TYPE_SFX7101: 2636 case PORT_HW_CFG_XGXS_EXT_PHY_TYPE_SFX7101:
2620 /* Fan failure attention */
2621
2622 /* The PHY reset is controlled by GPIO 1 */
2623 bnx2x_set_gpio(bp, MISC_REGISTERS_GPIO_1,
2624 MISC_REGISTERS_GPIO_OUTPUT_LOW, port);
2625 /* Low power mode is controlled by GPIO 2 */ 2637 /* Low power mode is controlled by GPIO 2 */
2626 bnx2x_set_gpio(bp, MISC_REGISTERS_GPIO_2, 2638 bnx2x_set_gpio(bp, MISC_REGISTERS_GPIO_2,
2627 MISC_REGISTERS_GPIO_OUTPUT_LOW, port); 2639 MISC_REGISTERS_GPIO_OUTPUT_LOW, port);
2628 /* mark the failure */ 2640 /* The PHY reset is controlled by GPIO 1 */
2629 bp->link_params.ext_phy_config &= 2641 bnx2x_set_gpio(bp, MISC_REGISTERS_GPIO_1,
2630 ~PORT_HW_CFG_XGXS_EXT_PHY_TYPE_MASK; 2642 MISC_REGISTERS_GPIO_OUTPUT_LOW, port);
2631 bp->link_params.ext_phy_config |=
2632 PORT_HW_CFG_XGXS_EXT_PHY_TYPE_FAILURE;
2633 SHMEM_WR(bp,
2634 dev_info.port_hw_config[port].
2635 external_phy_config,
2636 bp->link_params.ext_phy_config);
2637 /* log the failure */
2638 printk(KERN_ERR PFX "Fan Failure on Network"
2639 " Controller %s has caused the driver to"
2640 " shutdown the card to prevent permanent"
2641 " damage. Please contact Dell Support for"
2642 " assistance\n", bp->dev->name);
2643 break; 2643 break;
2644 2644
2645 default: 2645 default:
2646 break; 2646 break;
2647 } 2647 }
2648 bnx2x_fan_failure(bp);
2648 } 2649 }
2649 2650
2650 if (attn & (AEU_INPUTS_ATTN_BITS_GPIO3_FUNCTION_0 | 2651 if (attn & (AEU_INPUTS_ATTN_BITS_GPIO3_FUNCTION_0 |
@@ -5509,6 +5510,58 @@ static void bnx2x_reset_common(struct bnx2x *bp)
5509 REG_WR(bp, GRCBASE_MISC + MISC_REGISTERS_RESET_REG_2_CLEAR, 0x1403); 5510 REG_WR(bp, GRCBASE_MISC + MISC_REGISTERS_RESET_REG_2_CLEAR, 0x1403);
5510} 5511}
5511 5512
5513
5514static void bnx2x_setup_fan_failure_detection(struct bnx2x *bp)
5515{
5516 u32 val;
5517 u8 port;
5518 u8 is_required = 0;
5519
5520 val = SHMEM_RD(bp, dev_info.shared_hw_config.config2) &
5521 SHARED_HW_CFG_FAN_FAILURE_MASK;
5522
5523 if (val == SHARED_HW_CFG_FAN_FAILURE_ENABLED)
5524 is_required = 1;
5525
5526 /*
5527 * The fan failure mechanism is usually related to the PHY type since
5528 * the power consumption of the board is affected by the PHY. Currently,
5529 * fan is required for most designs with SFX7101, BCM8727 and BCM8481.
5530 */
5531 else if (val == SHARED_HW_CFG_FAN_FAILURE_PHY_TYPE)
5532 for (port = PORT_0; port < PORT_MAX; port++) {
5533 u32 phy_type =
5534 SHMEM_RD(bp, dev_info.port_hw_config[port].
5535 external_phy_config) &
5536 PORT_HW_CFG_XGXS_EXT_PHY_TYPE_MASK;
5537 is_required |=
5538 ((phy_type ==
5539 PORT_HW_CFG_XGXS_EXT_PHY_TYPE_SFX7101) ||
5540 (phy_type ==
5541 PORT_HW_CFG_XGXS_EXT_PHY_TYPE_BCM8481));
5542 }
5543
5544 DP(NETIF_MSG_HW, "fan detection setting: %d\n", is_required);
5545
5546 if (is_required == 0)
5547 return;
5548
5549 /* Fan failure is indicated by SPIO 5 */
5550 bnx2x_set_spio(bp, MISC_REGISTERS_SPIO_5,
5551 MISC_REGISTERS_SPIO_INPUT_HI_Z);
5552
5553 /* set to active low mode */
5554 val = REG_RD(bp, MISC_REG_SPIO_INT);
5555 val |= ((1 << MISC_REGISTERS_SPIO_5) <<
5556 MISC_REGISTERS_SPIO_INT_OLD_SET_POS);
5557 REG_WR(bp, MISC_REG_SPIO_INT, val);
5558
5559 /* enable interrupt to signal the IGU */
5560 val = REG_RD(bp, MISC_REG_SPIO_EVENT_EN);
5561 val |= (1 << MISC_REGISTERS_SPIO_5);
5562 REG_WR(bp, MISC_REG_SPIO_EVENT_EN, val);
5563}
5564
5512static int bnx2x_init_common(struct bnx2x *bp) 5565static int bnx2x_init_common(struct bnx2x *bp)
5513{ 5566{
5514 u32 val, i; 5567 u32 val, i;
@@ -5738,27 +5791,12 @@ static int bnx2x_init_common(struct bnx2x *bp)
5738 bp->port.need_hw_lock = 1; 5791 bp->port.need_hw_lock = 1;
5739 break; 5792 break;
5740 5793
5741 case PORT_HW_CFG_XGXS_EXT_PHY_TYPE_SFX7101:
5742 /* Fan failure is indicated by SPIO 5 */
5743 bnx2x_set_spio(bp, MISC_REGISTERS_SPIO_5,
5744 MISC_REGISTERS_SPIO_INPUT_HI_Z);
5745
5746 /* set to active low mode */
5747 val = REG_RD(bp, MISC_REG_SPIO_INT);
5748 val |= ((1 << MISC_REGISTERS_SPIO_5) <<
5749 MISC_REGISTERS_SPIO_INT_OLD_SET_POS);
5750 REG_WR(bp, MISC_REG_SPIO_INT, val);
5751
5752 /* enable interrupt to signal the IGU */
5753 val = REG_RD(bp, MISC_REG_SPIO_EVENT_EN);
5754 val |= (1 << MISC_REGISTERS_SPIO_5);
5755 REG_WR(bp, MISC_REG_SPIO_EVENT_EN, val);
5756 break;
5757
5758 default: 5794 default:
5759 break; 5795 break;
5760 } 5796 }
5761 5797
5798 bnx2x_setup_fan_failure_detection(bp);
5799
5762 /* clear PXP2 attentions */ 5800 /* clear PXP2 attentions */
5763 REG_RD(bp, PXP2_REG_PXP2_INT_STS_CLR_0); 5801 REG_RD(bp, PXP2_REG_PXP2_INT_STS_CLR_0);
5764 5802