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authorYaniv Rosner <yanivr@broadcom.com>2009-11-05 12:18:26 -0500
committerDavid S. Miller <davem@davemloft.net>2009-11-05 23:00:44 -0500
commit93f72884dd1622e443109abcd3e5e8f8cca0a6fe (patch)
treeca81b509491ef9cec56c8dfd7d8dfb5aaaab307c /drivers/net/bnx2x_link.c
parent4f60dab113230943fb1bc7969053d9a1b6578339 (diff)
bnx2x: Fix BCM8726 ROM load seq
Signed-off-by: Yaniv Rosner <yanivr@broadcom.com> Signed-off-by: Eilon Greenstein <eilong@broadcom.com> Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers/net/bnx2x_link.c')
-rw-r--r--drivers/net/bnx2x_link.c13
1 files changed, 2 insertions, 11 deletions
diff --git a/drivers/net/bnx2x_link.c b/drivers/net/bnx2x_link.c
index 7897fe13e61a..1b73c1d72fc1 100644
--- a/drivers/net/bnx2x_link.c
+++ b/drivers/net/bnx2x_link.c
@@ -2592,16 +2592,11 @@ static void bnx2x_bcm8726_external_rom_boot(struct link_params *params)
2592 /* Need to wait 100ms after reset */ 2592 /* Need to wait 100ms after reset */
2593 msleep(100); 2593 msleep(100);
2594 2594
2595 /* Set serial boot control for external load */
2596 bnx2x_cl45_write(bp, port, ext_phy_type, ext_phy_addr,
2597 MDIO_PMA_DEVAD,
2598 MDIO_PMA_REG_MISC_CTRL1, 0x0001);
2599
2600 /* Micro controller re-boot */ 2595 /* Micro controller re-boot */
2601 bnx2x_cl45_write(bp, port, ext_phy_type, ext_phy_addr, 2596 bnx2x_cl45_write(bp, port, ext_phy_type, ext_phy_addr,
2602 MDIO_PMA_DEVAD, 2597 MDIO_PMA_DEVAD,
2603 MDIO_PMA_REG_GEN_CTRL, 2598 MDIO_PMA_REG_GEN_CTRL,
2604 MDIO_PMA_REG_GEN_CTRL_ROM_RESET_INTERNAL_MP); 2599 0x018B);
2605 2600
2606 /* Set soft reset */ 2601 /* Set soft reset */
2607 bnx2x_cl45_write(bp, port, ext_phy_type, ext_phy_addr, 2602 bnx2x_cl45_write(bp, port, ext_phy_type, ext_phy_addr,
@@ -2609,14 +2604,10 @@ static void bnx2x_bcm8726_external_rom_boot(struct link_params *params)
2609 MDIO_PMA_REG_GEN_CTRL, 2604 MDIO_PMA_REG_GEN_CTRL,
2610 MDIO_PMA_REG_GEN_CTRL_ROM_MICRO_RESET); 2605 MDIO_PMA_REG_GEN_CTRL_ROM_MICRO_RESET);
2611 2606
2612 /* Set PLL register value to be same like in P13 ver */
2613 bnx2x_cl45_write(bp, port, ext_phy_type, ext_phy_addr, 2607 bnx2x_cl45_write(bp, port, ext_phy_type, ext_phy_addr,
2614 MDIO_PMA_DEVAD, 2608 MDIO_PMA_DEVAD,
2615 MDIO_PMA_REG_PLL_CTRL, 2609 MDIO_PMA_REG_MISC_CTRL1, 0x0001);
2616 0x73A0);
2617 2610
2618 /* Clear soft reset.
2619 Will automatically reset micro-controller re-boot */
2620 bnx2x_cl45_write(bp, port, ext_phy_type, ext_phy_addr, 2611 bnx2x_cl45_write(bp, port, ext_phy_type, ext_phy_addr,
2621 MDIO_PMA_DEVAD, 2612 MDIO_PMA_DEVAD,
2622 MDIO_PMA_REG_GEN_CTRL, 2613 MDIO_PMA_REG_GEN_CTRL,