diff options
author | Eilon Greenstein <eilong@broadcom.com> | 2009-03-02 02:59:52 -0500 |
---|---|---|
committer | David S. Miller <davem@davemloft.net> | 2009-03-03 01:32:41 -0500 |
commit | 490c3c9bf986545bdd99dcd4b0045c747564be39 (patch) | |
tree | 85da6e9765fc60794208d001d2a9c477decc7b4d /drivers/net/bnx2x_init.h | |
parent | 2059aba7e40afb18e578ce57cc48fc3c782a531b (diff) |
bnx2x: Using DMA engine
Using DMA engine (DMAE) to initialize large consecutive memories in the chip
Signed-off-by: Eilon Greenstein <eilong@broadcom.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers/net/bnx2x_init.h')
-rw-r--r-- | drivers/net/bnx2x_init.h | 36 |
1 files changed, 19 insertions, 17 deletions
diff --git a/drivers/net/bnx2x_init.h b/drivers/net/bnx2x_init.h index 8af27573afe8..5362d5a42acb 100644 --- a/drivers/net/bnx2x_init.h +++ b/drivers/net/bnx2x_init.h | |||
@@ -22,12 +22,15 @@ | |||
22 | #define INIT_ASIC 0x4 | 22 | #define INIT_ASIC 0x4 |
23 | #define INIT_HARDWARE 0x7 | 23 | #define INIT_HARDWARE 0x7 |
24 | 24 | ||
25 | #define STORM_INTMEM_SIZE_E1 (0x5800 / 4) | 25 | #define TSTORM_INTMEM_ADDR TSEM_REG_FAST_MEMORY |
26 | #define STORM_INTMEM_SIZE_E1H (0x10000 / 4) | 26 | #define CSTORM_INTMEM_ADDR CSEM_REG_FAST_MEMORY |
27 | #define TSTORM_INTMEM_ADDR 0x1a0000 | 27 | #define XSTORM_INTMEM_ADDR XSEM_REG_FAST_MEMORY |
28 | #define CSTORM_INTMEM_ADDR 0x220000 | 28 | #define USTORM_INTMEM_ADDR USEM_REG_FAST_MEMORY |
29 | #define XSTORM_INTMEM_ADDR 0x2a0000 | 29 | /* RAM0 size in bytes */ |
30 | #define USTORM_INTMEM_ADDR 0x320000 | 30 | #define STORM_INTMEM_SIZE_E1 0x5800 |
31 | #define STORM_INTMEM_SIZE_E1H 0x10000 | ||
32 | #define STORM_INTMEM_SIZE(bp) ((CHIP_IS_E1H(bp) ? STORM_INTMEM_SIZE_E1H : \ | ||
33 | STORM_INTMEM_SIZE_E1) / 4) | ||
31 | 34 | ||
32 | 35 | ||
33 | /* Init operation types and structures */ | 36 | /* Init operation types and structures */ |
@@ -150,7 +153,6 @@ static void bnx2x_init_ind_wr(struct bnx2x *bp, u32 addr, const u32 *data, | |||
150 | 153 | ||
151 | static void bnx2x_write_big_buf(struct bnx2x *bp, u32 addr, u32 len) | 154 | static void bnx2x_write_big_buf(struct bnx2x *bp, u32 addr, u32 len) |
152 | { | 155 | { |
153 | #ifdef USE_DMAE | ||
154 | int offset = 0; | 156 | int offset = 0; |
155 | 157 | ||
156 | if (bp->dmae_ready) { | 158 | if (bp->dmae_ready) { |
@@ -164,21 +166,21 @@ static void bnx2x_write_big_buf(struct bnx2x *bp, u32 addr, u32 len) | |||
164 | addr + offset, len); | 166 | addr + offset, len); |
165 | } else | 167 | } else |
166 | bnx2x_init_str_wr(bp, addr, bp->gunzip_buf, len); | 168 | bnx2x_init_str_wr(bp, addr, bp->gunzip_buf, len); |
167 | #else | ||
168 | bnx2x_init_str_wr(bp, addr, bp->gunzip_buf, len); | ||
169 | #endif | ||
170 | } | 169 | } |
171 | 170 | ||
172 | static void bnx2x_init_fill(struct bnx2x *bp, u32 addr, int fill, u32 len) | 171 | static void bnx2x_init_fill(struct bnx2x *bp, u32 addr, int fill, u32 len) |
173 | { | 172 | { |
174 | if ((len * 4) > FW_BUF_SIZE) { | 173 | u32 buf_len = (((len * 4) > FW_BUF_SIZE) ? FW_BUF_SIZE : (len * 4)); |
175 | BNX2X_ERR("LARGE DMAE OPERATION ! addr 0x%x len 0x%x\n", | 174 | u32 buf_len32 = buf_len / 4; |
176 | addr, len*4); | 175 | int i; |
177 | return; | ||
178 | } | ||
179 | memset(bp->gunzip_buf, fill, len * 4); | ||
180 | 176 | ||
181 | bnx2x_write_big_buf(bp, addr, len); | 177 | memset(bp->gunzip_buf, fill, buf_len); |
178 | |||
179 | for (i = 0; i < len; i += buf_len32) { | ||
180 | u32 cur_len = min(buf_len32, len - i); | ||
181 | |||
182 | bnx2x_write_big_buf(bp, addr + i * 4, cur_len); | ||
183 | } | ||
182 | } | 184 | } |
183 | 185 | ||
184 | static void bnx2x_init_wr_64(struct bnx2x *bp, u32 addr, const u32 *data, | 186 | static void bnx2x_init_wr_64(struct bnx2x *bp, u32 addr, const u32 *data, |