aboutsummaryrefslogtreecommitdiffstats
path: root/drivers/net/bnx2x_hsi.h
diff options
context:
space:
mode:
authorEilon Greenstein <eilong@broadcom.com>2009-02-12 03:36:55 -0500
committerDavid S. Miller <davem@davemloft.net>2009-02-16 02:31:24 -0500
commit589abe3a0f594a7707a15674ca9e80370c972832 (patch)
treea7930047ca7f5340b9053948fcba98128de4d588 /drivers/net/bnx2x_hsi.h
parent4acac6a53a3c9dfc604a9a8647f16b0242080e93 (diff)
bnx2x: Supporting BCM8726 PHY
Also adding the ability to recognize the optic module and disable it if it is not authorized for safety reasons - since this feature might upset some users which are willing to take the risk, it is optional and can be disabled by setting an nvram bit (or a trivial driver patch to set this bit). This dual port PHY requires special handling if the ports are swapped. Signed-off-by: Yaniv Rosner <yanivr@broadcom.com> Signed-off-by: Eilon Greenstein <eilong@broadcom.com> Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers/net/bnx2x_hsi.h')
-rw-r--r--drivers/net/bnx2x_hsi.h13
1 files changed, 12 insertions, 1 deletions
diff --git a/drivers/net/bnx2x_hsi.h b/drivers/net/bnx2x_hsi.h
index 85e4df68b5d8..7b9acb3667ef 100644
--- a/drivers/net/bnx2x_hsi.h
+++ b/drivers/net/bnx2x_hsi.h
@@ -245,7 +245,7 @@ struct port_hw_cfg { /* port 0: 0x12c port 1: 0x2bc */
245#define PORT_HW_CFG_XGXS_EXT_PHY_TYPE_BCM8073 0x00000300 245#define PORT_HW_CFG_XGXS_EXT_PHY_TYPE_BCM8073 0x00000300
246#define PORT_HW_CFG_XGXS_EXT_PHY_TYPE_BCM8705 0x00000400 246#define PORT_HW_CFG_XGXS_EXT_PHY_TYPE_BCM8705 0x00000400
247#define PORT_HW_CFG_XGXS_EXT_PHY_TYPE_BCM8706 0x00000500 247#define PORT_HW_CFG_XGXS_EXT_PHY_TYPE_BCM8706 0x00000500
248#define PORT_HW_CFG_XGXS_EXT_PHY_TYPE_BCM8276 0x00000600 248#define PORT_HW_CFG_XGXS_EXT_PHY_TYPE_BCM8726 0x00000600
249#define PORT_HW_CFG_XGXS_EXT_PHY_TYPE_BCM8481 0x00000700 249#define PORT_HW_CFG_XGXS_EXT_PHY_TYPE_BCM8481 0x00000700
250#define PORT_HW_CFG_XGXS_EXT_PHY_TYPE_SFX7101 0x00000800 250#define PORT_HW_CFG_XGXS_EXT_PHY_TYPE_SFX7101 0x00000800
251#define PORT_HW_CFG_XGXS_EXT_PHY_TYPE_FAILURE 0x0000fd00 251#define PORT_HW_CFG_XGXS_EXT_PHY_TYPE_FAILURE 0x0000fd00
@@ -299,6 +299,12 @@ struct shared_feat_cfg { /* NVRAM Offset */
299 299
300 u32 config; /* 0x450 */ 300 u32 config; /* 0x450 */
301#define SHARED_FEATURE_BMC_ECHO_MODE_EN 0x00000001 301#define SHARED_FEATURE_BMC_ECHO_MODE_EN 0x00000001
302
303 /* Use the values from options 47 and 48 instead of the HW default
304 values */
305#define SHARED_FEAT_CFG_OVERRIDE_PREEMPHASIS_CFG_DISABLED 0x00000000
306#define SHARED_FEAT_CFG_OVERRIDE_PREEMPHASIS_CFG_ENABLED 0x00000002
307
302#define SHARED_FEATURE_MF_MODE_DISABLED 0x00000100 308#define SHARED_FEATURE_MF_MODE_DISABLED 0x00000100
303 309
304}; 310};
@@ -352,6 +358,11 @@ struct port_feat_cfg { /* port 0: 0x454 port 1: 0x4c8 */
352#define PORT_FEATURE_MBA_ENABLED 0x02000000 358#define PORT_FEATURE_MBA_ENABLED 0x02000000
353#define PORT_FEATURE_MFW_ENABLED 0x04000000 359#define PORT_FEATURE_MFW_ENABLED 0x04000000
354 360
361 /* Check the optic vendor via i2c before allowing it to be used by
362 SW */
363#define PORT_FEAT_CFG_OPT_MDL_ENFRCMNT_DISABLED 0x00000000
364#define PORT_FEAT_CFG_OPT_MDL_ENFRCMNT_ENABLED 0x08000000
365
355 u32 wol_config; 366 u32 wol_config;
356 /* Default is used when driver sets to "auto" mode */ 367 /* Default is used when driver sets to "auto" mode */
357#define PORT_FEATURE_WOL_DEFAULT_MASK 0x00000003 368#define PORT_FEATURE_WOL_DEFAULT_MASK 0x00000003