bnx2x: Supporting Device Control Channel

In multi-function mode, the FW can receive special management control commands
to set the Min/Max BW and the the function link state

Signed-off-by: Eilon Greenstein <eilong@broadcom.com>
Signed-off-by: David S. Miller <davem@davemloft.net>

1 files changed, 30 insertions, 4 deletions

diff --git a/drivers/net/bnx2x_hsi.h b/drivers/net/bnx2x_hsi.h
index da62cc5608d3..8e2261fad485 100644
--- a/drivers/net/bnx2x_hsi.h
+++ b/drivers/net/bnx2x_hsi.h
@@ -658,6 +658,8 @@ struct drv_func_mb {
 #define DRV_MSG_CODE_UNLOAD_REQ_WOL_DIS                 0x20010000
 #define DRV_MSG_CODE_UNLOAD_REQ_WOL_MCP                 0x20020000
 #define DRV_MSG_CODE_UNLOAD_DONE                        0x21000000
+#define DRV_MSG_CODE_DCC_OK                             0x30000000
+#define DRV_MSG_CODE_DCC_FAILURE                        0x31000000
 #define DRV_MSG_CODE_DIAG_ENTER_REQ                     0x50000000
 #define DRV_MSG_CODE_DIAG_EXIT_REQ                      0x60000000
 #define DRV_MSG_CODE_VALIDATE_KEY                       0x70000000
@@ -692,6 +694,7 @@ struct drv_func_mb {
 #define FW_MSG_CODE_DRV_UNLOAD_PORT                     0x20110000
 #define FW_MSG_CODE_DRV_UNLOAD_FUNCTION                 0x20120000
 #define FW_MSG_CODE_DRV_UNLOAD_DONE                     0x21100000
+#define FW_MSG_CODE_DCC_DONE                            0x30100000
 #define FW_MSG_CODE_DIAG_ENTER_DONE                     0x50100000
 #define FW_MSG_CODE_DIAG_REFUSE                         0x50200000
 #define FW_MSG_CODE_DIAG_EXIT_DONE                      0x60100000
@@ -742,6 +745,14 @@ struct drv_func_mb {
         u32 drv_status;
 #define DRV_STATUS_PMF                                  0x00000001
 
+#define DRV_STATUS_DCC_EVENT_MASK                       0x0000ff00
+#define DRV_STATUS_DCC_DISABLE_ENABLE_PF                0x00000100
+#define DRV_STATUS_DCC_BANDWIDTH_ALLOCATION             0x00000200
+#define DRV_STATUS_DCC_CHANGE_MAC_ADDRESS               0x00000400
+#define DRV_STATUS_DCC_RESERVED1                        0x00000800
+#define DRV_STATUS_DCC_SET_PROTOCOL                     0x00001000
+#define DRV_STATUS_DCC_SET_PRIORITY                     0x00002000
+
         u32 virt_mac_upper;
 #define VIRT_MAC_SIGN_MASK                              0xffff0000
 #define VIRT_MAC_SIGNATURE                              0x564d0000
@@ -778,10 +789,9 @@ struct shared_mf_cfg {
 struct port_mf_cfg {
 
         u32 dynamic_cfg;        /* device control channel */
-#define PORT_MF_CFG_OUTER_VLAN_TAG_MASK             0x0000ffff
-#define PORT_MF_CFG_OUTER_VLAN_TAG_SHIFT            0
-#define PORT_MF_CFG_DYNAMIC_CFG_ENABLED             0x00010000
-#define PORT_MF_CFG_DYNAMIC_CFG_DEFAULT             0x00000000
+#define PORT_MF_CFG_E1HOV_TAG_MASK                  0x0000ffff
+#define PORT_MF_CFG_E1HOV_TAG_SHIFT                 0
+#define PORT_MF_CFG_E1HOV_TAG_DEFAULT               PORT_MF_CFG_E1HOV_TAG_MASK
 
         u32 reserved[3];
 
@@ -885,6 +895,22 @@ struct shmem_region {			       /*   SharedMem Offset (size) */
 };                                                     /* 0x6dc */
 
 
+struct shmem2_region {
+
+        u32                     size;
+
+        u32                     dcc_support;
+#define SHMEM_DCC_SUPPORT_NONE                      0x00000000
+#define SHMEM_DCC_SUPPORT_DISABLE_ENABLE_PF_TLV     0x00000001
+#define SHMEM_DCC_SUPPORT_BANDWIDTH_ALLOCATION_TLV  0x00000004
+#define SHMEM_DCC_SUPPORT_CHANGE_MAC_ADDRESS_TLV    0x00000008
+#define SHMEM_DCC_SUPPORT_SET_PROTOCOL_TLV          0x00000040
+#define SHMEM_DCC_SUPPORT_SET_PRIORITY_TLV          0x00000080
+#define SHMEM_DCC_SUPPORT_DEFAULT                   SHMEM_DCC_SUPPORT_NONE
+
+};
+
+
 struct emac_stats {
     u32     rx_stat_ifhcinoctets;
     u32     rx_stat_ifhcinbadoctets;