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authorDmitry Kravkov <dmitry@broadcom.com>2010-07-27 08:36:15 -0400
committerDavid S. Miller <davem@davemloft.net>2010-07-27 23:35:42 -0400
commit6c719d00bd99113a4af417620d891aeba98b8d03 (patch)
tree37ea9444a060e0fae54219d890d980aca0fdba86 /drivers/net/bnx2x/bnx2x_stats.c
parentde0c62dba71389bcf3d9249d6e6edbc5a032c5ce (diff)
bnx2x: Move statistics handling code to bnx2x_stats.*
Signed-off-by: Dmitry Kravkov <dmitry@broadcom.com> Signed-off-by: Eilon Greenstein <eilong@broadcom.com> Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers/net/bnx2x/bnx2x_stats.c')
-rw-r--r--drivers/net/bnx2x/bnx2x_stats.c1400
1 files changed, 1400 insertions, 0 deletions
diff --git a/drivers/net/bnx2x/bnx2x_stats.c b/drivers/net/bnx2x/bnx2x_stats.c
new file mode 100644
index 000000000000..3f5127720423
--- /dev/null
+++ b/drivers/net/bnx2x/bnx2x_stats.c
@@ -0,0 +1,1400 @@
1/* bnx2x_stats.c: Broadcom Everest network driver.
2 *
3 * Copyright (c) 2007-2010 Broadcom Corporation
4 *
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License as published by
7 * the Free Software Foundation.
8 *
9 * Maintained by: Eilon Greenstein <eilong@broadcom.com>
10 * Written by: Eliezer Tamir
11 * Based on code from Michael Chan's bnx2 driver
12 * UDP CSUM errata workaround by Arik Gendelman
13 * Slowpath and fastpath rework by Vladislav Zolotarov
14 * Statistics and Link management by Yitchak Gertner
15 *
16 */
17 #include "bnx2x_cmn.h"
18 #include "bnx2x_stats.h"
19
20/* Statistics */
21
22/****************************************************************************
23* Macros
24****************************************************************************/
25
26/* sum[hi:lo] += add[hi:lo] */
27#define ADD_64(s_hi, a_hi, s_lo, a_lo) \
28 do { \
29 s_lo += a_lo; \
30 s_hi += a_hi + ((s_lo < a_lo) ? 1 : 0); \
31 } while (0)
32
33/* difference = minuend - subtrahend */
34#define DIFF_64(d_hi, m_hi, s_hi, d_lo, m_lo, s_lo) \
35 do { \
36 if (m_lo < s_lo) { \
37 /* underflow */ \
38 d_hi = m_hi - s_hi; \
39 if (d_hi > 0) { \
40 /* we can 'loan' 1 */ \
41 d_hi--; \
42 d_lo = m_lo + (UINT_MAX - s_lo) + 1; \
43 } else { \
44 /* m_hi <= s_hi */ \
45 d_hi = 0; \
46 d_lo = 0; \
47 } \
48 } else { \
49 /* m_lo >= s_lo */ \
50 if (m_hi < s_hi) { \
51 d_hi = 0; \
52 d_lo = 0; \
53 } else { \
54 /* m_hi >= s_hi */ \
55 d_hi = m_hi - s_hi; \
56 d_lo = m_lo - s_lo; \
57 } \
58 } \
59 } while (0)
60
61#define UPDATE_STAT64(s, t) \
62 do { \
63 DIFF_64(diff.hi, new->s##_hi, pstats->mac_stx[0].t##_hi, \
64 diff.lo, new->s##_lo, pstats->mac_stx[0].t##_lo); \
65 pstats->mac_stx[0].t##_hi = new->s##_hi; \
66 pstats->mac_stx[0].t##_lo = new->s##_lo; \
67 ADD_64(pstats->mac_stx[1].t##_hi, diff.hi, \
68 pstats->mac_stx[1].t##_lo, diff.lo); \
69 } while (0)
70
71#define UPDATE_STAT64_NIG(s, t) \
72 do { \
73 DIFF_64(diff.hi, new->s##_hi, old->s##_hi, \
74 diff.lo, new->s##_lo, old->s##_lo); \
75 ADD_64(estats->t##_hi, diff.hi, \
76 estats->t##_lo, diff.lo); \
77 } while (0)
78
79/* sum[hi:lo] += add */
80#define ADD_EXTEND_64(s_hi, s_lo, a) \
81 do { \
82 s_lo += a; \
83 s_hi += (s_lo < a) ? 1 : 0; \
84 } while (0)
85
86#define UPDATE_EXTEND_STAT(s) \
87 do { \
88 ADD_EXTEND_64(pstats->mac_stx[1].s##_hi, \
89 pstats->mac_stx[1].s##_lo, \
90 new->s); \
91 } while (0)
92
93#define UPDATE_EXTEND_TSTAT(s, t) \
94 do { \
95 diff = le32_to_cpu(tclient->s) - le32_to_cpu(old_tclient->s); \
96 old_tclient->s = tclient->s; \
97 ADD_EXTEND_64(qstats->t##_hi, qstats->t##_lo, diff); \
98 } while (0)
99
100#define UPDATE_EXTEND_USTAT(s, t) \
101 do { \
102 diff = le32_to_cpu(uclient->s) - le32_to_cpu(old_uclient->s); \
103 old_uclient->s = uclient->s; \
104 ADD_EXTEND_64(qstats->t##_hi, qstats->t##_lo, diff); \
105 } while (0)
106
107#define UPDATE_EXTEND_XSTAT(s, t) \
108 do { \
109 diff = le32_to_cpu(xclient->s) - le32_to_cpu(old_xclient->s); \
110 old_xclient->s = xclient->s; \
111 ADD_EXTEND_64(qstats->t##_hi, qstats->t##_lo, diff); \
112 } while (0)
113
114/* minuend -= subtrahend */
115#define SUB_64(m_hi, s_hi, m_lo, s_lo) \
116 do { \
117 DIFF_64(m_hi, m_hi, s_hi, m_lo, m_lo, s_lo); \
118 } while (0)
119
120/* minuend[hi:lo] -= subtrahend */
121#define SUB_EXTEND_64(m_hi, m_lo, s) \
122 do { \
123 SUB_64(m_hi, 0, m_lo, s); \
124 } while (0)
125
126#define SUB_EXTEND_USTAT(s, t) \
127 do { \
128 diff = le32_to_cpu(uclient->s) - le32_to_cpu(old_uclient->s); \
129 SUB_EXTEND_64(qstats->t##_hi, qstats->t##_lo, diff); \
130 } while (0)
131
132/*
133 * General service functions
134 */
135
136static inline long bnx2x_hilo(u32 *hiref)
137{
138 u32 lo = *(hiref + 1);
139#if (BITS_PER_LONG == 64)
140 u32 hi = *hiref;
141
142 return HILO_U64(hi, lo);
143#else
144 return lo;
145#endif
146}
147
148/*
149 * Init service functions
150 */
151
152
153static void bnx2x_storm_stats_post(struct bnx2x *bp)
154{
155 if (!bp->stats_pending) {
156 struct eth_query_ramrod_data ramrod_data = {0};
157 int i, rc;
158
159 ramrod_data.drv_counter = bp->stats_counter++;
160 ramrod_data.collect_port = bp->port.pmf ? 1 : 0;
161 for_each_queue(bp, i)
162 ramrod_data.ctr_id_vector |= (1 << bp->fp[i].cl_id);
163
164 rc = bnx2x_sp_post(bp, RAMROD_CMD_ID_ETH_STAT_QUERY, 0,
165 ((u32 *)&ramrod_data)[1],
166 ((u32 *)&ramrod_data)[0], 0);
167 if (rc == 0) {
168 /* stats ramrod has it's own slot on the spq */
169 bp->spq_left++;
170 bp->stats_pending = 1;
171 }
172 }
173}
174
175static void bnx2x_hw_stats_post(struct bnx2x *bp)
176{
177 struct dmae_command *dmae = &bp->stats_dmae;
178 u32 *stats_comp = bnx2x_sp(bp, stats_comp);
179
180 *stats_comp = DMAE_COMP_VAL;
181 if (CHIP_REV_IS_SLOW(bp))
182 return;
183
184 /* loader */
185 if (bp->executer_idx) {
186 int loader_idx = PMF_DMAE_C(bp);
187
188 memset(dmae, 0, sizeof(struct dmae_command));
189
190 dmae->opcode = (DMAE_CMD_SRC_PCI | DMAE_CMD_DST_GRC |
191 DMAE_CMD_C_DST_GRC | DMAE_CMD_C_ENABLE |
192 DMAE_CMD_DST_RESET |
193#ifdef __BIG_ENDIAN
194 DMAE_CMD_ENDIANITY_B_DW_SWAP |
195#else
196 DMAE_CMD_ENDIANITY_DW_SWAP |
197#endif
198 (BP_PORT(bp) ? DMAE_CMD_PORT_1 :
199 DMAE_CMD_PORT_0) |
200 (BP_E1HVN(bp) << DMAE_CMD_E1HVN_SHIFT));
201 dmae->src_addr_lo = U64_LO(bnx2x_sp_mapping(bp, dmae[0]));
202 dmae->src_addr_hi = U64_HI(bnx2x_sp_mapping(bp, dmae[0]));
203 dmae->dst_addr_lo = (DMAE_REG_CMD_MEM +
204 sizeof(struct dmae_command) *
205 (loader_idx + 1)) >> 2;
206 dmae->dst_addr_hi = 0;
207 dmae->len = sizeof(struct dmae_command) >> 2;
208 if (CHIP_IS_E1(bp))
209 dmae->len--;
210 dmae->comp_addr_lo = dmae_reg_go_c[loader_idx + 1] >> 2;
211 dmae->comp_addr_hi = 0;
212 dmae->comp_val = 1;
213
214 *stats_comp = 0;
215 bnx2x_post_dmae(bp, dmae, loader_idx);
216
217 } else if (bp->func_stx) {
218 *stats_comp = 0;
219 bnx2x_post_dmae(bp, dmae, INIT_DMAE_C(bp));
220 }
221}
222
223static int bnx2x_stats_comp(struct bnx2x *bp)
224{
225 u32 *stats_comp = bnx2x_sp(bp, stats_comp);
226 int cnt = 10;
227
228 might_sleep();
229 while (*stats_comp != DMAE_COMP_VAL) {
230 if (!cnt) {
231 BNX2X_ERR("timeout waiting for stats finished\n");
232 break;
233 }
234 cnt--;
235 msleep(1);
236 }
237 return 1;
238}
239
240/*
241 * Statistics service functions
242 */
243
244static void bnx2x_stats_pmf_update(struct bnx2x *bp)
245{
246 struct dmae_command *dmae;
247 u32 opcode;
248 int loader_idx = PMF_DMAE_C(bp);
249 u32 *stats_comp = bnx2x_sp(bp, stats_comp);
250
251 /* sanity */
252 if (!IS_E1HMF(bp) || !bp->port.pmf || !bp->port.port_stx) {
253 BNX2X_ERR("BUG!\n");
254 return;
255 }
256
257 bp->executer_idx = 0;
258
259 opcode = (DMAE_CMD_SRC_GRC | DMAE_CMD_DST_PCI |
260 DMAE_CMD_C_ENABLE |
261 DMAE_CMD_SRC_RESET | DMAE_CMD_DST_RESET |
262#ifdef __BIG_ENDIAN
263 DMAE_CMD_ENDIANITY_B_DW_SWAP |
264#else
265 DMAE_CMD_ENDIANITY_DW_SWAP |
266#endif
267 (BP_PORT(bp) ? DMAE_CMD_PORT_1 : DMAE_CMD_PORT_0) |
268 (BP_E1HVN(bp) << DMAE_CMD_E1HVN_SHIFT));
269
270 dmae = bnx2x_sp(bp, dmae[bp->executer_idx++]);
271 dmae->opcode = (opcode | DMAE_CMD_C_DST_GRC);
272 dmae->src_addr_lo = bp->port.port_stx >> 2;
273 dmae->src_addr_hi = 0;
274 dmae->dst_addr_lo = U64_LO(bnx2x_sp_mapping(bp, port_stats));
275 dmae->dst_addr_hi = U64_HI(bnx2x_sp_mapping(bp, port_stats));
276 dmae->len = DMAE_LEN32_RD_MAX;
277 dmae->comp_addr_lo = dmae_reg_go_c[loader_idx] >> 2;
278 dmae->comp_addr_hi = 0;
279 dmae->comp_val = 1;
280
281 dmae = bnx2x_sp(bp, dmae[bp->executer_idx++]);
282 dmae->opcode = (opcode | DMAE_CMD_C_DST_PCI);
283 dmae->src_addr_lo = (bp->port.port_stx >> 2) + DMAE_LEN32_RD_MAX;
284 dmae->src_addr_hi = 0;
285 dmae->dst_addr_lo = U64_LO(bnx2x_sp_mapping(bp, port_stats) +
286 DMAE_LEN32_RD_MAX * 4);
287 dmae->dst_addr_hi = U64_HI(bnx2x_sp_mapping(bp, port_stats) +
288 DMAE_LEN32_RD_MAX * 4);
289 dmae->len = (sizeof(struct host_port_stats) >> 2) - DMAE_LEN32_RD_MAX;
290 dmae->comp_addr_lo = U64_LO(bnx2x_sp_mapping(bp, stats_comp));
291 dmae->comp_addr_hi = U64_HI(bnx2x_sp_mapping(bp, stats_comp));
292 dmae->comp_val = DMAE_COMP_VAL;
293
294 *stats_comp = 0;
295 bnx2x_hw_stats_post(bp);
296 bnx2x_stats_comp(bp);
297}
298
299static void bnx2x_port_stats_init(struct bnx2x *bp)
300{
301 struct dmae_command *dmae;
302 int port = BP_PORT(bp);
303 int vn = BP_E1HVN(bp);
304 u32 opcode;
305 int loader_idx = PMF_DMAE_C(bp);
306 u32 mac_addr;
307 u32 *stats_comp = bnx2x_sp(bp, stats_comp);
308
309 /* sanity */
310 if (!bp->link_vars.link_up || !bp->port.pmf) {
311 BNX2X_ERR("BUG!\n");
312 return;
313 }
314
315 bp->executer_idx = 0;
316
317 /* MCP */
318 opcode = (DMAE_CMD_SRC_PCI | DMAE_CMD_DST_GRC |
319 DMAE_CMD_C_DST_GRC | DMAE_CMD_C_ENABLE |
320 DMAE_CMD_SRC_RESET | DMAE_CMD_DST_RESET |
321#ifdef __BIG_ENDIAN
322 DMAE_CMD_ENDIANITY_B_DW_SWAP |
323#else
324 DMAE_CMD_ENDIANITY_DW_SWAP |
325#endif
326 (port ? DMAE_CMD_PORT_1 : DMAE_CMD_PORT_0) |
327 (vn << DMAE_CMD_E1HVN_SHIFT));
328
329 if (bp->port.port_stx) {
330
331 dmae = bnx2x_sp(bp, dmae[bp->executer_idx++]);
332 dmae->opcode = opcode;
333 dmae->src_addr_lo = U64_LO(bnx2x_sp_mapping(bp, port_stats));
334 dmae->src_addr_hi = U64_HI(bnx2x_sp_mapping(bp, port_stats));
335 dmae->dst_addr_lo = bp->port.port_stx >> 2;
336 dmae->dst_addr_hi = 0;
337 dmae->len = sizeof(struct host_port_stats) >> 2;
338 dmae->comp_addr_lo = dmae_reg_go_c[loader_idx] >> 2;
339 dmae->comp_addr_hi = 0;
340 dmae->comp_val = 1;
341 }
342
343 if (bp->func_stx) {
344
345 dmae = bnx2x_sp(bp, dmae[bp->executer_idx++]);
346 dmae->opcode = opcode;
347 dmae->src_addr_lo = U64_LO(bnx2x_sp_mapping(bp, func_stats));
348 dmae->src_addr_hi = U64_HI(bnx2x_sp_mapping(bp, func_stats));
349 dmae->dst_addr_lo = bp->func_stx >> 2;
350 dmae->dst_addr_hi = 0;
351 dmae->len = sizeof(struct host_func_stats) >> 2;
352 dmae->comp_addr_lo = dmae_reg_go_c[loader_idx] >> 2;
353 dmae->comp_addr_hi = 0;
354 dmae->comp_val = 1;
355 }
356
357 /* MAC */
358 opcode = (DMAE_CMD_SRC_GRC | DMAE_CMD_DST_PCI |
359 DMAE_CMD_C_DST_GRC | DMAE_CMD_C_ENABLE |
360 DMAE_CMD_SRC_RESET | DMAE_CMD_DST_RESET |
361#ifdef __BIG_ENDIAN
362 DMAE_CMD_ENDIANITY_B_DW_SWAP |
363#else
364 DMAE_CMD_ENDIANITY_DW_SWAP |
365#endif
366 (port ? DMAE_CMD_PORT_1 : DMAE_CMD_PORT_0) |
367 (vn << DMAE_CMD_E1HVN_SHIFT));
368
369 if (bp->link_vars.mac_type == MAC_TYPE_BMAC) {
370
371 mac_addr = (port ? NIG_REG_INGRESS_BMAC1_MEM :
372 NIG_REG_INGRESS_BMAC0_MEM);
373
374 /* BIGMAC_REGISTER_TX_STAT_GTPKT ..
375 BIGMAC_REGISTER_TX_STAT_GTBYT */
376 dmae = bnx2x_sp(bp, dmae[bp->executer_idx++]);
377 dmae->opcode = opcode;
378 dmae->src_addr_lo = (mac_addr +
379 BIGMAC_REGISTER_TX_STAT_GTPKT) >> 2;
380 dmae->src_addr_hi = 0;
381 dmae->dst_addr_lo = U64_LO(bnx2x_sp_mapping(bp, mac_stats));
382 dmae->dst_addr_hi = U64_HI(bnx2x_sp_mapping(bp, mac_stats));
383 dmae->len = (8 + BIGMAC_REGISTER_TX_STAT_GTBYT -
384 BIGMAC_REGISTER_TX_STAT_GTPKT) >> 2;
385 dmae->comp_addr_lo = dmae_reg_go_c[loader_idx] >> 2;
386 dmae->comp_addr_hi = 0;
387 dmae->comp_val = 1;
388
389 /* BIGMAC_REGISTER_RX_STAT_GR64 ..
390 BIGMAC_REGISTER_RX_STAT_GRIPJ */
391 dmae = bnx2x_sp(bp, dmae[bp->executer_idx++]);
392 dmae->opcode = opcode;
393 dmae->src_addr_lo = (mac_addr +
394 BIGMAC_REGISTER_RX_STAT_GR64) >> 2;
395 dmae->src_addr_hi = 0;
396 dmae->dst_addr_lo = U64_LO(bnx2x_sp_mapping(bp, mac_stats) +
397 offsetof(struct bmac_stats, rx_stat_gr64_lo));
398 dmae->dst_addr_hi = U64_HI(bnx2x_sp_mapping(bp, mac_stats) +
399 offsetof(struct bmac_stats, rx_stat_gr64_lo));
400 dmae->len = (8 + BIGMAC_REGISTER_RX_STAT_GRIPJ -
401 BIGMAC_REGISTER_RX_STAT_GR64) >> 2;
402 dmae->comp_addr_lo = dmae_reg_go_c[loader_idx] >> 2;
403 dmae->comp_addr_hi = 0;
404 dmae->comp_val = 1;
405
406 } else if (bp->link_vars.mac_type == MAC_TYPE_EMAC) {
407
408 mac_addr = (port ? GRCBASE_EMAC1 : GRCBASE_EMAC0);
409
410 /* EMAC_REG_EMAC_RX_STAT_AC (EMAC_REG_EMAC_RX_STAT_AC_COUNT)*/
411 dmae = bnx2x_sp(bp, dmae[bp->executer_idx++]);
412 dmae->opcode = opcode;
413 dmae->src_addr_lo = (mac_addr +
414 EMAC_REG_EMAC_RX_STAT_AC) >> 2;
415 dmae->src_addr_hi = 0;
416 dmae->dst_addr_lo = U64_LO(bnx2x_sp_mapping(bp, mac_stats));
417 dmae->dst_addr_hi = U64_HI(bnx2x_sp_mapping(bp, mac_stats));
418 dmae->len = EMAC_REG_EMAC_RX_STAT_AC_COUNT;
419 dmae->comp_addr_lo = dmae_reg_go_c[loader_idx] >> 2;
420 dmae->comp_addr_hi = 0;
421 dmae->comp_val = 1;
422
423 /* EMAC_REG_EMAC_RX_STAT_AC_28 */
424 dmae = bnx2x_sp(bp, dmae[bp->executer_idx++]);
425 dmae->opcode = opcode;
426 dmae->src_addr_lo = (mac_addr +
427 EMAC_REG_EMAC_RX_STAT_AC_28) >> 2;
428 dmae->src_addr_hi = 0;
429 dmae->dst_addr_lo = U64_LO(bnx2x_sp_mapping(bp, mac_stats) +
430 offsetof(struct emac_stats, rx_stat_falsecarriererrors));
431 dmae->dst_addr_hi = U64_HI(bnx2x_sp_mapping(bp, mac_stats) +
432 offsetof(struct emac_stats, rx_stat_falsecarriererrors));
433 dmae->len = 1;
434 dmae->comp_addr_lo = dmae_reg_go_c[loader_idx] >> 2;
435 dmae->comp_addr_hi = 0;
436 dmae->comp_val = 1;
437
438 /* EMAC_REG_EMAC_TX_STAT_AC (EMAC_REG_EMAC_TX_STAT_AC_COUNT)*/
439 dmae = bnx2x_sp(bp, dmae[bp->executer_idx++]);
440 dmae->opcode = opcode;
441 dmae->src_addr_lo = (mac_addr +
442 EMAC_REG_EMAC_TX_STAT_AC) >> 2;
443 dmae->src_addr_hi = 0;
444 dmae->dst_addr_lo = U64_LO(bnx2x_sp_mapping(bp, mac_stats) +
445 offsetof(struct emac_stats, tx_stat_ifhcoutoctets));
446 dmae->dst_addr_hi = U64_HI(bnx2x_sp_mapping(bp, mac_stats) +
447 offsetof(struct emac_stats, tx_stat_ifhcoutoctets));
448 dmae->len = EMAC_REG_EMAC_TX_STAT_AC_COUNT;
449 dmae->comp_addr_lo = dmae_reg_go_c[loader_idx] >> 2;
450 dmae->comp_addr_hi = 0;
451 dmae->comp_val = 1;
452 }
453
454 /* NIG */
455 dmae = bnx2x_sp(bp, dmae[bp->executer_idx++]);
456 dmae->opcode = opcode;
457 dmae->src_addr_lo = (port ? NIG_REG_STAT1_BRB_DISCARD :
458 NIG_REG_STAT0_BRB_DISCARD) >> 2;
459 dmae->src_addr_hi = 0;
460 dmae->dst_addr_lo = U64_LO(bnx2x_sp_mapping(bp, nig_stats));
461 dmae->dst_addr_hi = U64_HI(bnx2x_sp_mapping(bp, nig_stats));
462 dmae->len = (sizeof(struct nig_stats) - 4*sizeof(u32)) >> 2;
463 dmae->comp_addr_lo = dmae_reg_go_c[loader_idx] >> 2;
464 dmae->comp_addr_hi = 0;
465 dmae->comp_val = 1;
466
467 dmae = bnx2x_sp(bp, dmae[bp->executer_idx++]);
468 dmae->opcode = opcode;
469 dmae->src_addr_lo = (port ? NIG_REG_STAT1_EGRESS_MAC_PKT0 :
470 NIG_REG_STAT0_EGRESS_MAC_PKT0) >> 2;
471 dmae->src_addr_hi = 0;
472 dmae->dst_addr_lo = U64_LO(bnx2x_sp_mapping(bp, nig_stats) +
473 offsetof(struct nig_stats, egress_mac_pkt0_lo));
474 dmae->dst_addr_hi = U64_HI(bnx2x_sp_mapping(bp, nig_stats) +
475 offsetof(struct nig_stats, egress_mac_pkt0_lo));
476 dmae->len = (2*sizeof(u32)) >> 2;
477 dmae->comp_addr_lo = dmae_reg_go_c[loader_idx] >> 2;
478 dmae->comp_addr_hi = 0;
479 dmae->comp_val = 1;
480
481 dmae = bnx2x_sp(bp, dmae[bp->executer_idx++]);
482 dmae->opcode = (DMAE_CMD_SRC_GRC | DMAE_CMD_DST_PCI |
483 DMAE_CMD_C_DST_PCI | DMAE_CMD_C_ENABLE |
484 DMAE_CMD_SRC_RESET | DMAE_CMD_DST_RESET |
485#ifdef __BIG_ENDIAN
486 DMAE_CMD_ENDIANITY_B_DW_SWAP |
487#else
488 DMAE_CMD_ENDIANITY_DW_SWAP |
489#endif
490 (port ? DMAE_CMD_PORT_1 : DMAE_CMD_PORT_0) |
491 (vn << DMAE_CMD_E1HVN_SHIFT));
492 dmae->src_addr_lo = (port ? NIG_REG_STAT1_EGRESS_MAC_PKT1 :
493 NIG_REG_STAT0_EGRESS_MAC_PKT1) >> 2;
494 dmae->src_addr_hi = 0;
495 dmae->dst_addr_lo = U64_LO(bnx2x_sp_mapping(bp, nig_stats) +
496 offsetof(struct nig_stats, egress_mac_pkt1_lo));
497 dmae->dst_addr_hi = U64_HI(bnx2x_sp_mapping(bp, nig_stats) +
498 offsetof(struct nig_stats, egress_mac_pkt1_lo));
499 dmae->len = (2*sizeof(u32)) >> 2;
500 dmae->comp_addr_lo = U64_LO(bnx2x_sp_mapping(bp, stats_comp));
501 dmae->comp_addr_hi = U64_HI(bnx2x_sp_mapping(bp, stats_comp));
502 dmae->comp_val = DMAE_COMP_VAL;
503
504 *stats_comp = 0;
505}
506
507static void bnx2x_func_stats_init(struct bnx2x *bp)
508{
509 struct dmae_command *dmae = &bp->stats_dmae;
510 u32 *stats_comp = bnx2x_sp(bp, stats_comp);
511
512 /* sanity */
513 if (!bp->func_stx) {
514 BNX2X_ERR("BUG!\n");
515 return;
516 }
517
518 bp->executer_idx = 0;
519 memset(dmae, 0, sizeof(struct dmae_command));
520
521 dmae->opcode = (DMAE_CMD_SRC_PCI | DMAE_CMD_DST_GRC |
522 DMAE_CMD_C_DST_PCI | DMAE_CMD_C_ENABLE |
523 DMAE_CMD_SRC_RESET | DMAE_CMD_DST_RESET |
524#ifdef __BIG_ENDIAN
525 DMAE_CMD_ENDIANITY_B_DW_SWAP |
526#else
527 DMAE_CMD_ENDIANITY_DW_SWAP |
528#endif
529 (BP_PORT(bp) ? DMAE_CMD_PORT_1 : DMAE_CMD_PORT_0) |
530 (BP_E1HVN(bp) << DMAE_CMD_E1HVN_SHIFT));
531 dmae->src_addr_lo = U64_LO(bnx2x_sp_mapping(bp, func_stats));
532 dmae->src_addr_hi = U64_HI(bnx2x_sp_mapping(bp, func_stats));
533 dmae->dst_addr_lo = bp->func_stx >> 2;
534 dmae->dst_addr_hi = 0;
535 dmae->len = sizeof(struct host_func_stats) >> 2;
536 dmae->comp_addr_lo = U64_LO(bnx2x_sp_mapping(bp, stats_comp));
537 dmae->comp_addr_hi = U64_HI(bnx2x_sp_mapping(bp, stats_comp));
538 dmae->comp_val = DMAE_COMP_VAL;
539
540 *stats_comp = 0;
541}
542
543static void bnx2x_stats_start(struct bnx2x *bp)
544{
545 if (bp->port.pmf)
546 bnx2x_port_stats_init(bp);
547
548 else if (bp->func_stx)
549 bnx2x_func_stats_init(bp);
550
551 bnx2x_hw_stats_post(bp);
552 bnx2x_storm_stats_post(bp);
553}
554
555static void bnx2x_stats_pmf_start(struct bnx2x *bp)
556{
557 bnx2x_stats_comp(bp);
558 bnx2x_stats_pmf_update(bp);
559 bnx2x_stats_start(bp);
560}
561
562static void bnx2x_stats_restart(struct bnx2x *bp)
563{
564 bnx2x_stats_comp(bp);
565 bnx2x_stats_start(bp);
566}
567
568static void bnx2x_bmac_stats_update(struct bnx2x *bp)
569{
570 struct bmac_stats *new = bnx2x_sp(bp, mac_stats.bmac_stats);
571 struct host_port_stats *pstats = bnx2x_sp(bp, port_stats);
572 struct bnx2x_eth_stats *estats = &bp->eth_stats;
573 struct {
574 u32 lo;
575 u32 hi;
576 } diff;
577
578 UPDATE_STAT64(rx_stat_grerb, rx_stat_ifhcinbadoctets);
579 UPDATE_STAT64(rx_stat_grfcs, rx_stat_dot3statsfcserrors);
580 UPDATE_STAT64(rx_stat_grund, rx_stat_etherstatsundersizepkts);
581 UPDATE_STAT64(rx_stat_grovr, rx_stat_dot3statsframestoolong);
582 UPDATE_STAT64(rx_stat_grfrg, rx_stat_etherstatsfragments);
583 UPDATE_STAT64(rx_stat_grjbr, rx_stat_etherstatsjabbers);
584 UPDATE_STAT64(rx_stat_grxcf, rx_stat_maccontrolframesreceived);
585 UPDATE_STAT64(rx_stat_grxpf, rx_stat_xoffstateentered);
586 UPDATE_STAT64(rx_stat_grxpf, rx_stat_bmac_xpf);
587 UPDATE_STAT64(tx_stat_gtxpf, tx_stat_outxoffsent);
588 UPDATE_STAT64(tx_stat_gtxpf, tx_stat_flowcontroldone);
589 UPDATE_STAT64(tx_stat_gt64, tx_stat_etherstatspkts64octets);
590 UPDATE_STAT64(tx_stat_gt127,
591 tx_stat_etherstatspkts65octetsto127octets);
592 UPDATE_STAT64(tx_stat_gt255,
593 tx_stat_etherstatspkts128octetsto255octets);
594 UPDATE_STAT64(tx_stat_gt511,
595 tx_stat_etherstatspkts256octetsto511octets);
596 UPDATE_STAT64(tx_stat_gt1023,
597 tx_stat_etherstatspkts512octetsto1023octets);
598 UPDATE_STAT64(tx_stat_gt1518,
599 tx_stat_etherstatspkts1024octetsto1522octets);
600 UPDATE_STAT64(tx_stat_gt2047, tx_stat_bmac_2047);
601 UPDATE_STAT64(tx_stat_gt4095, tx_stat_bmac_4095);
602 UPDATE_STAT64(tx_stat_gt9216, tx_stat_bmac_9216);
603 UPDATE_STAT64(tx_stat_gt16383, tx_stat_bmac_16383);
604 UPDATE_STAT64(tx_stat_gterr,
605 tx_stat_dot3statsinternalmactransmiterrors);
606 UPDATE_STAT64(tx_stat_gtufl, tx_stat_bmac_ufl);
607
608 estats->pause_frames_received_hi =
609 pstats->mac_stx[1].rx_stat_bmac_xpf_hi;
610 estats->pause_frames_received_lo =
611 pstats->mac_stx[1].rx_stat_bmac_xpf_lo;
612
613 estats->pause_frames_sent_hi =
614 pstats->mac_stx[1].tx_stat_outxoffsent_hi;
615 estats->pause_frames_sent_lo =
616 pstats->mac_stx[1].tx_stat_outxoffsent_lo;
617}
618
619static void bnx2x_emac_stats_update(struct bnx2x *bp)
620{
621 struct emac_stats *new = bnx2x_sp(bp, mac_stats.emac_stats);
622 struct host_port_stats *pstats = bnx2x_sp(bp, port_stats);
623 struct bnx2x_eth_stats *estats = &bp->eth_stats;
624
625 UPDATE_EXTEND_STAT(rx_stat_ifhcinbadoctets);
626 UPDATE_EXTEND_STAT(tx_stat_ifhcoutbadoctets);
627 UPDATE_EXTEND_STAT(rx_stat_dot3statsfcserrors);
628 UPDATE_EXTEND_STAT(rx_stat_dot3statsalignmenterrors);
629 UPDATE_EXTEND_STAT(rx_stat_dot3statscarriersenseerrors);
630 UPDATE_EXTEND_STAT(rx_stat_falsecarriererrors);
631 UPDATE_EXTEND_STAT(rx_stat_etherstatsundersizepkts);
632 UPDATE_EXTEND_STAT(rx_stat_dot3statsframestoolong);
633 UPDATE_EXTEND_STAT(rx_stat_etherstatsfragments);
634 UPDATE_EXTEND_STAT(rx_stat_etherstatsjabbers);
635 UPDATE_EXTEND_STAT(rx_stat_maccontrolframesreceived);
636 UPDATE_EXTEND_STAT(rx_stat_xoffstateentered);
637 UPDATE_EXTEND_STAT(rx_stat_xonpauseframesreceived);
638 UPDATE_EXTEND_STAT(rx_stat_xoffpauseframesreceived);
639 UPDATE_EXTEND_STAT(tx_stat_outxonsent);
640 UPDATE_EXTEND_STAT(tx_stat_outxoffsent);
641 UPDATE_EXTEND_STAT(tx_stat_flowcontroldone);
642 UPDATE_EXTEND_STAT(tx_stat_etherstatscollisions);
643 UPDATE_EXTEND_STAT(tx_stat_dot3statssinglecollisionframes);
644 UPDATE_EXTEND_STAT(tx_stat_dot3statsmultiplecollisionframes);
645 UPDATE_EXTEND_STAT(tx_stat_dot3statsdeferredtransmissions);
646 UPDATE_EXTEND_STAT(tx_stat_dot3statsexcessivecollisions);
647 UPDATE_EXTEND_STAT(tx_stat_dot3statslatecollisions);
648 UPDATE_EXTEND_STAT(tx_stat_etherstatspkts64octets);
649 UPDATE_EXTEND_STAT(tx_stat_etherstatspkts65octetsto127octets);
650 UPDATE_EXTEND_STAT(tx_stat_etherstatspkts128octetsto255octets);
651 UPDATE_EXTEND_STAT(tx_stat_etherstatspkts256octetsto511octets);
652 UPDATE_EXTEND_STAT(tx_stat_etherstatspkts512octetsto1023octets);
653 UPDATE_EXTEND_STAT(tx_stat_etherstatspkts1024octetsto1522octets);
654 UPDATE_EXTEND_STAT(tx_stat_etherstatspktsover1522octets);
655 UPDATE_EXTEND_STAT(tx_stat_dot3statsinternalmactransmiterrors);
656
657 estats->pause_frames_received_hi =
658 pstats->mac_stx[1].rx_stat_xonpauseframesreceived_hi;
659 estats->pause_frames_received_lo =
660 pstats->mac_stx[1].rx_stat_xonpauseframesreceived_lo;
661 ADD_64(estats->pause_frames_received_hi,
662 pstats->mac_stx[1].rx_stat_xoffpauseframesreceived_hi,
663 estats->pause_frames_received_lo,
664 pstats->mac_stx[1].rx_stat_xoffpauseframesreceived_lo);
665
666 estats->pause_frames_sent_hi =
667 pstats->mac_stx[1].tx_stat_outxonsent_hi;
668 estats->pause_frames_sent_lo =
669 pstats->mac_stx[1].tx_stat_outxonsent_lo;
670 ADD_64(estats->pause_frames_sent_hi,
671 pstats->mac_stx[1].tx_stat_outxoffsent_hi,
672 estats->pause_frames_sent_lo,
673 pstats->mac_stx[1].tx_stat_outxoffsent_lo);
674}
675
676static int bnx2x_hw_stats_update(struct bnx2x *bp)
677{
678 struct nig_stats *new = bnx2x_sp(bp, nig_stats);
679 struct nig_stats *old = &(bp->port.old_nig_stats);
680 struct host_port_stats *pstats = bnx2x_sp(bp, port_stats);
681 struct bnx2x_eth_stats *estats = &bp->eth_stats;
682 struct {
683 u32 lo;
684 u32 hi;
685 } diff;
686
687 if (bp->link_vars.mac_type == MAC_TYPE_BMAC)
688 bnx2x_bmac_stats_update(bp);
689
690 else if (bp->link_vars.mac_type == MAC_TYPE_EMAC)
691 bnx2x_emac_stats_update(bp);
692
693 else { /* unreached */
694 BNX2X_ERR("stats updated by DMAE but no MAC active\n");
695 return -1;
696 }
697
698 ADD_EXTEND_64(pstats->brb_drop_hi, pstats->brb_drop_lo,
699 new->brb_discard - old->brb_discard);
700 ADD_EXTEND_64(estats->brb_truncate_hi, estats->brb_truncate_lo,
701 new->brb_truncate - old->brb_truncate);
702
703 UPDATE_STAT64_NIG(egress_mac_pkt0,
704 etherstatspkts1024octetsto1522octets);
705 UPDATE_STAT64_NIG(egress_mac_pkt1, etherstatspktsover1522octets);
706
707 memcpy(old, new, sizeof(struct nig_stats));
708
709 memcpy(&(estats->rx_stat_ifhcinbadoctets_hi), &(pstats->mac_stx[1]),
710 sizeof(struct mac_stx));
711 estats->brb_drop_hi = pstats->brb_drop_hi;
712 estats->brb_drop_lo = pstats->brb_drop_lo;
713
714 pstats->host_port_stats_start = ++pstats->host_port_stats_end;
715
716 if (!BP_NOMCP(bp)) {
717 u32 nig_timer_max =
718 SHMEM_RD(bp, port_mb[BP_PORT(bp)].stat_nig_timer);
719 if (nig_timer_max != estats->nig_timer_max) {
720 estats->nig_timer_max = nig_timer_max;
721 BNX2X_ERR("NIG timer max (%u)\n",
722 estats->nig_timer_max);
723 }
724 }
725
726 return 0;
727}
728
729static int bnx2x_storm_stats_update(struct bnx2x *bp)
730{
731 struct eth_stats_query *stats = bnx2x_sp(bp, fw_stats);
732 struct tstorm_per_port_stats *tport =
733 &stats->tstorm_common.port_statistics;
734 struct host_func_stats *fstats = bnx2x_sp(bp, func_stats);
735 struct bnx2x_eth_stats *estats = &bp->eth_stats;
736 int i;
737
738 memcpy(&(fstats->total_bytes_received_hi),
739 &(bnx2x_sp(bp, func_stats_base)->total_bytes_received_hi),
740 sizeof(struct host_func_stats) - 2*sizeof(u32));
741 estats->error_bytes_received_hi = 0;
742 estats->error_bytes_received_lo = 0;
743 estats->etherstatsoverrsizepkts_hi = 0;
744 estats->etherstatsoverrsizepkts_lo = 0;
745 estats->no_buff_discard_hi = 0;
746 estats->no_buff_discard_lo = 0;
747
748 for_each_queue(bp, i) {
749 struct bnx2x_fastpath *fp = &bp->fp[i];
750 int cl_id = fp->cl_id;
751 struct tstorm_per_client_stats *tclient =
752 &stats->tstorm_common.client_statistics[cl_id];
753 struct tstorm_per_client_stats *old_tclient = &fp->old_tclient;
754 struct ustorm_per_client_stats *uclient =
755 &stats->ustorm_common.client_statistics[cl_id];
756 struct ustorm_per_client_stats *old_uclient = &fp->old_uclient;
757 struct xstorm_per_client_stats *xclient =
758 &stats->xstorm_common.client_statistics[cl_id];
759 struct xstorm_per_client_stats *old_xclient = &fp->old_xclient;
760 struct bnx2x_eth_q_stats *qstats = &fp->eth_q_stats;
761 u32 diff;
762
763 /* are storm stats valid? */
764 if ((u16)(le16_to_cpu(xclient->stats_counter) + 1) !=
765 bp->stats_counter) {
766 DP(BNX2X_MSG_STATS, "[%d] stats not updated by xstorm"
767 " xstorm counter (0x%x) != stats_counter (0x%x)\n",
768 i, xclient->stats_counter, bp->stats_counter);
769 return -1;
770 }
771 if ((u16)(le16_to_cpu(tclient->stats_counter) + 1) !=
772 bp->stats_counter) {
773 DP(BNX2X_MSG_STATS, "[%d] stats not updated by tstorm"
774 " tstorm counter (0x%x) != stats_counter (0x%x)\n",
775 i, tclient->stats_counter, bp->stats_counter);
776 return -2;
777 }
778 if ((u16)(le16_to_cpu(uclient->stats_counter) + 1) !=
779 bp->stats_counter) {
780 DP(BNX2X_MSG_STATS, "[%d] stats not updated by ustorm"
781 " ustorm counter (0x%x) != stats_counter (0x%x)\n",
782 i, uclient->stats_counter, bp->stats_counter);
783 return -4;
784 }
785
786 qstats->total_bytes_received_hi =
787 le32_to_cpu(tclient->rcv_broadcast_bytes.hi);
788 qstats->total_bytes_received_lo =
789 le32_to_cpu(tclient->rcv_broadcast_bytes.lo);
790
791 ADD_64(qstats->total_bytes_received_hi,
792 le32_to_cpu(tclient->rcv_multicast_bytes.hi),
793 qstats->total_bytes_received_lo,
794 le32_to_cpu(tclient->rcv_multicast_bytes.lo));
795
796 ADD_64(qstats->total_bytes_received_hi,
797 le32_to_cpu(tclient->rcv_unicast_bytes.hi),
798 qstats->total_bytes_received_lo,
799 le32_to_cpu(tclient->rcv_unicast_bytes.lo));
800
801 SUB_64(qstats->total_bytes_received_hi,
802 le32_to_cpu(uclient->bcast_no_buff_bytes.hi),
803 qstats->total_bytes_received_lo,
804 le32_to_cpu(uclient->bcast_no_buff_bytes.lo));
805
806 SUB_64(qstats->total_bytes_received_hi,
807 le32_to_cpu(uclient->mcast_no_buff_bytes.hi),
808 qstats->total_bytes_received_lo,
809 le32_to_cpu(uclient->mcast_no_buff_bytes.lo));
810
811 SUB_64(qstats->total_bytes_received_hi,
812 le32_to_cpu(uclient->ucast_no_buff_bytes.hi),
813 qstats->total_bytes_received_lo,
814 le32_to_cpu(uclient->ucast_no_buff_bytes.lo));
815
816 qstats->valid_bytes_received_hi =
817 qstats->total_bytes_received_hi;
818 qstats->valid_bytes_received_lo =
819 qstats->total_bytes_received_lo;
820
821 qstats->error_bytes_received_hi =
822 le32_to_cpu(tclient->rcv_error_bytes.hi);
823 qstats->error_bytes_received_lo =
824 le32_to_cpu(tclient->rcv_error_bytes.lo);
825
826 ADD_64(qstats->total_bytes_received_hi,
827 qstats->error_bytes_received_hi,
828 qstats->total_bytes_received_lo,
829 qstats->error_bytes_received_lo);
830
831 UPDATE_EXTEND_TSTAT(rcv_unicast_pkts,
832 total_unicast_packets_received);
833 UPDATE_EXTEND_TSTAT(rcv_multicast_pkts,
834 total_multicast_packets_received);
835 UPDATE_EXTEND_TSTAT(rcv_broadcast_pkts,
836 total_broadcast_packets_received);
837 UPDATE_EXTEND_TSTAT(packets_too_big_discard,
838 etherstatsoverrsizepkts);
839 UPDATE_EXTEND_TSTAT(no_buff_discard, no_buff_discard);
840
841 SUB_EXTEND_USTAT(ucast_no_buff_pkts,
842 total_unicast_packets_received);
843 SUB_EXTEND_USTAT(mcast_no_buff_pkts,
844 total_multicast_packets_received);
845 SUB_EXTEND_USTAT(bcast_no_buff_pkts,
846 total_broadcast_packets_received);
847 UPDATE_EXTEND_USTAT(ucast_no_buff_pkts, no_buff_discard);
848 UPDATE_EXTEND_USTAT(mcast_no_buff_pkts, no_buff_discard);
849 UPDATE_EXTEND_USTAT(bcast_no_buff_pkts, no_buff_discard);
850
851 qstats->total_bytes_transmitted_hi =
852 le32_to_cpu(xclient->unicast_bytes_sent.hi);
853 qstats->total_bytes_transmitted_lo =
854 le32_to_cpu(xclient->unicast_bytes_sent.lo);
855
856 ADD_64(qstats->total_bytes_transmitted_hi,
857 le32_to_cpu(xclient->multicast_bytes_sent.hi),
858 qstats->total_bytes_transmitted_lo,
859 le32_to_cpu(xclient->multicast_bytes_sent.lo));
860
861 ADD_64(qstats->total_bytes_transmitted_hi,
862 le32_to_cpu(xclient->broadcast_bytes_sent.hi),
863 qstats->total_bytes_transmitted_lo,
864 le32_to_cpu(xclient->broadcast_bytes_sent.lo));
865
866 UPDATE_EXTEND_XSTAT(unicast_pkts_sent,
867 total_unicast_packets_transmitted);
868 UPDATE_EXTEND_XSTAT(multicast_pkts_sent,
869 total_multicast_packets_transmitted);
870 UPDATE_EXTEND_XSTAT(broadcast_pkts_sent,
871 total_broadcast_packets_transmitted);
872
873 old_tclient->checksum_discard = tclient->checksum_discard;
874 old_tclient->ttl0_discard = tclient->ttl0_discard;
875
876 ADD_64(fstats->total_bytes_received_hi,
877 qstats->total_bytes_received_hi,
878 fstats->total_bytes_received_lo,
879 qstats->total_bytes_received_lo);
880 ADD_64(fstats->total_bytes_transmitted_hi,
881 qstats->total_bytes_transmitted_hi,
882 fstats->total_bytes_transmitted_lo,
883 qstats->total_bytes_transmitted_lo);
884 ADD_64(fstats->total_unicast_packets_received_hi,
885 qstats->total_unicast_packets_received_hi,
886 fstats->total_unicast_packets_received_lo,
887 qstats->total_unicast_packets_received_lo);
888 ADD_64(fstats->total_multicast_packets_received_hi,
889 qstats->total_multicast_packets_received_hi,
890 fstats->total_multicast_packets_received_lo,
891 qstats->total_multicast_packets_received_lo);
892 ADD_64(fstats->total_broadcast_packets_received_hi,
893 qstats->total_broadcast_packets_received_hi,
894 fstats->total_broadcast_packets_received_lo,
895 qstats->total_broadcast_packets_received_lo);
896 ADD_64(fstats->total_unicast_packets_transmitted_hi,
897 qstats->total_unicast_packets_transmitted_hi,
898 fstats->total_unicast_packets_transmitted_lo,
899 qstats->total_unicast_packets_transmitted_lo);
900 ADD_64(fstats->total_multicast_packets_transmitted_hi,
901 qstats->total_multicast_packets_transmitted_hi,
902 fstats->total_multicast_packets_transmitted_lo,
903 qstats->total_multicast_packets_transmitted_lo);
904 ADD_64(fstats->total_broadcast_packets_transmitted_hi,
905 qstats->total_broadcast_packets_transmitted_hi,
906 fstats->total_broadcast_packets_transmitted_lo,
907 qstats->total_broadcast_packets_transmitted_lo);
908 ADD_64(fstats->valid_bytes_received_hi,
909 qstats->valid_bytes_received_hi,
910 fstats->valid_bytes_received_lo,
911 qstats->valid_bytes_received_lo);
912
913 ADD_64(estats->error_bytes_received_hi,
914 qstats->error_bytes_received_hi,
915 estats->error_bytes_received_lo,
916 qstats->error_bytes_received_lo);
917 ADD_64(estats->etherstatsoverrsizepkts_hi,
918 qstats->etherstatsoverrsizepkts_hi,
919 estats->etherstatsoverrsizepkts_lo,
920 qstats->etherstatsoverrsizepkts_lo);
921 ADD_64(estats->no_buff_discard_hi, qstats->no_buff_discard_hi,
922 estats->no_buff_discard_lo, qstats->no_buff_discard_lo);
923 }
924
925 ADD_64(fstats->total_bytes_received_hi,
926 estats->rx_stat_ifhcinbadoctets_hi,
927 fstats->total_bytes_received_lo,
928 estats->rx_stat_ifhcinbadoctets_lo);
929
930 memcpy(estats, &(fstats->total_bytes_received_hi),
931 sizeof(struct host_func_stats) - 2*sizeof(u32));
932
933 ADD_64(estats->etherstatsoverrsizepkts_hi,
934 estats->rx_stat_dot3statsframestoolong_hi,
935 estats->etherstatsoverrsizepkts_lo,
936 estats->rx_stat_dot3statsframestoolong_lo);
937 ADD_64(estats->error_bytes_received_hi,
938 estats->rx_stat_ifhcinbadoctets_hi,
939 estats->error_bytes_received_lo,
940 estats->rx_stat_ifhcinbadoctets_lo);
941
942 if (bp->port.pmf) {
943 estats->mac_filter_discard =
944 le32_to_cpu(tport->mac_filter_discard);
945 estats->xxoverflow_discard =
946 le32_to_cpu(tport->xxoverflow_discard);
947 estats->brb_truncate_discard =
948 le32_to_cpu(tport->brb_truncate_discard);
949 estats->mac_discard = le32_to_cpu(tport->mac_discard);
950 }
951
952 fstats->host_func_stats_start = ++fstats->host_func_stats_end;
953
954 bp->stats_pending = 0;
955
956 return 0;
957}
958
959static void bnx2x_net_stats_update(struct bnx2x *bp)
960{
961 struct bnx2x_eth_stats *estats = &bp->eth_stats;
962 struct net_device_stats *nstats = &bp->dev->stats;
963 int i;
964
965 nstats->rx_packets =
966 bnx2x_hilo(&estats->total_unicast_packets_received_hi) +
967 bnx2x_hilo(&estats->total_multicast_packets_received_hi) +
968 bnx2x_hilo(&estats->total_broadcast_packets_received_hi);
969
970 nstats->tx_packets =
971 bnx2x_hilo(&estats->total_unicast_packets_transmitted_hi) +
972 bnx2x_hilo(&estats->total_multicast_packets_transmitted_hi) +
973 bnx2x_hilo(&estats->total_broadcast_packets_transmitted_hi);
974
975 nstats->rx_bytes = bnx2x_hilo(&estats->total_bytes_received_hi);
976
977 nstats->tx_bytes = bnx2x_hilo(&estats->total_bytes_transmitted_hi);
978
979 nstats->rx_dropped = estats->mac_discard;
980 for_each_queue(bp, i)
981 nstats->rx_dropped +=
982 le32_to_cpu(bp->fp[i].old_tclient.checksum_discard);
983
984 nstats->tx_dropped = 0;
985
986 nstats->multicast =
987 bnx2x_hilo(&estats->total_multicast_packets_received_hi);
988
989 nstats->collisions =
990 bnx2x_hilo(&estats->tx_stat_etherstatscollisions_hi);
991
992 nstats->rx_length_errors =
993 bnx2x_hilo(&estats->rx_stat_etherstatsundersizepkts_hi) +
994 bnx2x_hilo(&estats->etherstatsoverrsizepkts_hi);
995 nstats->rx_over_errors = bnx2x_hilo(&estats->brb_drop_hi) +
996 bnx2x_hilo(&estats->brb_truncate_hi);
997 nstats->rx_crc_errors =
998 bnx2x_hilo(&estats->rx_stat_dot3statsfcserrors_hi);
999 nstats->rx_frame_errors =
1000 bnx2x_hilo(&estats->rx_stat_dot3statsalignmenterrors_hi);
1001 nstats->rx_fifo_errors = bnx2x_hilo(&estats->no_buff_discard_hi);
1002 nstats->rx_missed_errors = estats->xxoverflow_discard;
1003
1004 nstats->rx_errors = nstats->rx_length_errors +
1005 nstats->rx_over_errors +
1006 nstats->rx_crc_errors +
1007 nstats->rx_frame_errors +
1008 nstats->rx_fifo_errors +
1009 nstats->rx_missed_errors;
1010
1011 nstats->tx_aborted_errors =
1012 bnx2x_hilo(&estats->tx_stat_dot3statslatecollisions_hi) +
1013 bnx2x_hilo(&estats->tx_stat_dot3statsexcessivecollisions_hi);
1014 nstats->tx_carrier_errors =
1015 bnx2x_hilo(&estats->rx_stat_dot3statscarriersenseerrors_hi);
1016 nstats->tx_fifo_errors = 0;
1017 nstats->tx_heartbeat_errors = 0;
1018 nstats->tx_window_errors = 0;
1019
1020 nstats->tx_errors = nstats->tx_aborted_errors +
1021 nstats->tx_carrier_errors +
1022 bnx2x_hilo(&estats->tx_stat_dot3statsinternalmactransmiterrors_hi);
1023}
1024
1025static void bnx2x_drv_stats_update(struct bnx2x *bp)
1026{
1027 struct bnx2x_eth_stats *estats = &bp->eth_stats;
1028 int i;
1029
1030 estats->driver_xoff = 0;
1031 estats->rx_err_discard_pkt = 0;
1032 estats->rx_skb_alloc_failed = 0;
1033 estats->hw_csum_err = 0;
1034 for_each_queue(bp, i) {
1035 struct bnx2x_eth_q_stats *qstats = &bp->fp[i].eth_q_stats;
1036
1037 estats->driver_xoff += qstats->driver_xoff;
1038 estats->rx_err_discard_pkt += qstats->rx_err_discard_pkt;
1039 estats->rx_skb_alloc_failed += qstats->rx_skb_alloc_failed;
1040 estats->hw_csum_err += qstats->hw_csum_err;
1041 }
1042}
1043
1044static void bnx2x_stats_update(struct bnx2x *bp)
1045{
1046 u32 *stats_comp = bnx2x_sp(bp, stats_comp);
1047
1048 if (*stats_comp != DMAE_COMP_VAL)
1049 return;
1050
1051 if (bp->port.pmf)
1052 bnx2x_hw_stats_update(bp);
1053
1054 if (bnx2x_storm_stats_update(bp) && (bp->stats_pending++ == 3)) {
1055 BNX2X_ERR("storm stats were not updated for 3 times\n");
1056 bnx2x_panic();
1057 return;
1058 }
1059
1060 bnx2x_net_stats_update(bp);
1061 bnx2x_drv_stats_update(bp);
1062
1063 if (netif_msg_timer(bp)) {
1064 struct bnx2x_eth_stats *estats = &bp->eth_stats;
1065 int i;
1066
1067 printk(KERN_DEBUG "%s: brb drops %u brb truncate %u\n",
1068 bp->dev->name,
1069 estats->brb_drop_lo, estats->brb_truncate_lo);
1070
1071 for_each_queue(bp, i) {
1072 struct bnx2x_fastpath *fp = &bp->fp[i];
1073 struct bnx2x_eth_q_stats *qstats = &fp->eth_q_stats;
1074
1075 printk(KERN_DEBUG "%s: rx usage(%4u) *rx_cons_sb(%u)"
1076 " rx pkt(%lu) rx calls(%lu %lu)\n",
1077 fp->name, (le16_to_cpu(*fp->rx_cons_sb) -
1078 fp->rx_comp_cons),
1079 le16_to_cpu(*fp->rx_cons_sb),
1080 bnx2x_hilo(&qstats->
1081 total_unicast_packets_received_hi),
1082 fp->rx_calls, fp->rx_pkt);
1083 }
1084
1085 for_each_queue(bp, i) {
1086 struct bnx2x_fastpath *fp = &bp->fp[i];
1087 struct bnx2x_eth_q_stats *qstats = &fp->eth_q_stats;
1088 struct netdev_queue *txq =
1089 netdev_get_tx_queue(bp->dev, i);
1090
1091 printk(KERN_DEBUG "%s: tx avail(%4u) *tx_cons_sb(%u)"
1092 " tx pkt(%lu) tx calls (%lu)"
1093 " %s (Xoff events %u)\n",
1094 fp->name, bnx2x_tx_avail(fp),
1095 le16_to_cpu(*fp->tx_cons_sb),
1096 bnx2x_hilo(&qstats->
1097 total_unicast_packets_transmitted_hi),
1098 fp->tx_pkt,
1099 (netif_tx_queue_stopped(txq) ? "Xoff" : "Xon"),
1100 qstats->driver_xoff);
1101 }
1102 }
1103
1104 bnx2x_hw_stats_post(bp);
1105 bnx2x_storm_stats_post(bp);
1106}
1107
1108static void bnx2x_port_stats_stop(struct bnx2x *bp)
1109{
1110 struct dmae_command *dmae;
1111 u32 opcode;
1112 int loader_idx = PMF_DMAE_C(bp);
1113 u32 *stats_comp = bnx2x_sp(bp, stats_comp);
1114
1115 bp->executer_idx = 0;
1116
1117 opcode = (DMAE_CMD_SRC_PCI | DMAE_CMD_DST_GRC |
1118 DMAE_CMD_C_ENABLE |
1119 DMAE_CMD_SRC_RESET | DMAE_CMD_DST_RESET |
1120#ifdef __BIG_ENDIAN
1121 DMAE_CMD_ENDIANITY_B_DW_SWAP |
1122#else
1123 DMAE_CMD_ENDIANITY_DW_SWAP |
1124#endif
1125 (BP_PORT(bp) ? DMAE_CMD_PORT_1 : DMAE_CMD_PORT_0) |
1126 (BP_E1HVN(bp) << DMAE_CMD_E1HVN_SHIFT));
1127
1128 if (bp->port.port_stx) {
1129
1130 dmae = bnx2x_sp(bp, dmae[bp->executer_idx++]);
1131 if (bp->func_stx)
1132 dmae->opcode = (opcode | DMAE_CMD_C_DST_GRC);
1133 else
1134 dmae->opcode = (opcode | DMAE_CMD_C_DST_PCI);
1135 dmae->src_addr_lo = U64_LO(bnx2x_sp_mapping(bp, port_stats));
1136 dmae->src_addr_hi = U64_HI(bnx2x_sp_mapping(bp, port_stats));
1137 dmae->dst_addr_lo = bp->port.port_stx >> 2;
1138 dmae->dst_addr_hi = 0;
1139 dmae->len = sizeof(struct host_port_stats) >> 2;
1140 if (bp->func_stx) {
1141 dmae->comp_addr_lo = dmae_reg_go_c[loader_idx] >> 2;
1142 dmae->comp_addr_hi = 0;
1143 dmae->comp_val = 1;
1144 } else {
1145 dmae->comp_addr_lo =
1146 U64_LO(bnx2x_sp_mapping(bp, stats_comp));
1147 dmae->comp_addr_hi =
1148 U64_HI(bnx2x_sp_mapping(bp, stats_comp));
1149 dmae->comp_val = DMAE_COMP_VAL;
1150
1151 *stats_comp = 0;
1152 }
1153 }
1154
1155 if (bp->func_stx) {
1156
1157 dmae = bnx2x_sp(bp, dmae[bp->executer_idx++]);
1158 dmae->opcode = (opcode | DMAE_CMD_C_DST_PCI);
1159 dmae->src_addr_lo = U64_LO(bnx2x_sp_mapping(bp, func_stats));
1160 dmae->src_addr_hi = U64_HI(bnx2x_sp_mapping(bp, func_stats));
1161 dmae->dst_addr_lo = bp->func_stx >> 2;
1162 dmae->dst_addr_hi = 0;
1163 dmae->len = sizeof(struct host_func_stats) >> 2;
1164 dmae->comp_addr_lo = U64_LO(bnx2x_sp_mapping(bp, stats_comp));
1165 dmae->comp_addr_hi = U64_HI(bnx2x_sp_mapping(bp, stats_comp));
1166 dmae->comp_val = DMAE_COMP_VAL;
1167
1168 *stats_comp = 0;
1169 }
1170}
1171
1172static void bnx2x_stats_stop(struct bnx2x *bp)
1173{
1174 int update = 0;
1175
1176 bnx2x_stats_comp(bp);
1177
1178 if (bp->port.pmf)
1179 update = (bnx2x_hw_stats_update(bp) == 0);
1180
1181 update |= (bnx2x_storm_stats_update(bp) == 0);
1182
1183 if (update) {
1184 bnx2x_net_stats_update(bp);
1185
1186 if (bp->port.pmf)
1187 bnx2x_port_stats_stop(bp);
1188
1189 bnx2x_hw_stats_post(bp);
1190 bnx2x_stats_comp(bp);
1191 }
1192}
1193
1194static void bnx2x_stats_do_nothing(struct bnx2x *bp)
1195{
1196}
1197
1198static const struct {
1199 void (*action)(struct bnx2x *bp);
1200 enum bnx2x_stats_state next_state;
1201} bnx2x_stats_stm[STATS_STATE_MAX][STATS_EVENT_MAX] = {
1202/* state event */
1203{
1204/* DISABLED PMF */ {bnx2x_stats_pmf_update, STATS_STATE_DISABLED},
1205/* LINK_UP */ {bnx2x_stats_start, STATS_STATE_ENABLED},
1206/* UPDATE */ {bnx2x_stats_do_nothing, STATS_STATE_DISABLED},
1207/* STOP */ {bnx2x_stats_do_nothing, STATS_STATE_DISABLED}
1208},
1209{
1210/* ENABLED PMF */ {bnx2x_stats_pmf_start, STATS_STATE_ENABLED},
1211/* LINK_UP */ {bnx2x_stats_restart, STATS_STATE_ENABLED},
1212/* UPDATE */ {bnx2x_stats_update, STATS_STATE_ENABLED},
1213/* STOP */ {bnx2x_stats_stop, STATS_STATE_DISABLED}
1214}
1215};
1216
1217void bnx2x_stats_handle(struct bnx2x *bp, enum bnx2x_stats_event event)
1218{
1219 enum bnx2x_stats_state state = bp->stats_state;
1220
1221 if (unlikely(bp->panic))
1222 return;
1223
1224 bnx2x_stats_stm[state][event].action(bp);
1225 bp->stats_state = bnx2x_stats_stm[state][event].next_state;
1226
1227 /* Make sure the state has been "changed" */
1228 smp_wmb();
1229
1230 if ((event != STATS_EVENT_UPDATE) || netif_msg_timer(bp))
1231 DP(BNX2X_MSG_STATS, "state %d -> event %d -> state %d\n",
1232 state, event, bp->stats_state);
1233}
1234
1235static void bnx2x_port_stats_base_init(struct bnx2x *bp)
1236{
1237 struct dmae_command *dmae;
1238 u32 *stats_comp = bnx2x_sp(bp, stats_comp);
1239
1240 /* sanity */
1241 if (!bp->port.pmf || !bp->port.port_stx) {
1242 BNX2X_ERR("BUG!\n");
1243 return;
1244 }
1245
1246 bp->executer_idx = 0;
1247
1248 dmae = bnx2x_sp(bp, dmae[bp->executer_idx++]);
1249 dmae->opcode = (DMAE_CMD_SRC_PCI | DMAE_CMD_DST_GRC |
1250 DMAE_CMD_C_DST_PCI | DMAE_CMD_C_ENABLE |
1251 DMAE_CMD_SRC_RESET | DMAE_CMD_DST_RESET |
1252#ifdef __BIG_ENDIAN
1253 DMAE_CMD_ENDIANITY_B_DW_SWAP |
1254#else
1255 DMAE_CMD_ENDIANITY_DW_SWAP |
1256#endif
1257 (BP_PORT(bp) ? DMAE_CMD_PORT_1 : DMAE_CMD_PORT_0) |
1258 (BP_E1HVN(bp) << DMAE_CMD_E1HVN_SHIFT));
1259 dmae->src_addr_lo = U64_LO(bnx2x_sp_mapping(bp, port_stats));
1260 dmae->src_addr_hi = U64_HI(bnx2x_sp_mapping(bp, port_stats));
1261 dmae->dst_addr_lo = bp->port.port_stx >> 2;
1262 dmae->dst_addr_hi = 0;
1263 dmae->len = sizeof(struct host_port_stats) >> 2;
1264 dmae->comp_addr_lo = U64_LO(bnx2x_sp_mapping(bp, stats_comp));
1265 dmae->comp_addr_hi = U64_HI(bnx2x_sp_mapping(bp, stats_comp));
1266 dmae->comp_val = DMAE_COMP_VAL;
1267
1268 *stats_comp = 0;
1269 bnx2x_hw_stats_post(bp);
1270 bnx2x_stats_comp(bp);
1271}
1272
1273static void bnx2x_func_stats_base_init(struct bnx2x *bp)
1274{
1275 int vn, vn_max = IS_E1HMF(bp) ? E1HVN_MAX : E1VN_MAX;
1276 int port = BP_PORT(bp);
1277 int func;
1278 u32 func_stx;
1279
1280 /* sanity */
1281 if (!bp->port.pmf || !bp->func_stx) {
1282 BNX2X_ERR("BUG!\n");
1283 return;
1284 }
1285
1286 /* save our func_stx */
1287 func_stx = bp->func_stx;
1288
1289 for (vn = VN_0; vn < vn_max; vn++) {
1290 func = 2*vn + port;
1291
1292 bp->func_stx = SHMEM_RD(bp, func_mb[func].fw_mb_param);
1293 bnx2x_func_stats_init(bp);
1294 bnx2x_hw_stats_post(bp);
1295 bnx2x_stats_comp(bp);
1296 }
1297
1298 /* restore our func_stx */
1299 bp->func_stx = func_stx;
1300}
1301
1302static void bnx2x_func_stats_base_update(struct bnx2x *bp)
1303{
1304 struct dmae_command *dmae = &bp->stats_dmae;
1305 u32 *stats_comp = bnx2x_sp(bp, stats_comp);
1306
1307 /* sanity */
1308 if (!bp->func_stx) {
1309 BNX2X_ERR("BUG!\n");
1310 return;
1311 }
1312
1313 bp->executer_idx = 0;
1314 memset(dmae, 0, sizeof(struct dmae_command));
1315
1316 dmae->opcode = (DMAE_CMD_SRC_GRC | DMAE_CMD_DST_PCI |
1317 DMAE_CMD_C_DST_PCI | DMAE_CMD_C_ENABLE |
1318 DMAE_CMD_SRC_RESET | DMAE_CMD_DST_RESET |
1319#ifdef __BIG_ENDIAN
1320 DMAE_CMD_ENDIANITY_B_DW_SWAP |
1321#else
1322 DMAE_CMD_ENDIANITY_DW_SWAP |
1323#endif
1324 (BP_PORT(bp) ? DMAE_CMD_PORT_1 : DMAE_CMD_PORT_0) |
1325 (BP_E1HVN(bp) << DMAE_CMD_E1HVN_SHIFT));
1326 dmae->src_addr_lo = bp->func_stx >> 2;
1327 dmae->src_addr_hi = 0;
1328 dmae->dst_addr_lo = U64_LO(bnx2x_sp_mapping(bp, func_stats_base));
1329 dmae->dst_addr_hi = U64_HI(bnx2x_sp_mapping(bp, func_stats_base));
1330 dmae->len = sizeof(struct host_func_stats) >> 2;
1331 dmae->comp_addr_lo = U64_LO(bnx2x_sp_mapping(bp, stats_comp));
1332 dmae->comp_addr_hi = U64_HI(bnx2x_sp_mapping(bp, stats_comp));
1333 dmae->comp_val = DMAE_COMP_VAL;
1334
1335 *stats_comp = 0;
1336 bnx2x_hw_stats_post(bp);
1337 bnx2x_stats_comp(bp);
1338}
1339
1340void bnx2x_stats_init(struct bnx2x *bp)
1341{
1342 int port = BP_PORT(bp);
1343 int func = BP_FUNC(bp);
1344 int i;
1345
1346 bp->stats_pending = 0;
1347 bp->executer_idx = 0;
1348 bp->stats_counter = 0;
1349
1350 /* port and func stats for management */
1351 if (!BP_NOMCP(bp)) {
1352 bp->port.port_stx = SHMEM_RD(bp, port_mb[port].port_stx);
1353 bp->func_stx = SHMEM_RD(bp, func_mb[func].fw_mb_param);
1354
1355 } else {
1356 bp->port.port_stx = 0;
1357 bp->func_stx = 0;
1358 }
1359 DP(BNX2X_MSG_STATS, "port_stx 0x%x func_stx 0x%x\n",
1360 bp->port.port_stx, bp->func_stx);
1361
1362 /* port stats */
1363 memset(&(bp->port.old_nig_stats), 0, sizeof(struct nig_stats));
1364 bp->port.old_nig_stats.brb_discard =
1365 REG_RD(bp, NIG_REG_STAT0_BRB_DISCARD + port*0x38);
1366 bp->port.old_nig_stats.brb_truncate =
1367 REG_RD(bp, NIG_REG_STAT0_BRB_TRUNCATE + port*0x38);
1368 REG_RD_DMAE(bp, NIG_REG_STAT0_EGRESS_MAC_PKT0 + port*0x50,
1369 &(bp->port.old_nig_stats.egress_mac_pkt0_lo), 2);
1370 REG_RD_DMAE(bp, NIG_REG_STAT0_EGRESS_MAC_PKT1 + port*0x50,
1371 &(bp->port.old_nig_stats.egress_mac_pkt1_lo), 2);
1372
1373 /* function stats */
1374 for_each_queue(bp, i) {
1375 struct bnx2x_fastpath *fp = &bp->fp[i];
1376
1377 memset(&fp->old_tclient, 0,
1378 sizeof(struct tstorm_per_client_stats));
1379 memset(&fp->old_uclient, 0,
1380 sizeof(struct ustorm_per_client_stats));
1381 memset(&fp->old_xclient, 0,
1382 sizeof(struct xstorm_per_client_stats));
1383 memset(&fp->eth_q_stats, 0, sizeof(struct bnx2x_eth_q_stats));
1384 }
1385
1386 memset(&bp->dev->stats, 0, sizeof(struct net_device_stats));
1387 memset(&bp->eth_stats, 0, sizeof(struct bnx2x_eth_stats));
1388
1389 bp->stats_state = STATS_STATE_DISABLED;
1390
1391 if (bp->port.pmf) {
1392 if (bp->port.port_stx)
1393 bnx2x_port_stats_base_init(bp);
1394
1395 if (bp->func_stx)
1396 bnx2x_func_stats_base_init(bp);
1397
1398 } else if (bp->func_stx)
1399 bnx2x_func_stats_base_update(bp);
1400}
generated by cgit v1.2.2 (git 2.25.0) at 2024-12-26 21:03:24 -0500