bnx2x: Add dual-media changes

Add required changes in order to support dual-media boards.

Signed-off-by: Yaniv Rosner <yanivr@broadcom.com>
Signed-off-by: Eilon Greenstein <eilong@broadcom.com>
Signed-off-by: David S. Miller <davem@davemloft.net>

1 files changed, 40 insertions, 22 deletions

diff --git a/drivers/net/bnx2x/bnx2x_link.h b/drivers/net/bnx2x/bnx2x_link.h
index 35f665f97be6..9115c125aeaf 100644
--- a/drivers/net/bnx2x/bnx2x_link.h
+++ b/drivers/net/bnx2x/bnx2x_link.h
@@ -59,13 +59,18 @@
 #define SINGLE_MEDIA_DIRECT(params)     (params->num_phys == 1)
 /* Single Media board contains single external phy */
 #define SINGLE_MEDIA(params)            (params->num_phys == 2)
+/* Dual Media board contains two external phy with different media */
+#define DUAL_MEDIA(params)              (params->num_phys == 3)
+#define FW_PARAM_MDIO_CTRL_OFFSET 16
+#define FW_PARAM_SET(phy_addr, phy_type, mdio_access) \
+        (phy_addr | phy_type | mdio_access << FW_PARAM_MDIO_CTRL_OFFSET)
 /***********************************************************/
 /*                         Structs                         */
 /***********************************************************/
 #define INT_PHY         0
 #define EXT_PHY1        1
-
-#define MAX_PHYS        2
+#define EXT_PHY2        2
+#define MAX_PHYS        3
 
 /* Same configuration is shared between the XGXS and the first external phy */
 #define LINK_CONFIG_SIZE (MAX_PHYS - 1)
@@ -91,6 +96,8 @@ typedef u8 (*format_fw_ver_t)(u32 raw, u8 *str, u16 *len);
 typedef void (*hw_reset_t)(struct bnx2x_phy *phy, struct link_params *params);
 typedef void (*set_link_led_t)(struct bnx2x_phy *phy,
                                struct link_params *params, u8 mode);
+typedef void (*phy_specific_func_t)(struct bnx2x_phy *phy,
+                                    struct link_params *params, u32 action);
 
 struct bnx2x_phy {
         u32 type;
@@ -106,7 +113,9 @@ struct bnx2x_phy {
         /* Fan failure detection required */
 #define FLAGS_FAN_FAILURE_DET_REQ       (1<<2)
         /* Initialize first the XGXS and only then the phy itself */
-#define FLAGS_INIT_XGXS_FIRST   (1<<3)
+#define FLAGS_INIT_XGXS_FIRST           (1<<3)
+#define FLAGS_REARM_LATCH_SIGNAL        (1<<6)
+#define FLAGS_SFP_NOT_APPROVED          (1<<7)
 
         u8 def_md_devad;
         u8 reserved;
@@ -161,6 +170,11 @@ struct bnx2x_phy {
 
         /* Set link led mode (on/off/oper)*/
         set_link_led_t set_link_led;
+
+        /* PHY Specific tasks */
+        phy_specific_func_t phy_specific_func;
+#define DISABLE_TX      1
+#define ENABLE_TX       2
 };
 
 /* Inputs parameters to the CLC */
@@ -177,18 +191,18 @@ struct link_params {
 #define LOOPBACK_EXT_PHY        4
 #define LOOPBACK_EXT    5
 
-        u16 req_duplex;
-        u16 req_flow_ctrl;
-        u16 req_fc_auto_adv; /* Should be set to TX / BOTH when
-        req_flow_ctrl is set to AUTO */
-        u16 req_line_speed; /* Also determine AutoNeg */
-
         /* Device parameters */
         u8 mac_addr[6];
 
+        u16 req_duplex[LINK_CONFIG_SIZE];
+        u16 req_flow_ctrl[LINK_CONFIG_SIZE];
+
+        u16 req_line_speed[LINK_CONFIG_SIZE]; /* Also determine AutoNeg */
+
         /* shmem parameters */
         u32 shmem_base;
-        u32 speed_cap_mask;
+        u32 shmem2_base;
+        u32 speed_cap_mask[LINK_CONFIG_SIZE];
         u32 switch_cfg;
 #define SWITCH_CFG_1G           PORT_FEATURE_CON_SWITCH_1G_SWITCH
 #define SWITCH_CFG_10G          PORT_FEATURE_CON_SWITCH_10G_SWITCH
@@ -202,6 +216,7 @@ struct link_params {
         u32 feature_config_flags;
 #define FEATURE_CONFIG_OVERRIDE_PREEMPHASIS_ENABLED (1<<0)
 #define FEATURE_CONFIG_BC_SUPPORTS_OPT_MDL_VRFY (1<<2)
+#define FEATURE_CONFIG_BC_SUPPORTS_DUAL_PHY_OPT_MDL_VRFY        (1<<3)
         /* Will be populated during common init */
         struct bnx2x_phy phy[MAX_PHYS];
 
@@ -210,9 +225,12 @@ struct link_params {
 
         u8 rsrv;
         u16 hw_led_mode; /* part of the hw_config read from the shmem */
+        u32 multi_phy_config;
 
         /* Device pointer passed to all callback functions */
         struct bnx2x *bp;
+        u16 req_fc_auto_adv; /* Should be set to TX / BOTH when
+                                req_flow_ctrl is set to AUTO */
 };
 
 /* Output parameters */
@@ -233,12 +251,6 @@ struct link_vars {
         u16 flow_ctrl;
         u16 ieee_fc;
 
-        u32 autoneg;
-#define AUTO_NEG_DISABLED                       0x0
-#define AUTO_NEG_ENABLED                        0x1
-#define AUTO_NEG_COMPLETE                       0x2
-#define AUTO_NEG_PARALLEL_DETECTION_USED        0x3
-
         /* The same definitions as the shmem parameter */
         u32 link_status;
 };
@@ -246,8 +258,6 @@ struct link_vars {
 /***********************************************************/
 /*                         Functions                       */
 /***********************************************************/
-
-/* Initialize the phy */
 u8 bnx2x_phy_init(struct link_params *input, struct link_vars *output);
 
 /* Reset the link. Should be called when driver or interface goes down
@@ -298,10 +308,11 @@ void bnx2x_handle_module_detect_int(struct link_params *params);
 
 /* Get the actual link status. In case it returns 0, link is up,
         otherwise link is down*/
-u8 bnx2x_test_link(struct link_params *input, struct link_vars *vars);
+u8 bnx2x_test_link(struct link_params *input, struct link_vars *vars,
+                   u8 is_serdes);
 
 /* One-time initialization for external phy after power up */
-u8 bnx2x_common_init_phy(struct bnx2x *bp, u32 shmem_base);
+u8 bnx2x_common_init_phy(struct bnx2x *bp, u32 shmem_base, u32 shmem2_base);
 
 /* Reset the external PHY using GPIO */
 void bnx2x_ext_phy_hw_reset(struct bnx2x *bp, u8 port);
@@ -316,12 +327,19 @@ u8 bnx2x_read_sfp_module_eeprom(struct bnx2x_phy *phy,
 void bnx2x_hw_reset_phy(struct link_params *params);
 
 /* Checks if HW lock is required for this phy/board type */
-u8 bnx2x_hw_lock_required(struct bnx2x *bp, u32 shmem_base);
+u8 bnx2x_hw_lock_required(struct bnx2x *bp, u32 shmem_base,
+                          u32 shmem2_base);
+
 /* Returns the aggregative supported attributes of the phys on board */
 u32 bnx2x_supported_attr(struct link_params *params, u8 phy_idx);
+
+/* Check swap bit and adjust PHY order */
+u32 bnx2x_phy_selection(struct link_params *params);
+
 /* Probe the phys on board, and populate them in "params" */
 u8 bnx2x_phy_probe(struct link_params *params);
 /* Checks if fan failure detection is required on one of the phys on board */
-u8 bnx2x_fan_failure_det_req(struct bnx2x *bp, u32 shmem_base, u8 port);
+u8 bnx2x_fan_failure_det_req(struct bnx2x *bp, u32 shmem_base,
+                             u32 shmem2_base, u8 port);
 
 #endif /* BNX2X_LINK_H */