diff options
author | Eilon Greenstein <eilong@broadcom.com> | 2009-08-12 04:24:14 -0400 |
---|---|---|
committer | David S. Miller <davem@davemloft.net> | 2009-08-13 02:02:59 -0400 |
commit | 573f203574581faaf80ca4fc079d33452327fc3b (patch) | |
tree | 1bd1cce6b130dc6a30fced46665d3a112a168bfb /drivers/net/bnx2x.h | |
parent | e4ed7113372a04df9b7aa985ce3860207dbb1141 (diff) |
bnx2x: Re-factor the initialization code
Moving the code to a more logical place and beautifying it. No real change in
behavior.
Signed-off-by: Vladislav Zolotarov <vladz@broadcom.com>
Signed-off-by: Eilon Greenstein <eilong@broadcom.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers/net/bnx2x.h')
-rw-r--r-- | drivers/net/bnx2x.h | 28 |
1 files changed, 26 insertions, 2 deletions
diff --git a/drivers/net/bnx2x.h b/drivers/net/bnx2x.h index a231780061c0..97bc5e046f47 100644 --- a/drivers/net/bnx2x.h +++ b/drivers/net/bnx2x.h | |||
@@ -116,16 +116,22 @@ | |||
116 | #define REG_RD_DMAE(bp, offset, valp, len32) \ | 116 | #define REG_RD_DMAE(bp, offset, valp, len32) \ |
117 | do { \ | 117 | do { \ |
118 | bnx2x_read_dmae(bp, offset, len32);\ | 118 | bnx2x_read_dmae(bp, offset, len32);\ |
119 | memcpy(valp, bnx2x_sp(bp, wb_data[0]), len32 * 4); \ | 119 | memcpy(valp, bnx2x_sp(bp, wb_data[0]), (len32) * 4); \ |
120 | } while (0) | 120 | } while (0) |
121 | 121 | ||
122 | #define REG_WR_DMAE(bp, offset, valp, len32) \ | 122 | #define REG_WR_DMAE(bp, offset, valp, len32) \ |
123 | do { \ | 123 | do { \ |
124 | memcpy(bnx2x_sp(bp, wb_data[0]), valp, len32 * 4); \ | 124 | memcpy(bnx2x_sp(bp, wb_data[0]), valp, (len32) * 4); \ |
125 | bnx2x_write_dmae(bp, bnx2x_sp_mapping(bp, wb_data), \ | 125 | bnx2x_write_dmae(bp, bnx2x_sp_mapping(bp, wb_data), \ |
126 | offset, len32); \ | 126 | offset, len32); \ |
127 | } while (0) | 127 | } while (0) |
128 | 128 | ||
129 | #define VIRT_WR_DMAE_LEN(bp, data, addr, len32) \ | ||
130 | do { \ | ||
131 | memcpy(GUNZIP_BUF(bp), data, (len32) * 4); \ | ||
132 | bnx2x_write_big_buf_wb(bp, addr, len32); \ | ||
133 | } while (0) | ||
134 | |||
129 | #define SHMEM_ADDR(bp, field) (bp->common.shmem_base + \ | 135 | #define SHMEM_ADDR(bp, field) (bp->common.shmem_base + \ |
130 | offsetof(struct shmem_region, field)) | 136 | offsetof(struct shmem_region, field)) |
131 | #define SHMEM_RD(bp, field) REG_RD(bp, SHMEM_ADDR(bp, field)) | 137 | #define SHMEM_RD(bp, field) REG_RD(bp, SHMEM_ADDR(bp, field)) |
@@ -988,6 +994,9 @@ struct bnx2x { | |||
988 | dma_addr_t gunzip_mapping; | 994 | dma_addr_t gunzip_mapping; |
989 | int gunzip_outlen; | 995 | int gunzip_outlen; |
990 | #define FW_BUF_SIZE 0x8000 | 996 | #define FW_BUF_SIZE 0x8000 |
997 | #define GUNZIP_BUF(bp) (bp->gunzip_buf) | ||
998 | #define GUNZIP_PHYS(bp) (bp->gunzip_mapping) | ||
999 | #define GUNZIP_OUTLEN(bp) (bp->gunzip_outlen) | ||
991 | 1000 | ||
992 | struct raw_op *init_ops; | 1001 | struct raw_op *init_ops; |
993 | /* Init blocks offsets inside init_ops */ | 1002 | /* Init blocks offsets inside init_ops */ |
@@ -1003,6 +1012,18 @@ struct bnx2x { | |||
1003 | const u8 *xsem_pram_data; | 1012 | const u8 *xsem_pram_data; |
1004 | const u8 *csem_int_table_data; | 1013 | const u8 *csem_int_table_data; |
1005 | const u8 *csem_pram_data; | 1014 | const u8 *csem_pram_data; |
1015 | #define INIT_OPS(bp) (bp->init_ops) | ||
1016 | #define INIT_OPS_OFFSETS(bp) (bp->init_ops_offsets) | ||
1017 | #define INIT_DATA(bp) (bp->init_data) | ||
1018 | #define INIT_TSEM_INT_TABLE_DATA(bp) (bp->tsem_int_table_data) | ||
1019 | #define INIT_TSEM_PRAM_DATA(bp) (bp->tsem_pram_data) | ||
1020 | #define INIT_USEM_INT_TABLE_DATA(bp) (bp->usem_int_table_data) | ||
1021 | #define INIT_USEM_PRAM_DATA(bp) (bp->usem_pram_data) | ||
1022 | #define INIT_XSEM_INT_TABLE_DATA(bp) (bp->xsem_int_table_data) | ||
1023 | #define INIT_XSEM_PRAM_DATA(bp) (bp->xsem_pram_data) | ||
1024 | #define INIT_CSEM_INT_TABLE_DATA(bp) (bp->csem_int_table_data) | ||
1025 | #define INIT_CSEM_PRAM_DATA(bp) (bp->csem_pram_data) | ||
1026 | |||
1006 | const struct firmware *firmware; | 1027 | const struct firmware *firmware; |
1007 | }; | 1028 | }; |
1008 | 1029 | ||
@@ -1030,6 +1051,9 @@ int bnx2x_get_gpio(struct bnx2x *bp, int gpio_num, u8 port); | |||
1030 | int bnx2x_set_gpio(struct bnx2x *bp, int gpio_num, u32 mode, u8 port); | 1051 | int bnx2x_set_gpio(struct bnx2x *bp, int gpio_num, u32 mode, u8 port); |
1031 | int bnx2x_set_gpio_int(struct bnx2x *bp, int gpio_num, u32 mode, u8 port); | 1052 | int bnx2x_set_gpio_int(struct bnx2x *bp, int gpio_num, u32 mode, u8 port); |
1032 | u32 bnx2x_fw_command(struct bnx2x *bp, u32 command); | 1053 | u32 bnx2x_fw_command(struct bnx2x *bp, u32 command); |
1054 | void bnx2x_reg_wr_ind(struct bnx2x *bp, u32 addr, u32 val); | ||
1055 | void bnx2x_write_dmae_phys_len(struct bnx2x *bp, dma_addr_t phys_addr, | ||
1056 | u32 addr, u32 len); | ||
1033 | 1057 | ||
1034 | static inline u32 reg_poll(struct bnx2x *bp, u32 reg, u32 expected, int ms, | 1058 | static inline u32 reg_poll(struct bnx2x *bp, u32 reg, u32 expected, int ms, |
1035 | int wait) | 1059 | int wait) |