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authorYitchak Gertner <gertner@broadcom.com>2008-06-23 23:33:36 -0400
committerDavid S. Miller <davem@davemloft.net>2008-06-23 23:33:36 -0400
commitbb2a0f7ae477740d947b442f640a5d10b51025c0 (patch)
treef12e40c057551dc645bfefd818523fec34b578db /drivers/net/bnx2x.h
parent34f80b04f325078ff21123579343d99756ad8d0e (diff)
bnx2x: New statistics code
To avoid race conditions with link up/down and driver up/down - the statistics handling was re-written in a form of state machine. Also supporting statistics for 57711 Signed-off-by: Yitchak Gertner <gertner@broadcom.com> Signed-off-by: Eilon Greenstein <eilong@broadcom.com> Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers/net/bnx2x.h')
-rw-r--r--drivers/net/bnx2x.h501
1 files changed, 200 insertions, 301 deletions
diff --git a/drivers/net/bnx2x.h b/drivers/net/bnx2x.h
index e08b9439a933..f7d73d6c3981 100644
--- a/drivers/net/bnx2x.h
+++ b/drivers/net/bnx2x.h
@@ -132,243 +132,6 @@
132#define is_multi(bp) (bp->num_queues > 1) 132#define is_multi(bp) (bp->num_queues > 1)
133 133
134 134
135struct regp {
136 u32 lo;
137 u32 hi;
138};
139
140struct bmac_stats {
141 struct regp tx_gtpkt;
142 struct regp tx_gtxpf;
143 struct regp tx_gtfcs;
144 struct regp tx_gtmca;
145 struct regp tx_gtgca;
146 struct regp tx_gtfrg;
147 struct regp tx_gtovr;
148 struct regp tx_gt64;
149 struct regp tx_gt127;
150 struct regp tx_gt255; /* 10 */
151 struct regp tx_gt511;
152 struct regp tx_gt1023;
153 struct regp tx_gt1518;
154 struct regp tx_gt2047;
155 struct regp tx_gt4095;
156 struct regp tx_gt9216;
157 struct regp tx_gt16383;
158 struct regp tx_gtmax;
159 struct regp tx_gtufl;
160 struct regp tx_gterr; /* 20 */
161 struct regp tx_gtbyt;
162
163 struct regp rx_gr64;
164 struct regp rx_gr127;
165 struct regp rx_gr255;
166 struct regp rx_gr511;
167 struct regp rx_gr1023;
168 struct regp rx_gr1518;
169 struct regp rx_gr2047;
170 struct regp rx_gr4095;
171 struct regp rx_gr9216; /* 30 */
172 struct regp rx_gr16383;
173 struct regp rx_grmax;
174 struct regp rx_grpkt;
175 struct regp rx_grfcs;
176 struct regp rx_grmca;
177 struct regp rx_grbca;
178 struct regp rx_grxcf;
179 struct regp rx_grxpf;
180 struct regp rx_grxuo;
181 struct regp rx_grjbr; /* 40 */
182 struct regp rx_grovr;
183 struct regp rx_grflr;
184 struct regp rx_grmeg;
185 struct regp rx_grmeb;
186 struct regp rx_grbyt;
187 struct regp rx_grund;
188 struct regp rx_grfrg;
189 struct regp rx_grerb;
190 struct regp rx_grfre;
191 struct regp rx_gripj; /* 50 */
192};
193
194struct emac_stats {
195 u32 rx_ifhcinoctets ;
196 u32 rx_ifhcinbadoctets ;
197 u32 rx_etherstatsfragments ;
198 u32 rx_ifhcinucastpkts ;
199 u32 rx_ifhcinmulticastpkts ;
200 u32 rx_ifhcinbroadcastpkts ;
201 u32 rx_dot3statsfcserrors ;
202 u32 rx_dot3statsalignmenterrors ;
203 u32 rx_dot3statscarriersenseerrors ;
204 u32 rx_xonpauseframesreceived ; /* 10 */
205 u32 rx_xoffpauseframesreceived ;
206 u32 rx_maccontrolframesreceived ;
207 u32 rx_xoffstateentered ;
208 u32 rx_dot3statsframestoolong ;
209 u32 rx_etherstatsjabbers ;
210 u32 rx_etherstatsundersizepkts ;
211 u32 rx_etherstatspkts64octets ;
212 u32 rx_etherstatspkts65octetsto127octets ;
213 u32 rx_etherstatspkts128octetsto255octets ;
214 u32 rx_etherstatspkts256octetsto511octets ; /* 20 */
215 u32 rx_etherstatspkts512octetsto1023octets ;
216 u32 rx_etherstatspkts1024octetsto1522octets;
217 u32 rx_etherstatspktsover1522octets ;
218
219 u32 rx_falsecarriererrors ;
220
221 u32 tx_ifhcoutoctets ;
222 u32 tx_ifhcoutbadoctets ;
223 u32 tx_etherstatscollisions ;
224 u32 tx_outxonsent ;
225 u32 tx_outxoffsent ;
226 u32 tx_flowcontroldone ; /* 30 */
227 u32 tx_dot3statssinglecollisionframes ;
228 u32 tx_dot3statsmultiplecollisionframes ;
229 u32 tx_dot3statsdeferredtransmissions ;
230 u32 tx_dot3statsexcessivecollisions ;
231 u32 tx_dot3statslatecollisions ;
232 u32 tx_ifhcoutucastpkts ;
233 u32 tx_ifhcoutmulticastpkts ;
234 u32 tx_ifhcoutbroadcastpkts ;
235 u32 tx_etherstatspkts64octets ;
236 u32 tx_etherstatspkts65octetsto127octets ; /* 40 */
237 u32 tx_etherstatspkts128octetsto255octets ;
238 u32 tx_etherstatspkts256octetsto511octets ;
239 u32 tx_etherstatspkts512octetsto1023octets ;
240 u32 tx_etherstatspkts1024octetsto1522octet ;
241 u32 tx_etherstatspktsover1522octets ;
242 u32 tx_dot3statsinternalmactransmiterrors ; /* 46 */
243};
244
245union mac_stats {
246 struct emac_stats emac;
247 struct bmac_stats bmac;
248};
249
250struct nig_stats {
251 u32 brb_discard;
252 u32 brb_packet;
253 u32 brb_truncate;
254 u32 flow_ctrl_discard;
255 u32 flow_ctrl_octets;
256 u32 flow_ctrl_packet;
257 u32 mng_discard;
258 u32 mng_octet_inp;
259 u32 mng_octet_out;
260 u32 mng_packet_inp;
261 u32 mng_packet_out;
262 u32 pbf_octets;
263 u32 pbf_packet;
264 u32 safc_inp;
265 u32 done;
266 u32 pad;
267};
268
269struct bnx2x_eth_stats {
270 u32 pad; /* to make long counters u64 aligned */
271 u32 mac_stx_start;
272 u32 total_bytes_received_hi;
273 u32 total_bytes_received_lo;
274 u32 total_bytes_transmitted_hi;
275 u32 total_bytes_transmitted_lo;
276 u32 total_unicast_packets_received_hi;
277 u32 total_unicast_packets_received_lo;
278 u32 total_multicast_packets_received_hi;
279 u32 total_multicast_packets_received_lo;
280 u32 total_broadcast_packets_received_hi;
281 u32 total_broadcast_packets_received_lo;
282 u32 total_unicast_packets_transmitted_hi;
283 u32 total_unicast_packets_transmitted_lo;
284 u32 total_multicast_packets_transmitted_hi;
285 u32 total_multicast_packets_transmitted_lo;
286 u32 total_broadcast_packets_transmitted_hi;
287 u32 total_broadcast_packets_transmitted_lo;
288 u32 crc_receive_errors;
289 u32 alignment_errors;
290 u32 false_carrier_detections;
291 u32 runt_packets_received;
292 u32 jabber_packets_received;
293 u32 pause_xon_frames_received;
294 u32 pause_xoff_frames_received;
295 u32 pause_xon_frames_transmitted;
296 u32 pause_xoff_frames_transmitted;
297 u32 single_collision_transmit_frames;
298 u32 multiple_collision_transmit_frames;
299 u32 late_collision_frames;
300 u32 excessive_collision_frames;
301 u32 control_frames_received;
302 u32 frames_received_64_bytes;
303 u32 frames_received_65_127_bytes;
304 u32 frames_received_128_255_bytes;
305 u32 frames_received_256_511_bytes;
306 u32 frames_received_512_1023_bytes;
307 u32 frames_received_1024_1522_bytes;
308 u32 frames_received_1523_9022_bytes;
309 u32 frames_transmitted_64_bytes;
310 u32 frames_transmitted_65_127_bytes;
311 u32 frames_transmitted_128_255_bytes;
312 u32 frames_transmitted_256_511_bytes;
313 u32 frames_transmitted_512_1023_bytes;
314 u32 frames_transmitted_1024_1522_bytes;
315 u32 frames_transmitted_1523_9022_bytes;
316 u32 valid_bytes_received_hi;
317 u32 valid_bytes_received_lo;
318 u32 error_runt_packets_received;
319 u32 error_jabber_packets_received;
320 u32 mac_stx_end;
321
322 u32 pad2;
323 u32 stat_IfHCInBadOctets_hi;
324 u32 stat_IfHCInBadOctets_lo;
325 u32 stat_IfHCOutBadOctets_hi;
326 u32 stat_IfHCOutBadOctets_lo;
327 u32 stat_Dot3statsFramesTooLong;
328 u32 stat_Dot3statsInternalMacTransmitErrors;
329 u32 stat_Dot3StatsCarrierSenseErrors;
330 u32 stat_Dot3StatsDeferredTransmissions;
331 u32 stat_FlowControlDone;
332 u32 stat_XoffStateEntered;
333
334 u32 x_total_sent_bytes_hi;
335 u32 x_total_sent_bytes_lo;
336 u32 x_total_sent_pkts;
337
338 u32 t_rcv_unicast_bytes_hi;
339 u32 t_rcv_unicast_bytes_lo;
340 u32 t_rcv_broadcast_bytes_hi;
341 u32 t_rcv_broadcast_bytes_lo;
342 u32 t_rcv_multicast_bytes_hi;
343 u32 t_rcv_multicast_bytes_lo;
344 u32 t_total_rcv_pkt;
345
346 u32 checksum_discard;
347 u32 packets_too_big_discard;
348 u32 no_buff_discard;
349 u32 ttl0_discard;
350 u32 mac_discard;
351 u32 mac_filter_discard;
352 u32 xxoverflow_discard;
353 u32 brb_truncate_discard;
354
355 u32 brb_discard;
356 u32 brb_packet;
357 u32 brb_truncate;
358 u32 flow_ctrl_discard;
359 u32 flow_ctrl_octets;
360 u32 flow_ctrl_packet;
361 u32 mng_discard;
362 u32 mng_octet_inp;
363 u32 mng_octet_out;
364 u32 mng_packet_inp;
365 u32 mng_packet_out;
366 u32 pbf_octets;
367 u32 pbf_packet;
368 u32 safc_inp;
369 u32 driver_xoff;
370 u32 number_of_bugs_found_in_stats_spec; /* just kidding */
371};
372 135
373#define bnx2x_sp_check(bp, var) ((bp->slowpath) ? (&bp->slowpath->var) : NULL) 136#define bnx2x_sp_check(bp, var) ((bp->slowpath) ? (&bp->slowpath->var) : NULL)
374struct sw_rx_bd { 137struct sw_rx_bd {
@@ -447,6 +210,10 @@ struct bnx2x_fastpath {
447/* This is needed for determening of last_max */ 210/* This is needed for determening of last_max */
448#define SUB_S16(a, b) (s16)((s16)(a) - (s16)(b)) 211#define SUB_S16(a, b) (s16)((s16)(a) - (s16)(b))
449 212
213#define BD_UNMAP_ADDR(bd) HILO_U64(le32_to_cpu((bd)->addr_hi), \
214 le32_to_cpu((bd)->addr_lo))
215#define BD_UNMAP_LEN(bd) (le16_to_cpu((bd)->nbytes))
216
450/* stuff added to make the code fit 80Col */ 217/* stuff added to make the code fit 80Col */
451 218
452#define CQE_TYPE(cqe_fp_flags) ((cqe_fp_flags) & ETH_FAST_PATH_RX_CQE_TYPE) 219#define CQE_TYPE(cqe_fp_flags) ((cqe_fp_flags) & ETH_FAST_PATH_RX_CQE_TYPE)
@@ -456,6 +223,9 @@ struct bnx2x_fastpath {
456 ETH_FAST_PATH_RX_CQE_L4_BAD_XSUM_FLG) 223 ETH_FAST_PATH_RX_CQE_L4_BAD_XSUM_FLG)
457 224
458 225
226#define FP_USB_FUNC_OFF (2 + 2*HC_USTORM_SB_NUM_INDICES)
227#define FP_CSB_FUNC_OFF (2 + 2*HC_CSTORM_SB_NUM_INDICES)
228
459#define U_SB_ETH_RX_CQ_INDEX HC_INDEX_U_ETH_RX_CQ_CONS 229#define U_SB_ETH_RX_CQ_INDEX HC_INDEX_U_ETH_RX_CQ_CONS
460#define U_SB_ETH_RX_BD_INDEX HC_INDEX_U_ETH_RX_BD_CONS 230#define U_SB_ETH_RX_BD_INDEX HC_INDEX_U_ETH_RX_BD_CONS
461#define C_SB_ETH_TX_CQ_INDEX HC_INDEX_C_ETH_TX_CQ_CONS 231#define C_SB_ETH_TX_CQ_INDEX HC_INDEX_C_ETH_TX_CQ_CONS
@@ -533,6 +303,27 @@ struct bnx2x_common {
533 303
534/* port */ 304/* port */
535 305
306struct nig_stats {
307 u32 brb_discard;
308 u32 brb_packet;
309 u32 brb_truncate;
310 u32 flow_ctrl_discard;
311 u32 flow_ctrl_octets;
312 u32 flow_ctrl_packet;
313 u32 mng_discard;
314 u32 mng_octet_inp;
315 u32 mng_octet_out;
316 u32 mng_packet_inp;
317 u32 mng_packet_out;
318 u32 pbf_octets;
319 u32 pbf_packet;
320 u32 safc_inp;
321 u32 egress_mac_pkt0_lo;
322 u32 egress_mac_pkt0_hi;
323 u32 egress_mac_pkt1_lo;
324 u32 egress_mac_pkt1_hi;
325};
326
536struct bnx2x_port { 327struct bnx2x_port {
537 u32 pmf; 328 u32 pmf;
538 329
@@ -558,7 +349,144 @@ struct bnx2x_port {
558 349
559/* end of port */ 350/* end of port */
560 351
561#define MAC_STX_NA 0xffffffff 352
353enum bnx2x_stats_event {
354 STATS_EVENT_PMF = 0,
355 STATS_EVENT_LINK_UP,
356 STATS_EVENT_UPDATE,
357 STATS_EVENT_STOP,
358 STATS_EVENT_MAX
359};
360
361enum bnx2x_stats_state {
362 STATS_STATE_DISABLED = 0,
363 STATS_STATE_ENABLED,
364 STATS_STATE_MAX
365};
366
367struct bnx2x_eth_stats {
368 u32 total_bytes_received_hi;
369 u32 total_bytes_received_lo;
370 u32 total_bytes_transmitted_hi;
371 u32 total_bytes_transmitted_lo;
372 u32 total_unicast_packets_received_hi;
373 u32 total_unicast_packets_received_lo;
374 u32 total_multicast_packets_received_hi;
375 u32 total_multicast_packets_received_lo;
376 u32 total_broadcast_packets_received_hi;
377 u32 total_broadcast_packets_received_lo;
378 u32 total_unicast_packets_transmitted_hi;
379 u32 total_unicast_packets_transmitted_lo;
380 u32 total_multicast_packets_transmitted_hi;
381 u32 total_multicast_packets_transmitted_lo;
382 u32 total_broadcast_packets_transmitted_hi;
383 u32 total_broadcast_packets_transmitted_lo;
384 u32 valid_bytes_received_hi;
385 u32 valid_bytes_received_lo;
386
387 u32 error_bytes_received_hi;
388 u32 error_bytes_received_lo;
389
390 u32 rx_stat_ifhcinbadoctets_hi;
391 u32 rx_stat_ifhcinbadoctets_lo;
392 u32 tx_stat_ifhcoutbadoctets_hi;
393 u32 tx_stat_ifhcoutbadoctets_lo;
394 u32 rx_stat_dot3statsfcserrors_hi;
395 u32 rx_stat_dot3statsfcserrors_lo;
396 u32 rx_stat_dot3statsalignmenterrors_hi;
397 u32 rx_stat_dot3statsalignmenterrors_lo;
398 u32 rx_stat_dot3statscarriersenseerrors_hi;
399 u32 rx_stat_dot3statscarriersenseerrors_lo;
400 u32 rx_stat_falsecarriererrors_hi;
401 u32 rx_stat_falsecarriererrors_lo;
402 u32 rx_stat_etherstatsundersizepkts_hi;
403 u32 rx_stat_etherstatsundersizepkts_lo;
404 u32 rx_stat_dot3statsframestoolong_hi;
405 u32 rx_stat_dot3statsframestoolong_lo;
406 u32 rx_stat_etherstatsfragments_hi;
407 u32 rx_stat_etherstatsfragments_lo;
408 u32 rx_stat_etherstatsjabbers_hi;
409 u32 rx_stat_etherstatsjabbers_lo;
410 u32 rx_stat_maccontrolframesreceived_hi;
411 u32 rx_stat_maccontrolframesreceived_lo;
412 u32 rx_stat_bmac_xpf_hi;
413 u32 rx_stat_bmac_xpf_lo;
414 u32 rx_stat_bmac_xcf_hi;
415 u32 rx_stat_bmac_xcf_lo;
416 u32 rx_stat_xoffstateentered_hi;
417 u32 rx_stat_xoffstateentered_lo;
418 u32 rx_stat_xonpauseframesreceived_hi;
419 u32 rx_stat_xonpauseframesreceived_lo;
420 u32 rx_stat_xoffpauseframesreceived_hi;
421 u32 rx_stat_xoffpauseframesreceived_lo;
422 u32 tx_stat_outxonsent_hi;
423 u32 tx_stat_outxonsent_lo;
424 u32 tx_stat_outxoffsent_hi;
425 u32 tx_stat_outxoffsent_lo;
426 u32 tx_stat_flowcontroldone_hi;
427 u32 tx_stat_flowcontroldone_lo;
428 u32 tx_stat_etherstatscollisions_hi;
429 u32 tx_stat_etherstatscollisions_lo;
430 u32 tx_stat_dot3statssinglecollisionframes_hi;
431 u32 tx_stat_dot3statssinglecollisionframes_lo;
432 u32 tx_stat_dot3statsmultiplecollisionframes_hi;
433 u32 tx_stat_dot3statsmultiplecollisionframes_lo;
434 u32 tx_stat_dot3statsdeferredtransmissions_hi;
435 u32 tx_stat_dot3statsdeferredtransmissions_lo;
436 u32 tx_stat_dot3statsexcessivecollisions_hi;
437 u32 tx_stat_dot3statsexcessivecollisions_lo;
438 u32 tx_stat_dot3statslatecollisions_hi;
439 u32 tx_stat_dot3statslatecollisions_lo;
440 u32 tx_stat_etherstatspkts64octets_hi;
441 u32 tx_stat_etherstatspkts64octets_lo;
442 u32 tx_stat_etherstatspkts65octetsto127octets_hi;
443 u32 tx_stat_etherstatspkts65octetsto127octets_lo;
444 u32 tx_stat_etherstatspkts128octetsto255octets_hi;
445 u32 tx_stat_etherstatspkts128octetsto255octets_lo;
446 u32 tx_stat_etherstatspkts256octetsto511octets_hi;
447 u32 tx_stat_etherstatspkts256octetsto511octets_lo;
448 u32 tx_stat_etherstatspkts512octetsto1023octets_hi;
449 u32 tx_stat_etherstatspkts512octetsto1023octets_lo;
450 u32 tx_stat_etherstatspkts1024octetsto1522octets_hi;
451 u32 tx_stat_etherstatspkts1024octetsto1522octets_lo;
452 u32 tx_stat_etherstatspktsover1522octets_hi;
453 u32 tx_stat_etherstatspktsover1522octets_lo;
454 u32 tx_stat_bmac_2047_hi;
455 u32 tx_stat_bmac_2047_lo;
456 u32 tx_stat_bmac_4095_hi;
457 u32 tx_stat_bmac_4095_lo;
458 u32 tx_stat_bmac_9216_hi;
459 u32 tx_stat_bmac_9216_lo;
460 u32 tx_stat_bmac_16383_hi;
461 u32 tx_stat_bmac_16383_lo;
462 u32 tx_stat_dot3statsinternalmactransmiterrors_hi;
463 u32 tx_stat_dot3statsinternalmactransmiterrors_lo;
464 u32 tx_stat_bmac_ufl_hi;
465 u32 tx_stat_bmac_ufl_lo;
466
467 u32 brb_drop_hi;
468 u32 brb_drop_lo;
469
470 u32 jabber_packets_received;
471
472 u32 etherstatspkts1024octetsto1522octets_hi;
473 u32 etherstatspkts1024octetsto1522octets_lo;
474 u32 etherstatspktsover1522octets_hi;
475 u32 etherstatspktsover1522octets_lo;
476
477 u32 no_buff_discard;
478
479 u32 mac_filter_discard;
480 u32 xxoverflow_discard;
481 u32 brb_truncate_discard;
482 u32 mac_discard;
483
484 u32 driver_xoff;
485};
486
487#define STATS_OFFSET32(stat_name) \
488 (offsetof(struct bnx2x_eth_stats, stat_name) / 4)
489
562 490
563#ifdef BNX2X_MULTI 491#ifdef BNX2X_MULTI
564#define MAX_CONTEXT 16 492#define MAX_CONTEXT 16
@@ -571,7 +499,7 @@ union cdu_context {
571 char pad[1024]; 499 char pad[1024];
572}; 500};
573 501
574#define MAX_DMAE_C 6 502#define MAX_DMAE_C 8
575 503
576/* DMA memory not used in fastpath */ 504/* DMA memory not used in fastpath */
577struct bnx2x_slowpath { 505struct bnx2x_slowpath {
@@ -583,12 +511,13 @@ struct bnx2x_slowpath {
583 /* used by dmae command executer */ 511 /* used by dmae command executer */
584 struct dmae_command dmae[MAX_DMAE_C]; 512 struct dmae_command dmae[MAX_DMAE_C];
585 513
586 union mac_stats mac_stats; 514 u32 stats_comp;
587 struct nig_stats nig; 515 union mac_stats mac_stats;
588 struct bnx2x_eth_stats eth_stats; 516 struct nig_stats nig_stats;
517 struct host_port_stats port_stats;
518 struct host_func_stats func_stats;
589 519
590 u32 wb_comp; 520 u32 wb_comp;
591#define BNX2X_WB_COMP_VAL 0xe0d0d0ae
592 u32 wb_data[4]; 521 u32 wb_data[4];
593}; 522};
594 523
@@ -657,10 +586,10 @@ struct bnx2x {
657 /* used to synchronize spq accesses */ 586 /* used to synchronize spq accesses */
658 spinlock_t spq_lock; 587 spinlock_t spq_lock;
659 588
660 /* Flag for marking that there is either 589 /* Flags for marking that there is a STAT_QUERY or
661 * STAT_QUERY or CFC DELETE ramrod pending 590 SET_MAC ramrod pending */
662 */ 591 u8 stats_pending;
663 u8 stat_pending; 592 u8 set_mac_pending;
664 593
665 /* End of fileds used in the performance code paths */ 594 /* End of fileds used in the performance code paths */
666 595
@@ -766,62 +695,31 @@ struct bnx2x {
766 dma_addr_t qm_mapping; 695 dma_addr_t qm_mapping;
767#endif 696#endif
768 697
769 char *name;
770
771 /* used to synchronize stats collecting */
772 int stats_state;
773#define STATS_STATE_DISABLE 0
774#define STATS_STATE_ENABLE 1
775#define STATS_STATE_STOP 2 /* stop stats on next iteration */
776
777 /* used by dmae command loader */
778 struct dmae_command dmae;
779 int executer_idx;
780
781 int dmae_ready; 698 int dmae_ready;
782 /* used to synchronize dmae accesses */ 699 /* used to synchronize dmae accesses */
783 struct mutex dmae_mutex; 700 struct mutex dmae_mutex;
784 struct dmae_command init_dmae; 701 struct dmae_command init_dmae;
785 702
703 /* used to synchronize stats collecting */
704 int stats_state;
705 /* used by dmae command loader */
706 struct dmae_command stats_dmae;
707 int executer_idx;
786 708
787 709 u16 stats_counter;
788 u32 old_brb_discard;
789 struct bmac_stats old_bmac;
790 struct tstorm_per_client_stats old_tclient; 710 struct tstorm_per_client_stats old_tclient;
791 struct z_stream_s *strm; 711 struct xstorm_per_client_stats old_xclient;
792 void *gunzip_buf; 712 struct bnx2x_eth_stats eth_stats;
793 dma_addr_t gunzip_mapping; 713
794 int gunzip_outlen; 714 struct z_stream_s *strm;
715 void *gunzip_buf;
716 dma_addr_t gunzip_mapping;
717 int gunzip_outlen;
795#define FW_BUF_SIZE 0x8000 718#define FW_BUF_SIZE 0x8000
796 719
797}; 720};
798 721
799 722
800/* DMAE command defines */
801#define DMAE_CMD_SRC_PCI 0
802#define DMAE_CMD_SRC_GRC DMAE_COMMAND_SRC
803
804#define DMAE_CMD_DST_PCI (1 << DMAE_COMMAND_DST_SHIFT)
805#define DMAE_CMD_DST_GRC (2 << DMAE_COMMAND_DST_SHIFT)
806
807#define DMAE_CMD_C_DST_PCI 0
808#define DMAE_CMD_C_DST_GRC (1 << DMAE_COMMAND_C_DST_SHIFT)
809
810#define DMAE_CMD_C_ENABLE DMAE_COMMAND_C_TYPE_ENABLE
811
812#define DMAE_CMD_ENDIANITY_NO_SWAP (0 << DMAE_COMMAND_ENDIANITY_SHIFT)
813#define DMAE_CMD_ENDIANITY_B_SWAP (1 << DMAE_COMMAND_ENDIANITY_SHIFT)
814#define DMAE_CMD_ENDIANITY_DW_SWAP (2 << DMAE_COMMAND_ENDIANITY_SHIFT)
815#define DMAE_CMD_ENDIANITY_B_DW_SWAP (3 << DMAE_COMMAND_ENDIANITY_SHIFT)
816
817#define DMAE_CMD_PORT_0 0
818#define DMAE_CMD_PORT_1 DMAE_COMMAND_PORT
819
820#define DMAE_CMD_SRC_RESET DMAE_COMMAND_SRC_RESET
821#define DMAE_CMD_DST_RESET DMAE_COMMAND_DST_RESET
822
823#define DMAE_LEN32_MAX 0x400
824
825void bnx2x_read_dmae(struct bnx2x *bp, u32 src_addr, u32 len32); 723void bnx2x_read_dmae(struct bnx2x *bp, u32 src_addr, u32 len32);
826void bnx2x_write_dmae(struct bnx2x *bp, dma_addr_t dma_addr, u32 dst_addr, 724void bnx2x_write_dmae(struct bnx2x *bp, dma_addr_t dma_addr, u32 dst_addr,
827 u32 len32); 725 u32 len32);
@@ -875,11 +773,6 @@ int bnx2x_set_gpio(struct bnx2x *bp, int gpio_num, u32 mode);
875#define CQE_CMD(x) (le32_to_cpu(x) >> \ 773#define CQE_CMD(x) (le32_to_cpu(x) >> \
876 COMMON_RAMROD_ETH_RX_CQE_CMD_ID_SHIFT) 774 COMMON_RAMROD_ETH_RX_CQE_CMD_ID_SHIFT)
877 775
878#define BD_UNMAP_ADDR(bd) HILO_U64(le32_to_cpu((bd)->addr_hi), \
879 le32_to_cpu((bd)->addr_lo))
880#define BD_UNMAP_LEN(bd) (le16_to_cpu((bd)->nbytes))
881
882
883#define STROM_ASSERT_ARRAY_SIZE 50 776#define STROM_ASSERT_ARRAY_SIZE 50
884 777
885 778
@@ -895,10 +788,6 @@ int bnx2x_set_gpio(struct bnx2x *bp, int gpio_num, u32 mode);
895#define MAX_SPQ_PENDING 8 788#define MAX_SPQ_PENDING 8
896 789
897 790
898#define BNX2X_NUM_STATS 34
899#define BNX2X_NUM_TESTS 1
900
901
902#define DPM_TRIGER_TYPE 0x40 791#define DPM_TRIGER_TYPE 0x40
903#define DOORBELL(bp, cid, val) \ 792#define DOORBELL(bp, cid, val) \
904 do { \ 793 do { \
@@ -931,6 +820,7 @@ static inline u32 reg_poll(struct bnx2x *bp, u32 reg, u32 expected, int ms,
931#define UNLOAD_NORMAL 0 820#define UNLOAD_NORMAL 0
932#define UNLOAD_CLOSE 1 821#define UNLOAD_CLOSE 1
933 822
823
934/* DMAE command defines */ 824/* DMAE command defines */
935#define DMAE_CMD_SRC_PCI 0 825#define DMAE_CMD_SRC_PCI 0
936#define DMAE_CMD_SRC_GRC DMAE_COMMAND_SRC 826#define DMAE_CMD_SRC_GRC DMAE_COMMAND_SRC
@@ -973,7 +863,16 @@ static inline u32 reg_poll(struct bnx2x *bp, u32 reg, u32 expected, int ms,
973#define PCICFG_LINK_SPEED 0xf0000 863#define PCICFG_LINK_SPEED 0xf0000
974#define PCICFG_LINK_SPEED_SHIFT 16 864#define PCICFG_LINK_SPEED_SHIFT 16
975 865
976#define BMAC_CONTROL_RX_ENABLE 2 866
867#define BNX2X_NUM_STATS 39
868#define BNX2X_NUM_TESTS 8
869
870#define BNX2X_MAC_LOOPBACK 0
871#define BNX2X_PHY_LOOPBACK 1
872#define BNX2X_MAC_LOOPBACK_FAILED 1
873#define BNX2X_PHY_LOOPBACK_FAILED 2
874#define BNX2X_LOOPBACK_FAILED (BNX2X_MAC_LOOPBACK_FAILED | \
875 BNX2X_PHY_LOOPBACK_FAILED)
977 876
978#define pbd_tcp_flags(skb) (ntohl(tcp_flag_word(tcp_hdr(skb)))>>16 & 0xff) 877#define pbd_tcp_flags(skb) (ntohl(tcp_flag_word(tcp_hdr(skb)))>>16 & 0xff)
979 878