bnx2x: Minor code improvements

Minor code improvements
Small changes to make the code a little bit more efficient and mostly
more readable:
- Using unified macros for EMAC_RD/WR which looks like normal REG_RD/WR
- Removing the NIG_WR since it did nothing and was only confusing
- On bnx2x_panic_dump, print only the used parts of the rings
- define parameters only on the branch they are needed and not at the
  beginning of the function
- using NETIF_MSG_INTR and not private BNX2X_MSG_SP for debug prints

Signed-off-by: Eilon Greenstein <eilong@broadcom.com>
Signed-off-by: David S. Miller <davem@davemloft.net>

1 files changed, 10 insertions, 13 deletions

diff --git a/drivers/net/bnx2x.h b/drivers/net/bnx2x.h
index 98d6f85fdeb5..80f5179d636c 100644
--- a/drivers/net/bnx2x.h
+++ b/drivers/net/bnx2x.h
@@ -121,16 +121,7 @@
 #define SHMEM_WR(bp, field, val)        REG_WR(bp, SHMEM_ADDR(bp, field), val)
 
 #define EMAC_RD(bp, reg)                REG_RD(bp, emac_base + reg)
-#define NIG_WR(reg, val)        REG_WR(bp, reg, val)
-#define EMAC_WR(reg, val)       REG_WR(bp, emac_base + reg, val)
-#define BMAC_WR(reg, val)       REG_WR(bp, GRCBASE_NIG + bmac_addr + reg, val)
-
-
-#define for_each_queue(bp, var) for (var = 0; var < bp->num_queues; var++)
-
-#define for_each_nondefault_queue(bp, var) \
-                                for (var = 1; var < bp->num_queues; var++)
-#define is_multi(bp)            (bp->num_queues > 1)
+#define EMAC_WR(bp, reg, val)           REG_WR(bp, emac_base + reg, val)
 
 
 /* fast path */
@@ -815,9 +806,6 @@ struct bnx2x {
 #define BP_FUNC(bp)                     (bp->func)
 #define BP_E1HVN(bp)                    (bp->func >> 1)
 #define BP_L_ID(bp)                     (BP_E1HVN(bp) << 2)
-/* assorted E1HVN */
-#define IS_E1HMF(bp)                    (bp->e1hmf != 0)
-#define BP_MAX_QUEUES(bp)               (IS_E1HMF(bp) ? 4 : 16)
 
         int                     pm_cap;
         int                     pcie_cap;
@@ -842,6 +830,7 @@ struct bnx2x {
         u32                     mf_config;
         u16                     e1hov;
         u8                      e1hmf;
+#define IS_E1HMF(bp)                    (bp->e1hmf != 0)
 
         u8                      wol;
 
@@ -872,6 +861,7 @@ struct bnx2x {
 #define BNX2X_STATE_ERROR               0xf000
 
         int                     num_queues;
+#define BP_MAX_QUEUES(bp)               (IS_E1HMF(bp) ? 4 : 16)
 
         u32                     rx_mode;
 #define BNX2X_RX_MODE_NONE              0
@@ -922,6 +912,13 @@ struct bnx2x {
 };
 
 
+#define for_each_queue(bp, var) for (var = 0; var < bp->num_queues; var++)
+
+#define for_each_nondefault_queue(bp, var) \
+                                for (var = 1; var < bp->num_queues; var++)
+#define is_multi(bp)            (bp->num_queues > 1)
+
+
 void bnx2x_read_dmae(struct bnx2x *bp, u32 src_addr, u32 len32);
 void bnx2x_write_dmae(struct bnx2x *bp, dma_addr_t dma_addr, u32 dst_addr,
                       u32 len32);