diff options
author | Linus Torvalds <torvalds@linux-foundation.org> | 2010-05-21 00:04:44 -0400 |
---|---|---|
committer | Linus Torvalds <torvalds@linux-foundation.org> | 2010-05-21 00:04:44 -0400 |
commit | f8965467f366fd18f01feafb5db10512d7b4422c (patch) | |
tree | 3706a9cd779859271ca61b85c63a1bc3f82d626e /drivers/net/bnx2x.h | |
parent | a26272e5200765691e67d6780e52b32498fdb659 (diff) | |
parent | 2ec8c6bb5d8f3a62a79f463525054bae1e3d4487 (diff) |
Merge git://git.kernel.org/pub/scm/linux/kernel/git/davem/net-next-2.6
* git://git.kernel.org/pub/scm/linux/kernel/git/davem/net-next-2.6: (1674 commits)
qlcnic: adding co maintainer
ixgbe: add support for active DA cables
ixgbe: dcb, do not tag tc_prio_control frames
ixgbe: fix ixgbe_tx_is_paused logic
ixgbe: always enable vlan strip/insert when DCB is enabled
ixgbe: remove some redundant code in setting FCoE FIP filter
ixgbe: fix wrong offset to fc_frame_header in ixgbe_fcoe_ddp
ixgbe: fix header len when unsplit packet overflows to data buffer
ipv6: Never schedule DAD timer on dead address
ipv6: Use POSTDAD state
ipv6: Use state_lock to protect ifa state
ipv6: Replace inet6_ifaddr->dead with state
cxgb4: notify upper drivers if the device is already up when they load
cxgb4: keep interrupts available when the ports are brought down
cxgb4: fix initial addition of MAC address
cnic: Return SPQ credit to bnx2x after ring setup and shutdown.
cnic: Convert cnic_local_flags to atomic ops.
can: Fix SJA1000 command register writes on SMP systems
bridge: fix build for CONFIG_SYSFS disabled
ARCNET: Limit com20020 PCI ID matches for SOHARD cards
...
Fix up various conflicts with pcmcia tree drivers/net/
{pcmcia/3c589_cs.c, wireless/orinoco/orinoco_cs.c and
wireless/orinoco/spectrum_cs.c} and feature removal
(Documentation/feature-removal-schedule.txt).
Also fix a non-content conflict due to pm_qos_requirement getting
renamed in the PM tree (now pm_qos_request) in net/mac80211/scan.c
Diffstat (limited to 'drivers/net/bnx2x.h')
-rw-r--r-- | drivers/net/bnx2x.h | 66 |
1 files changed, 52 insertions, 14 deletions
diff --git a/drivers/net/bnx2x.h b/drivers/net/bnx2x.h index 3c48a7a68308..8bd23687c530 100644 --- a/drivers/net/bnx2x.h +++ b/drivers/net/bnx2x.h | |||
@@ -24,16 +24,25 @@ | |||
24 | #define BCM_VLAN 1 | 24 | #define BCM_VLAN 1 |
25 | #endif | 25 | #endif |
26 | 26 | ||
27 | #define BNX2X_MULTI_QUEUE | ||
28 | |||
29 | #define BNX2X_NEW_NAPI | ||
30 | |||
31 | |||
32 | |||
27 | #if defined(CONFIG_CNIC) || defined(CONFIG_CNIC_MODULE) | 33 | #if defined(CONFIG_CNIC) || defined(CONFIG_CNIC_MODULE) |
28 | #define BCM_CNIC 1 | 34 | #define BCM_CNIC 1 |
29 | #include "cnic_if.h" | 35 | #include "cnic_if.h" |
30 | #endif | 36 | #endif |
31 | 37 | ||
32 | #define BNX2X_MULTI_QUEUE | ||
33 | |||
34 | #define BNX2X_NEW_NAPI | ||
35 | |||
36 | 38 | ||
39 | #ifdef BCM_CNIC | ||
40 | #define BNX2X_MIN_MSIX_VEC_CNT 3 | ||
41 | #define BNX2X_MSIX_VEC_FP_START 2 | ||
42 | #else | ||
43 | #define BNX2X_MIN_MSIX_VEC_CNT 2 | ||
44 | #define BNX2X_MSIX_VEC_FP_START 1 | ||
45 | #endif | ||
37 | 46 | ||
38 | #include <linux/mdio.h> | 47 | #include <linux/mdio.h> |
39 | #include "bnx2x_reg.h" | 48 | #include "bnx2x_reg.h" |
@@ -83,7 +92,12 @@ do { \ | |||
83 | __func__, __LINE__, \ | 92 | __func__, __LINE__, \ |
84 | bp->dev ? (bp->dev->name) : "?", \ | 93 | bp->dev ? (bp->dev->name) : "?", \ |
85 | ##__args); \ | 94 | ##__args); \ |
86 | } while (0) | 95 | } while (0) |
96 | |||
97 | #define BNX2X_ERROR(__fmt, __args...) do { \ | ||
98 | pr_err("[%s:%d]" __fmt, __func__, __LINE__, ##__args); \ | ||
99 | } while (0) | ||
100 | |||
87 | 101 | ||
88 | /* before we have a dev->name use dev_info() */ | 102 | /* before we have a dev->name use dev_info() */ |
89 | #define BNX2X_DEV_INFO(__fmt, __args...) \ | 103 | #define BNX2X_DEV_INFO(__fmt, __args...) \ |
@@ -155,15 +169,21 @@ do { \ | |||
155 | #define SHMEM2_RD(bp, field) REG_RD(bp, SHMEM2_ADDR(bp, field)) | 169 | #define SHMEM2_RD(bp, field) REG_RD(bp, SHMEM2_ADDR(bp, field)) |
156 | #define SHMEM2_WR(bp, field, val) REG_WR(bp, SHMEM2_ADDR(bp, field), val) | 170 | #define SHMEM2_WR(bp, field, val) REG_WR(bp, SHMEM2_ADDR(bp, field), val) |
157 | 171 | ||
172 | #define MF_CFG_RD(bp, field) SHMEM_RD(bp, mf_cfg.field) | ||
173 | #define MF_CFG_WR(bp, field, val) SHMEM_WR(bp, mf_cfg.field, val) | ||
174 | |||
158 | #define EMAC_RD(bp, reg) REG_RD(bp, emac_base + reg) | 175 | #define EMAC_RD(bp, reg) REG_RD(bp, emac_base + reg) |
159 | #define EMAC_WR(bp, reg, val) REG_WR(bp, emac_base + reg, val) | 176 | #define EMAC_WR(bp, reg, val) REG_WR(bp, emac_base + reg, val) |
160 | 177 | ||
178 | #define AEU_IN_ATTN_BITS_PXPPCICLOCKCLIENT_PARITY_ERROR \ | ||
179 | AEU_INPUTS_ATTN_BITS_PXPPCICLOCKCLIENT_PARITY_ERROR | ||
180 | |||
161 | 181 | ||
162 | /* fast path */ | 182 | /* fast path */ |
163 | 183 | ||
164 | struct sw_rx_bd { | 184 | struct sw_rx_bd { |
165 | struct sk_buff *skb; | 185 | struct sk_buff *skb; |
166 | DECLARE_PCI_UNMAP_ADDR(mapping) | 186 | DEFINE_DMA_UNMAP_ADDR(mapping); |
167 | }; | 187 | }; |
168 | 188 | ||
169 | struct sw_tx_bd { | 189 | struct sw_tx_bd { |
@@ -176,7 +196,7 @@ struct sw_tx_bd { | |||
176 | 196 | ||
177 | struct sw_rx_page { | 197 | struct sw_rx_page { |
178 | struct page *page; | 198 | struct page *page; |
179 | DECLARE_PCI_UNMAP_ADDR(mapping) | 199 | DEFINE_DMA_UNMAP_ADDR(mapping); |
180 | }; | 200 | }; |
181 | 201 | ||
182 | union db_prod { | 202 | union db_prod { |
@@ -261,7 +281,7 @@ struct bnx2x_eth_q_stats { | |||
261 | u32 hw_csum_err; | 281 | u32 hw_csum_err; |
262 | }; | 282 | }; |
263 | 283 | ||
264 | #define BNX2X_NUM_Q_STATS 11 | 284 | #define BNX2X_NUM_Q_STATS 13 |
265 | #define Q_STATS_OFFSET32(stat_name) \ | 285 | #define Q_STATS_OFFSET32(stat_name) \ |
266 | (offsetof(struct bnx2x_eth_q_stats, stat_name) / 4) | 286 | (offsetof(struct bnx2x_eth_q_stats, stat_name) / 4) |
267 | 287 | ||
@@ -767,7 +787,7 @@ struct bnx2x_eth_stats { | |||
767 | u32 nig_timer_max; | 787 | u32 nig_timer_max; |
768 | }; | 788 | }; |
769 | 789 | ||
770 | #define BNX2X_NUM_STATS 41 | 790 | #define BNX2X_NUM_STATS 43 |
771 | #define STATS_OFFSET32(stat_name) \ | 791 | #define STATS_OFFSET32(stat_name) \ |
772 | (offsetof(struct bnx2x_eth_stats, stat_name) / 4) | 792 | (offsetof(struct bnx2x_eth_stats, stat_name) / 4) |
773 | 793 | ||
@@ -818,6 +838,12 @@ struct attn_route { | |||
818 | u32 sig[4]; | 838 | u32 sig[4]; |
819 | }; | 839 | }; |
820 | 840 | ||
841 | typedef enum { | ||
842 | BNX2X_RECOVERY_DONE, | ||
843 | BNX2X_RECOVERY_INIT, | ||
844 | BNX2X_RECOVERY_WAIT, | ||
845 | } bnx2x_recovery_state_t; | ||
846 | |||
821 | struct bnx2x { | 847 | struct bnx2x { |
822 | /* Fields used in the tx and intr/napi performance paths | 848 | /* Fields used in the tx and intr/napi performance paths |
823 | * are grouped together in the beginning of the structure | 849 | * are grouped together in the beginning of the structure |
@@ -835,6 +861,9 @@ struct bnx2x { | |||
835 | struct pci_dev *pdev; | 861 | struct pci_dev *pdev; |
836 | 862 | ||
837 | atomic_t intr_sem; | 863 | atomic_t intr_sem; |
864 | |||
865 | bnx2x_recovery_state_t recovery_state; | ||
866 | int is_leader; | ||
838 | #ifdef BCM_CNIC | 867 | #ifdef BCM_CNIC |
839 | struct msix_entry msix_table[MAX_CONTEXT+2]; | 868 | struct msix_entry msix_table[MAX_CONTEXT+2]; |
840 | #else | 869 | #else |
@@ -842,7 +871,6 @@ struct bnx2x { | |||
842 | #endif | 871 | #endif |
843 | #define INT_MODE_INTx 1 | 872 | #define INT_MODE_INTx 1 |
844 | #define INT_MODE_MSI 2 | 873 | #define INT_MODE_MSI 2 |
845 | #define INT_MODE_MSIX 3 | ||
846 | 874 | ||
847 | int tx_ring_size; | 875 | int tx_ring_size; |
848 | 876 | ||
@@ -924,8 +952,7 @@ struct bnx2x { | |||
924 | int mrrs; | 952 | int mrrs; |
925 | 953 | ||
926 | struct delayed_work sp_task; | 954 | struct delayed_work sp_task; |
927 | struct work_struct reset_task; | 955 | struct delayed_work reset_task; |
928 | |||
929 | struct timer_list timer; | 956 | struct timer_list timer; |
930 | int current_interval; | 957 | int current_interval; |
931 | 958 | ||
@@ -961,6 +988,8 @@ struct bnx2x { | |||
961 | u16 rx_quick_cons_trip; | 988 | u16 rx_quick_cons_trip; |
962 | u16 rx_ticks_int; | 989 | u16 rx_ticks_int; |
963 | u16 rx_ticks; | 990 | u16 rx_ticks; |
991 | /* Maximal coalescing timeout in us */ | ||
992 | #define BNX2X_MAX_COALESCE_TOUT (0xf0*12) | ||
964 | 993 | ||
965 | u32 lin_cnt; | 994 | u32 lin_cnt; |
966 | 995 | ||
@@ -1075,6 +1104,7 @@ struct bnx2x { | |||
1075 | #define INIT_CSEM_INT_TABLE_DATA(bp) (bp->csem_int_table_data) | 1104 | #define INIT_CSEM_INT_TABLE_DATA(bp) (bp->csem_int_table_data) |
1076 | #define INIT_CSEM_PRAM_DATA(bp) (bp->csem_pram_data) | 1105 | #define INIT_CSEM_PRAM_DATA(bp) (bp->csem_pram_data) |
1077 | 1106 | ||
1107 | char fw_ver[32]; | ||
1078 | const struct firmware *firmware; | 1108 | const struct firmware *firmware; |
1079 | }; | 1109 | }; |
1080 | 1110 | ||
@@ -1125,6 +1155,7 @@ static inline u32 reg_poll(struct bnx2x *bp, u32 reg, u32 expected, int ms, | |||
1125 | #define LOAD_DIAG 2 | 1155 | #define LOAD_DIAG 2 |
1126 | #define UNLOAD_NORMAL 0 | 1156 | #define UNLOAD_NORMAL 0 |
1127 | #define UNLOAD_CLOSE 1 | 1157 | #define UNLOAD_CLOSE 1 |
1158 | #define UNLOAD_RECOVERY 2 | ||
1128 | 1159 | ||
1129 | 1160 | ||
1130 | /* DMAE command defines */ | 1161 | /* DMAE command defines */ |
@@ -1152,7 +1183,7 @@ static inline u32 reg_poll(struct bnx2x *bp, u32 reg, u32 expected, int ms, | |||
1152 | #define DMAE_CMD_E1HVN_SHIFT DMAE_COMMAND_E1HVN_SHIFT | 1183 | #define DMAE_CMD_E1HVN_SHIFT DMAE_COMMAND_E1HVN_SHIFT |
1153 | 1184 | ||
1154 | #define DMAE_LEN32_RD_MAX 0x80 | 1185 | #define DMAE_LEN32_RD_MAX 0x80 |
1155 | #define DMAE_LEN32_WR_MAX 0x400 | 1186 | #define DMAE_LEN32_WR_MAX(bp) (CHIP_IS_E1(bp) ? 0x400 : 0x2000) |
1156 | 1187 | ||
1157 | #define DMAE_COMP_VAL 0xe0d0d0ae | 1188 | #define DMAE_COMP_VAL 0xe0d0d0ae |
1158 | 1189 | ||
@@ -1294,8 +1325,12 @@ static inline u32 reg_poll(struct bnx2x *bp, u32 reg, u32 expected, int ms, | |||
1294 | AEU_INPUTS_ATTN_BITS_IGU_PARITY_ERROR | \ | 1325 | AEU_INPUTS_ATTN_BITS_IGU_PARITY_ERROR | \ |
1295 | AEU_INPUTS_ATTN_BITS_MISC_PARITY_ERROR) | 1326 | AEU_INPUTS_ATTN_BITS_MISC_PARITY_ERROR) |
1296 | 1327 | ||
1328 | #define HW_PRTY_ASSERT_SET_3 (AEU_INPUTS_ATTN_BITS_MCP_LATCHED_ROM_PARITY | \ | ||
1329 | AEU_INPUTS_ATTN_BITS_MCP_LATCHED_UMP_RX_PARITY | \ | ||
1330 | AEU_INPUTS_ATTN_BITS_MCP_LATCHED_UMP_TX_PARITY | \ | ||
1331 | AEU_INPUTS_ATTN_BITS_MCP_LATCHED_SCPAD_PARITY) | ||
1297 | 1332 | ||
1298 | #define MULTI_FLAGS(bp) \ | 1333 | #define RSS_FLAGS(bp) \ |
1299 | (TSTORM_ETH_FUNCTION_COMMON_CONFIG_RSS_IPV4_CAPABILITY | \ | 1334 | (TSTORM_ETH_FUNCTION_COMMON_CONFIG_RSS_IPV4_CAPABILITY | \ |
1300 | TSTORM_ETH_FUNCTION_COMMON_CONFIG_RSS_IPV4_TCP_CAPABILITY | \ | 1335 | TSTORM_ETH_FUNCTION_COMMON_CONFIG_RSS_IPV4_TCP_CAPABILITY | \ |
1301 | TSTORM_ETH_FUNCTION_COMMON_CONFIG_RSS_IPV6_CAPABILITY | \ | 1336 | TSTORM_ETH_FUNCTION_COMMON_CONFIG_RSS_IPV6_CAPABILITY | \ |
@@ -1333,6 +1368,9 @@ static inline u32 reg_poll(struct bnx2x *bp, u32 reg, u32 expected, int ms, | |||
1333 | #define PXP2_REG_PXP2_INT_STS PXP2_REG_PXP2_INT_STS_0 | 1368 | #define PXP2_REG_PXP2_INT_STS PXP2_REG_PXP2_INT_STS_0 |
1334 | #endif | 1369 | #endif |
1335 | 1370 | ||
1371 | #define BNX2X_VPD_LEN 128 | ||
1372 | #define VENDOR_ID_LEN 4 | ||
1373 | |||
1336 | /* MISC_REG_RESET_REG - this is here for the hsi to work don't touch */ | 1374 | /* MISC_REG_RESET_REG - this is here for the hsi to work don't touch */ |
1337 | 1375 | ||
1338 | #endif /* bnx2x.h */ | 1376 | #endif /* bnx2x.h */ |