diff options
author | Michael Chan <mchan@broadcom.com> | 2008-06-19 19:37:42 -0400 |
---|---|---|
committer | David S. Miller <davem@davemloft.net> | 2008-06-19 19:37:42 -0400 |
commit | 35e9010b22503f42cbf88144ffe1feff90ea3835 (patch) | |
tree | ee2c0e5ae61ee6a7508cce38ed2a79ce52049d38 /drivers/net/bnx2.h | |
parent | 4497b0763cb1afae463f5e144c28b5d806e28b60 (diff) |
bnx2: Put tx ring variables in a separate struct.
In preparation for multi-ring support, tx ring variables are now put
in a separate bnx2_tx_ring_info struct. Multi tx ring will not be
enabled until it is fully supported by the stack. Only 1 tx ring
will be used at the moment.
The functions to allocate/free tx memory and to initialize tx rings
are now modified to handle multiple rings.
Signed-off-by: Michael Chan <mchan@broadcom.com>
Signed-off-by: Benjamin Li <benli@broadcom.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers/net/bnx2.h')
-rw-r--r-- | drivers/net/bnx2.h | 34 |
1 files changed, 18 insertions, 16 deletions
diff --git a/drivers/net/bnx2.h b/drivers/net/bnx2.h index be7ccb5b77da..e4f0fb45bc6d 100644 --- a/drivers/net/bnx2.h +++ b/drivers/net/bnx2.h | |||
@@ -6569,6 +6569,21 @@ struct bnx2_irq { | |||
6569 | char name[16]; | 6569 | char name[16]; |
6570 | }; | 6570 | }; |
6571 | 6571 | ||
6572 | struct bnx2_tx_ring_info { | ||
6573 | u32 tx_prod_bseq; | ||
6574 | u16 tx_prod; | ||
6575 | u32 tx_bidx_addr; | ||
6576 | u32 tx_bseq_addr; | ||
6577 | |||
6578 | struct tx_bd *tx_desc_ring; | ||
6579 | struct sw_bd *tx_buf_ring; | ||
6580 | |||
6581 | u16 tx_cons; | ||
6582 | u16 hw_tx_cons; | ||
6583 | |||
6584 | dma_addr_t tx_desc_mapping; | ||
6585 | }; | ||
6586 | |||
6572 | struct bnx2_napi { | 6587 | struct bnx2_napi { |
6573 | struct napi_struct napi ____cacheline_aligned; | 6588 | struct napi_struct napi ____cacheline_aligned; |
6574 | struct bnx2 *bp; | 6589 | struct bnx2 *bp; |
@@ -6577,9 +6592,6 @@ struct bnx2_napi { | |||
6577 | u32 last_status_idx; | 6592 | u32 last_status_idx; |
6578 | u32 int_num; | 6593 | u32 int_num; |
6579 | 6594 | ||
6580 | u16 tx_cons; | ||
6581 | u16 hw_tx_cons; | ||
6582 | |||
6583 | u32 rx_prod_bseq; | 6595 | u32 rx_prod_bseq; |
6584 | u16 rx_prod; | 6596 | u16 rx_prod; |
6585 | u16 rx_cons; | 6597 | u16 rx_cons; |
@@ -6587,6 +6599,7 @@ struct bnx2_napi { | |||
6587 | u16 rx_pg_prod; | 6599 | u16 rx_pg_prod; |
6588 | u16 rx_pg_cons; | 6600 | u16 rx_pg_cons; |
6589 | 6601 | ||
6602 | struct bnx2_tx_ring_info tx_ring; | ||
6590 | }; | 6603 | }; |
6591 | 6604 | ||
6592 | struct bnx2 { | 6605 | struct bnx2 { |
@@ -6614,14 +6627,6 @@ struct bnx2 { | |||
6614 | BNX2_FLAG_USING_MSIX) | 6627 | BNX2_FLAG_USING_MSIX) |
6615 | #define BNX2_FLAG_JUMBO_BROKEN 0x00000800 | 6628 | #define BNX2_FLAG_JUMBO_BROKEN 0x00000800 |
6616 | 6629 | ||
6617 | /* Put tx producer and consumer fields in separate cache lines. */ | ||
6618 | |||
6619 | u32 tx_prod_bseq __attribute__((aligned(L1_CACHE_BYTES))); | ||
6620 | u16 tx_prod; | ||
6621 | u8 tx_vec; | ||
6622 | u32 tx_bidx_addr; | ||
6623 | u32 tx_bseq_addr; | ||
6624 | |||
6625 | struct bnx2_napi bnx2_napi[BNX2_MAX_MSIX_VEC]; | 6630 | struct bnx2_napi bnx2_napi[BNX2_MAX_MSIX_VEC]; |
6626 | 6631 | ||
6627 | #ifdef BCM_VLAN | 6632 | #ifdef BCM_VLAN |
@@ -6643,8 +6648,6 @@ struct bnx2 { | |||
6643 | struct rx_bd *rx_pg_desc_ring[MAX_RX_PG_RINGS]; | 6648 | struct rx_bd *rx_pg_desc_ring[MAX_RX_PG_RINGS]; |
6644 | 6649 | ||
6645 | /* TX constants */ | 6650 | /* TX constants */ |
6646 | struct tx_bd *tx_desc_ring; | ||
6647 | struct sw_bd *tx_buf_ring; | ||
6648 | int tx_ring_size; | 6651 | int tx_ring_size; |
6649 | u32 tx_wake_thresh; | 6652 | u32 tx_wake_thresh; |
6650 | 6653 | ||
@@ -6722,9 +6725,6 @@ struct bnx2 { | |||
6722 | u16 fw_wr_seq; | 6725 | u16 fw_wr_seq; |
6723 | u16 fw_drv_pulse_wr_seq; | 6726 | u16 fw_drv_pulse_wr_seq; |
6724 | 6727 | ||
6725 | dma_addr_t tx_desc_mapping; | ||
6726 | |||
6727 | |||
6728 | int rx_max_ring; | 6728 | int rx_max_ring; |
6729 | int rx_ring_size; | 6729 | int rx_ring_size; |
6730 | dma_addr_t rx_desc_mapping[MAX_RX_RINGS]; | 6730 | dma_addr_t rx_desc_mapping[MAX_RX_RINGS]; |
@@ -6812,6 +6812,8 @@ struct bnx2 { | |||
6812 | 6812 | ||
6813 | struct bnx2_irq irq_tbl[BNX2_MAX_MSIX_VEC]; | 6813 | struct bnx2_irq irq_tbl[BNX2_MAX_MSIX_VEC]; |
6814 | int irq_nvecs; | 6814 | int irq_nvecs; |
6815 | |||
6816 | u8 num_tx_rings; | ||
6815 | }; | 6817 | }; |
6816 | 6818 | ||
6817 | #define REG_RD(bp, offset) \ | 6819 | #define REG_RD(bp, offset) \ |