diff options
author | James Bottomley <jejb@mulgrave.il.steeleye.com> | 2007-02-10 14:45:43 -0500 |
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committer | James Bottomley <jejb@mulgrave.il.steeleye.com> | 2007-02-10 14:45:43 -0500 |
commit | 81b7bbd1932a04869d4c8635a75222dfc6089f96 (patch) | |
tree | 285ae868a1e3a41fb0dbfe346c28e380949bcb55 /drivers/net/bnx2.h | |
parent | 98051995ab44b993f992946055edc6115351f725 (diff) | |
parent | 66efc5a7e3061c3597ac43a8bb1026488d57e66b (diff) |
Merge branch 'linus'
Conflicts:
drivers/scsi/ipr.c
Signed-off-by: James Bottomley <James.Bottomley@SteelEye.com>
Diffstat (limited to 'drivers/net/bnx2.h')
-rw-r--r-- | drivers/net/bnx2.h | 6 |
1 files changed, 6 insertions, 0 deletions
diff --git a/drivers/net/bnx2.h b/drivers/net/bnx2.h index 13b6f9b11e01..ccbdf81c6599 100644 --- a/drivers/net/bnx2.h +++ b/drivers/net/bnx2.h | |||
@@ -6288,6 +6288,10 @@ struct l2_fhdr { | |||
6288 | 6288 | ||
6289 | #define BCM5708S_TX_ACTL3 0x17 | 6289 | #define BCM5708S_TX_ACTL3 0x17 |
6290 | 6290 | ||
6291 | #define MII_BNX2_DSP_RW_PORT 0x15 | ||
6292 | #define MII_BNX2_DSP_ADDRESS 0x17 | ||
6293 | #define MII_BNX2_DSP_EXPAND_REG 0x0f00 | ||
6294 | |||
6291 | #define MIN_ETHERNET_PACKET_SIZE 60 | 6295 | #define MIN_ETHERNET_PACKET_SIZE 60 |
6292 | #define MAX_ETHERNET_PACKET_SIZE 1514 | 6296 | #define MAX_ETHERNET_PACKET_SIZE 1514 |
6293 | #define MAX_ETHERNET_JUMBO_PACKET_SIZE 9014 | 6297 | #define MAX_ETHERNET_JUMBO_PACKET_SIZE 9014 |
@@ -6489,6 +6493,7 @@ struct bnx2 { | |||
6489 | #define PHY_INT_MODE_MASK_FLAG 0x300 | 6493 | #define PHY_INT_MODE_MASK_FLAG 0x300 |
6490 | #define PHY_INT_MODE_AUTO_POLLING_FLAG 0x100 | 6494 | #define PHY_INT_MODE_AUTO_POLLING_FLAG 0x100 |
6491 | #define PHY_INT_MODE_LINK_READY_FLAG 0x200 | 6495 | #define PHY_INT_MODE_LINK_READY_FLAG 0x200 |
6496 | #define PHY_DIS_EARLY_DAC_FLAG 0x400 | ||
6492 | 6497 | ||
6493 | u32 chip_id; | 6498 | u32 chip_id; |
6494 | /* chip num:16-31, rev:12-15, metal:4-11, bond_id:0-3 */ | 6499 | /* chip num:16-31, rev:12-15, metal:4-11, bond_id:0-3 */ |
@@ -6512,6 +6517,7 @@ struct bnx2 { | |||
6512 | #define CHIP_ID_5708_A0 0x57080000 | 6517 | #define CHIP_ID_5708_A0 0x57080000 |
6513 | #define CHIP_ID_5708_B0 0x57081000 | 6518 | #define CHIP_ID_5708_B0 0x57081000 |
6514 | #define CHIP_ID_5708_B1 0x57081010 | 6519 | #define CHIP_ID_5708_B1 0x57081010 |
6520 | #define CHIP_ID_5709_A0 0x57090000 | ||
6515 | 6521 | ||
6516 | #define CHIP_BOND_ID(bp) (((bp)->chip_id) & 0xf) | 6522 | #define CHIP_BOND_ID(bp) (((bp)->chip_id) & 0xf) |
6517 | 6523 | ||