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authorEddie Wai <waie@broadcom.com>2010-11-24 08:48:54 -0500
committerDavid S. Miller <davem@davemloft.net>2010-11-28 13:47:19 -0500
commita5dac108d57072eec4d6745f32c162524509f2cb (patch)
treee5177d7c181866ecea357ef1a9c0109d7ca39b90 /drivers/net/bnx2.h
parent19eb5cc559f716dc98ce03a5bad6030fdc71e897 (diff)
bnx2: Fix reset bug on 5709
The 5709 chip requires the BNX2_MISC_NEW_CORE_CTL_DMA_ENABLE bit to be cleared and polling for pending DMAs to complete before chip reset. Without this step, we've seen NMIs during repeated resets of the chip. Signed-off-by: Eddie Wai <waie@broadcom.com> Signed-off-by: Michael Chan <mchan@broadcom.com> Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers/net/bnx2.h')
-rw-r--r--drivers/net/bnx2.h2
1 files changed, 2 insertions, 0 deletions
diff --git a/drivers/net/bnx2.h b/drivers/net/bnx2.h
index bf4c3421067d..5488a2e82fe9 100644
--- a/drivers/net/bnx2.h
+++ b/drivers/net/bnx2.h
@@ -461,6 +461,8 @@ struct l2_fhdr {
461#define BNX2_PCICFG_MAILBOX_QUEUE_ADDR 0x00000090 461#define BNX2_PCICFG_MAILBOX_QUEUE_ADDR 0x00000090
462#define BNX2_PCICFG_MAILBOX_QUEUE_DATA 0x00000094 462#define BNX2_PCICFG_MAILBOX_QUEUE_DATA 0x00000094
463 463
464#define BNX2_PCICFG_DEVICE_CONTROL 0x000000b4
465#define BNX2_PCICFG_DEVICE_STATUS_NO_PEND ((1L<<5)<<16)
464 466
465/* 467/*
466 * pci_reg definition 468 * pci_reg definition