diff options
author | Steve French <sfrench@us.ibm.com> | 2005-08-30 14:33:26 -0400 |
---|---|---|
committer | Steve French <sfrench@us.ibm.com> | 2005-08-30 14:33:26 -0400 |
commit | 2016ef789a9ded2e169ad1c028ae3deb5302571f (patch) | |
tree | 601359f15b42d4d9868b4eadfe909a7bef6435c5 /drivers/net/bnx2.h | |
parent | 7f57356b70dda014ef269135942426e4a852023e (diff) | |
parent | 6b39374a27eb4be7e9d82145ae270ba02ea90dc8 (diff) |
Merge with /pub/scm/linux/kernel/git/torvalds/linux-2.6.git
Diffstat (limited to 'drivers/net/bnx2.h')
-rw-r--r-- | drivers/net/bnx2.h | 10 |
1 files changed, 7 insertions, 3 deletions
diff --git a/drivers/net/bnx2.h b/drivers/net/bnx2.h index 8214a2853d0d..9ad3f5740cd8 100644 --- a/drivers/net/bnx2.h +++ b/drivers/net/bnx2.h | |||
@@ -3841,12 +3841,12 @@ struct bnx2 { | |||
3841 | struct status_block *status_blk; | 3841 | struct status_block *status_blk; |
3842 | u32 last_status_idx; | 3842 | u32 last_status_idx; |
3843 | 3843 | ||
3844 | atomic_t tx_avail_bd; | ||
3845 | struct tx_bd *tx_desc_ring; | 3844 | struct tx_bd *tx_desc_ring; |
3846 | struct sw_bd *tx_buf_ring; | 3845 | struct sw_bd *tx_buf_ring; |
3847 | u32 tx_prod_bseq; | 3846 | u32 tx_prod_bseq; |
3848 | u16 tx_prod; | 3847 | u16 tx_prod; |
3849 | u16 tx_cons; | 3848 | u16 tx_cons; |
3849 | int tx_ring_size; | ||
3850 | 3850 | ||
3851 | #ifdef BCM_VLAN | 3851 | #ifdef BCM_VLAN |
3852 | struct vlan_group *vlgrp; | 3852 | struct vlan_group *vlgrp; |
@@ -3872,8 +3872,10 @@ struct bnx2 { | |||
3872 | char *name; | 3872 | char *name; |
3873 | 3873 | ||
3874 | int timer_interval; | 3874 | int timer_interval; |
3875 | int current_interval; | ||
3875 | struct timer_list timer; | 3876 | struct timer_list timer; |
3876 | struct work_struct reset_task; | 3877 | struct work_struct reset_task; |
3878 | int in_reset_task; | ||
3877 | 3879 | ||
3878 | /* Used to synchronize phy accesses. */ | 3880 | /* Used to synchronize phy accesses. */ |
3879 | spinlock_t phy_lock; | 3881 | spinlock_t phy_lock; |
@@ -3927,7 +3929,6 @@ struct bnx2 { | |||
3927 | u16 fw_wr_seq; | 3929 | u16 fw_wr_seq; |
3928 | u16 fw_drv_pulse_wr_seq; | 3930 | u16 fw_drv_pulse_wr_seq; |
3929 | 3931 | ||
3930 | int tx_ring_size; | ||
3931 | dma_addr_t tx_desc_mapping; | 3932 | dma_addr_t tx_desc_mapping; |
3932 | 3933 | ||
3933 | 3934 | ||
@@ -3985,7 +3986,7 @@ struct bnx2 { | |||
3985 | #define PHY_LOOPBACK 2 | 3986 | #define PHY_LOOPBACK 2 |
3986 | 3987 | ||
3987 | u8 serdes_an_pending; | 3988 | u8 serdes_an_pending; |
3988 | #define SERDES_AN_TIMEOUT (2 * HZ) | 3989 | #define SERDES_AN_TIMEOUT (HZ / 3) |
3989 | 3990 | ||
3990 | u8 mac_addr[8]; | 3991 | u8 mac_addr[8]; |
3991 | 3992 | ||
@@ -4171,6 +4172,9 @@ struct fw_info { | |||
4171 | 4172 | ||
4172 | #define BNX2_PORT_HW_CFG_MAC_LOWER 0x00000054 | 4173 | #define BNX2_PORT_HW_CFG_MAC_LOWER 0x00000054 |
4173 | #define BNX2_PORT_HW_CFG_CONFIG 0x00000058 | 4174 | #define BNX2_PORT_HW_CFG_CONFIG 0x00000058 |
4175 | #define BNX2_PORT_HW_CFG_CFG_DFLT_LINK_MASK 0x001f0000 | ||
4176 | #define BNX2_PORT_HW_CFG_CFG_DFLT_LINK_AN 0x00000000 | ||
4177 | #define BNX2_PORT_HW_CFG_CFG_DFLT_LINK_1G 0x00030000 | ||
4174 | 4178 | ||
4175 | #define BNX2_PORT_HW_CFG_IMD_MAC_A_UPPER 0x00000068 | 4179 | #define BNX2_PORT_HW_CFG_IMD_MAC_A_UPPER 0x00000068 |
4176 | #define BNX2_PORT_HW_CFG_IMD_MAC_A_LOWER 0x0000006c | 4180 | #define BNX2_PORT_HW_CFG_IMD_MAC_A_LOWER 0x0000006c |