[BNX2]: Add support for 5709 Serdes.

Add PCI ID and code to support the 5709 Serdes PHY.

Signed-off-by: Michael Chan <mchan@broadcom.com>
Signed-off-by: David S. Miller <davem@davemloft.net>

1 files changed, 36 insertions, 0 deletions

diff --git a/drivers/net/bnx2.h b/drivers/net/bnx2.h
index d4a85d7b5ebe..124bd03cff3e 100644
--- a/drivers/net/bnx2.h
+++ b/drivers/net/bnx2.h
@@ -6296,6 +6296,41 @@ struct l2_fhdr {
 #define MII_BNX2_DSP_ADDRESS                    0x17
 #define MII_BNX2_DSP_EXPAND_REG                  0x0f00
 
+#define MII_BNX2_BLK_ADDR                       0x1f
+#define MII_BNX2_BLK_ADDR_IEEE0                  0x0000
+#define MII_BNX2_BLK_ADDR_GP_STATUS              0x8120
+#define MII_BNX2_GP_TOP_AN_STATUS1                0x1b
+#define MII_BNX2_GP_TOP_AN_SPEED_MSK               0x3f00
+#define MII_BNX2_GP_TOP_AN_SPEED_10                0x0000
+#define MII_BNX2_GP_TOP_AN_SPEED_100               0x0100
+#define MII_BNX2_GP_TOP_AN_SPEED_1G                0x0200
+#define MII_BNX2_GP_TOP_AN_SPEED_2_5G              0x0300
+#define MII_BNX2_GP_TOP_AN_SPEED_1GKV              0x0d00
+#define MII_BNX2_GP_TOP_AN_FD                      0x8
+#define MII_BNX2_BLK_ADDR_SERDES_DIG             0x8300
+#define MII_BNX2_SERDES_DIG_1000XCTL1             0x10
+#define MII_BNX2_SD_1000XCTL1_FIBER                0x01
+#define MII_BNX2_SD_1000XCTL1_AUTODET              0x10
+#define MII_BNX2_SERDES_DIG_MISC1                 0x18
+#define MII_BNX2_SD_MISC1_FORCE_MSK                0xf
+#define MII_BNX2_SD_MISC1_FORCE_2_5G               0x0
+#define MII_BNX2_SD_MISC1_FORCE                    0x10
+#define MII_BNX2_BLK_ADDR_OVER1G                 0x8320
+#define MII_BNX2_OVER1G_UP1                       0x19
+#define MII_BNX2_BLK_ADDR_BAM_NXTPG              0x8350
+#define MII_BNX2_BAM_NXTPG_CTL                    0x10
+#define MII_BNX2_NXTPG_CTL_BAM                     0x1
+#define MII_BNX2_NXTPG_CTL_T2                      0x2
+#define MII_BNX2_BLK_ADDR_CL73_USERB0            0x8370
+#define MII_BNX2_CL73_BAM_CTL1                    0x12
+#define MII_BNX2_CL73_BAM_EN                       0x8000
+#define MII_BNX2_CL73_BAM_STA_MGR_EN               0x4000
+#define MII_BNX2_CL73_BAM_NP_AFT_BP_EN             0x2000
+#define MII_BNX2_BLK_ADDR_AER                    0xffd0
+#define MII_BNX2_AER_AER                          0x1e
+#define MII_BNX2_AER_AER_AN_MMD                    0x3800
+#define MII_BNX2_BLK_ADDR_COMBO_IEEEB0           0xffe0
+
 #define MIN_ETHERNET_PACKET_SIZE        60
 #define MAX_ETHERNET_PACKET_SIZE        1514
 #define MAX_ETHERNET_JUMBO_PACKET_SIZE  9014
@@ -6500,6 +6535,7 @@ struct bnx2 {
 
         u32                     mii_bmcr;
         u32                     mii_bmsr;
+        u32                     mii_bmsr1;
         u32                     mii_adv;
         u32                     mii_lpa;
         u32                     mii_up1;