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authorJeffrey Huang <huangjw@broadcom.com>2011-07-13 13:24:21 -0400
committerDavid S. Miller <davem@davemloft.net>2011-07-14 11:46:08 -0400
commitecdbf6e0d555d353188647d1b2dee9a79db69c68 (patch)
tree054df5f005419fe58d782940eb480662bb843b2d /drivers/net/bnx2.c
parent558e4c758c4c7bf209325f5865189c6558860b2b (diff)
bnx2: Add MCP dump
to help debug issues related to management firmware. Signed-off-by: Jeffrey Huang <huangjw@broadcom.com> Signed-off-by: Michael Chan <mchan@broadcom.com> Reviewed-by: Matt Carlson <mcarlson@broadcom.com> Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers/net/bnx2.c')
-rw-r--r--drivers/net/bnx2.c61
1 files changed, 48 insertions, 13 deletions
diff --git a/drivers/net/bnx2.c b/drivers/net/bnx2.c
index 7915d1404572..d105f1f23391 100644
--- a/drivers/net/bnx2.c
+++ b/drivers/net/bnx2.c
@@ -2443,6 +2443,48 @@ bnx2_set_phy_loopback(struct bnx2 *bp)
2443 return 0; 2443 return 0;
2444} 2444}
2445 2445
2446static void
2447bnx2_dump_mcp_state(struct bnx2 *bp)
2448{
2449 struct net_device *dev = bp->dev;
2450 u32 mcp_p0, mcp_p1;
2451
2452 netdev_err(dev, "<--- start MCP states dump --->\n");
2453 if (CHIP_NUM(bp) == CHIP_NUM_5709) {
2454 mcp_p0 = BNX2_MCP_STATE_P0;
2455 mcp_p1 = BNX2_MCP_STATE_P1;
2456 } else {
2457 mcp_p0 = BNX2_MCP_STATE_P0_5708;
2458 mcp_p1 = BNX2_MCP_STATE_P1_5708;
2459 }
2460 netdev_err(dev, "DEBUG: MCP_STATE_P0[%08x] MCP_STATE_P1[%08x]\n",
2461 bnx2_reg_rd_ind(bp, mcp_p0), bnx2_reg_rd_ind(bp, mcp_p1));
2462 netdev_err(dev, "DEBUG: MCP mode[%08x] state[%08x] evt_mask[%08x]\n",
2463 bnx2_reg_rd_ind(bp, BNX2_MCP_CPU_MODE),
2464 bnx2_reg_rd_ind(bp, BNX2_MCP_CPU_STATE),
2465 bnx2_reg_rd_ind(bp, BNX2_MCP_CPU_EVENT_MASK));
2466 netdev_err(dev, "DEBUG: pc[%08x] pc[%08x] instr[%08x]\n",
2467 bnx2_reg_rd_ind(bp, BNX2_MCP_CPU_PROGRAM_COUNTER),
2468 bnx2_reg_rd_ind(bp, BNX2_MCP_CPU_PROGRAM_COUNTER),
2469 bnx2_reg_rd_ind(bp, BNX2_MCP_CPU_INSTRUCTION));
2470 netdev_err(dev, "DEBUG: shmem states:\n");
2471 netdev_err(dev, "DEBUG: drv_mb[%08x] fw_mb[%08x] link_status[%08x]",
2472 bnx2_shmem_rd(bp, BNX2_DRV_MB),
2473 bnx2_shmem_rd(bp, BNX2_FW_MB),
2474 bnx2_shmem_rd(bp, BNX2_LINK_STATUS));
2475 pr_cont(" drv_pulse_mb[%08x]\n", bnx2_shmem_rd(bp, BNX2_DRV_PULSE_MB));
2476 netdev_err(dev, "DEBUG: dev_info_signature[%08x] reset_type[%08x]",
2477 bnx2_shmem_rd(bp, BNX2_DEV_INFO_SIGNATURE),
2478 bnx2_shmem_rd(bp, BNX2_BC_STATE_RESET_TYPE));
2479 pr_cont(" condition[%08x]\n",
2480 bnx2_shmem_rd(bp, BNX2_BC_STATE_CONDITION));
2481 DP_SHMEM_LINE(bp, 0x3cc);
2482 DP_SHMEM_LINE(bp, 0x3dc);
2483 DP_SHMEM_LINE(bp, 0x3ec);
2484 netdev_err(dev, "DEBUG: 0x3fc[%08x]\n", bnx2_shmem_rd(bp, 0x3fc));
2485 netdev_err(dev, "<--- end MCP states dump --->\n");
2486}
2487
2446static int 2488static int
2447bnx2_fw_sync(struct bnx2 *bp, u32 msg_data, int ack, int silent) 2489bnx2_fw_sync(struct bnx2 *bp, u32 msg_data, int ack, int silent)
2448{ 2490{
@@ -2471,13 +2513,14 @@ bnx2_fw_sync(struct bnx2 *bp, u32 msg_data, int ack, int silent)
2471 2513
2472 /* If we timed out, inform the firmware that this is the case. */ 2514 /* If we timed out, inform the firmware that this is the case. */
2473 if ((val & BNX2_FW_MSG_ACK) != (msg_data & BNX2_DRV_MSG_SEQ)) { 2515 if ((val & BNX2_FW_MSG_ACK) != (msg_data & BNX2_DRV_MSG_SEQ)) {
2474 if (!silent)
2475 pr_err("fw sync timeout, reset code = %x\n", msg_data);
2476
2477 msg_data &= ~BNX2_DRV_MSG_CODE; 2516 msg_data &= ~BNX2_DRV_MSG_CODE;
2478 msg_data |= BNX2_DRV_MSG_CODE_FW_TIMEOUT; 2517 msg_data |= BNX2_DRV_MSG_CODE_FW_TIMEOUT;
2479 2518
2480 bnx2_shmem_wr(bp, BNX2_DRV_MB, msg_data); 2519 bnx2_shmem_wr(bp, BNX2_DRV_MB, msg_data);
2520 if (!silent) {
2521 pr_err("fw sync timeout, reset code = %x\n", msg_data);
2522 bnx2_dump_mcp_state(bp);
2523 }
2481 2524
2482 return -EBUSY; 2525 return -EBUSY;
2483 } 2526 }
@@ -6316,7 +6359,7 @@ static void
6316bnx2_dump_state(struct bnx2 *bp) 6359bnx2_dump_state(struct bnx2 *bp)
6317{ 6360{
6318 struct net_device *dev = bp->dev; 6361 struct net_device *dev = bp->dev;
6319 u32 mcp_p0, mcp_p1, val1, val2; 6362 u32 val1, val2;
6320 6363
6321 pci_read_config_dword(bp->pdev, PCI_COMMAND, &val1); 6364 pci_read_config_dword(bp->pdev, PCI_COMMAND, &val1);
6322 netdev_err(dev, "DEBUG: intr_sem[%x] PCI_CMD[%08x]\n", 6365 netdev_err(dev, "DEBUG: intr_sem[%x] PCI_CMD[%08x]\n",
@@ -6329,15 +6372,6 @@ bnx2_dump_state(struct bnx2 *bp)
6329 REG_RD(bp, BNX2_EMAC_RX_STATUS)); 6372 REG_RD(bp, BNX2_EMAC_RX_STATUS));
6330 netdev_err(dev, "DEBUG: RPM_MGMT_PKT_CTRL[%08x]\n", 6373 netdev_err(dev, "DEBUG: RPM_MGMT_PKT_CTRL[%08x]\n",
6331 REG_RD(bp, BNX2_RPM_MGMT_PKT_CTRL)); 6374 REG_RD(bp, BNX2_RPM_MGMT_PKT_CTRL));
6332 if (CHIP_NUM(bp) == CHIP_NUM_5709) {
6333 mcp_p0 = BNX2_MCP_STATE_P0;
6334 mcp_p1 = BNX2_MCP_STATE_P1;
6335 } else {
6336 mcp_p0 = BNX2_MCP_STATE_P0_5708;
6337 mcp_p1 = BNX2_MCP_STATE_P1_5708;
6338 }
6339 netdev_err(dev, "DEBUG: MCP_STATE_P0[%08x] MCP_STATE_P1[%08x]\n",
6340 bnx2_reg_rd_ind(bp, mcp_p0), bnx2_reg_rd_ind(bp, mcp_p1));
6341 netdev_err(dev, "DEBUG: HC_STATS_INTERRUPT_STATUS[%08x]\n", 6375 netdev_err(dev, "DEBUG: HC_STATS_INTERRUPT_STATUS[%08x]\n",
6342 REG_RD(bp, BNX2_HC_STATS_INTERRUPT_STATUS)); 6376 REG_RD(bp, BNX2_HC_STATS_INTERRUPT_STATUS));
6343 if (bp->flags & BNX2_FLAG_USING_MSIX) 6377 if (bp->flags & BNX2_FLAG_USING_MSIX)
@@ -6351,6 +6385,7 @@ bnx2_tx_timeout(struct net_device *dev)
6351 struct bnx2 *bp = netdev_priv(dev); 6385 struct bnx2 *bp = netdev_priv(dev);
6352 6386
6353 bnx2_dump_state(bp); 6387 bnx2_dump_state(bp);
6388 bnx2_dump_mcp_state(bp);
6354 6389
6355 /* This allows the netif to be shutdown gracefully before resetting */ 6390 /* This allows the netif to be shutdown gracefully before resetting */
6356 schedule_work(&bp->reset_task); 6391 schedule_work(&bp->reset_task);