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authorMichael Chan <mchan@broadcom.com>2007-05-03 16:25:11 -0400
committerDavid S. Miller <davem@davemloft.net>2007-05-03 16:25:11 -0400
commit883e51511815930154c64a2645f4df112aa066fb (patch)
tree262c504287ef72456211bd33a76ec270e2c2a10a /drivers/net/bnx2.c
parent8e6a72c435bf8bdd738ad08a746d697abedacfc0 (diff)
[BNX2]: Print bus information for PCIE devices.
Fix the code to print PCI or PCIE bus information for all devices. Signed-off-by: Michael Chan <mchan@broadcom.com> Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers/net/bnx2.c')
-rw-r--r--drivers/net/bnx2.c136
1 files changed, 86 insertions, 50 deletions
diff --git a/drivers/net/bnx2.c b/drivers/net/bnx2.c
index 97ed4006a345..85760f7eca7f 100644
--- a/drivers/net/bnx2.c
+++ b/drivers/net/bnx2.c
@@ -6040,6 +6040,58 @@ bnx2_get_5709_media(struct bnx2 *bp)
6040 } 6040 }
6041} 6041}
6042 6042
6043static void __devinit
6044bnx2_get_pci_speed(struct bnx2 *bp)
6045{
6046 u32 reg;
6047
6048 reg = REG_RD(bp, BNX2_PCICFG_MISC_STATUS);
6049 if (reg & BNX2_PCICFG_MISC_STATUS_PCIX_DET) {
6050 u32 clkreg;
6051
6052 bp->flags |= PCIX_FLAG;
6053
6054 clkreg = REG_RD(bp, BNX2_PCICFG_PCI_CLOCK_CONTROL_BITS);
6055
6056 clkreg &= BNX2_PCICFG_PCI_CLOCK_CONTROL_BITS_PCI_CLK_SPD_DET;
6057 switch (clkreg) {
6058 case BNX2_PCICFG_PCI_CLOCK_CONTROL_BITS_PCI_CLK_SPD_DET_133MHZ:
6059 bp->bus_speed_mhz = 133;
6060 break;
6061
6062 case BNX2_PCICFG_PCI_CLOCK_CONTROL_BITS_PCI_CLK_SPD_DET_95MHZ:
6063 bp->bus_speed_mhz = 100;
6064 break;
6065
6066 case BNX2_PCICFG_PCI_CLOCK_CONTROL_BITS_PCI_CLK_SPD_DET_66MHZ:
6067 case BNX2_PCICFG_PCI_CLOCK_CONTROL_BITS_PCI_CLK_SPD_DET_80MHZ:
6068 bp->bus_speed_mhz = 66;
6069 break;
6070
6071 case BNX2_PCICFG_PCI_CLOCK_CONTROL_BITS_PCI_CLK_SPD_DET_48MHZ:
6072 case BNX2_PCICFG_PCI_CLOCK_CONTROL_BITS_PCI_CLK_SPD_DET_55MHZ:
6073 bp->bus_speed_mhz = 50;
6074 break;
6075
6076 case BNX2_PCICFG_PCI_CLOCK_CONTROL_BITS_PCI_CLK_SPD_DET_LOW:
6077 case BNX2_PCICFG_PCI_CLOCK_CONTROL_BITS_PCI_CLK_SPD_DET_32MHZ:
6078 case BNX2_PCICFG_PCI_CLOCK_CONTROL_BITS_PCI_CLK_SPD_DET_38MHZ:
6079 bp->bus_speed_mhz = 33;
6080 break;
6081 }
6082 }
6083 else {
6084 if (reg & BNX2_PCICFG_MISC_STATUS_M66EN)
6085 bp->bus_speed_mhz = 66;
6086 else
6087 bp->bus_speed_mhz = 33;
6088 }
6089
6090 if (reg & BNX2_PCICFG_MISC_STATUS_32BIT_DET)
6091 bp->flags |= PCI_32BIT_FLAG;
6092
6093}
6094
6043static int __devinit 6095static int __devinit
6044bnx2_init_board(struct pci_dev *pdev, struct net_device *dev) 6096bnx2_init_board(struct pci_dev *pdev, struct net_device *dev)
6045{ 6097{
@@ -6118,7 +6170,15 @@ bnx2_init_board(struct pci_dev *pdev, struct net_device *dev)
6118 6170
6119 bp->chip_id = REG_RD(bp, BNX2_MISC_ID); 6171 bp->chip_id = REG_RD(bp, BNX2_MISC_ID);
6120 6172
6121 if (CHIP_NUM(bp) != CHIP_NUM_5709) { 6173 if (CHIP_NUM(bp) == CHIP_NUM_5709) {
6174 if (pci_find_capability(pdev, PCI_CAP_ID_EXP) == 0) {
6175 dev_err(&pdev->dev,
6176 "Cannot find PCIE capability, aborting.\n");
6177 rc = -EIO;
6178 goto err_out_unmap;
6179 }
6180 bp->flags |= PCIE_FLAG;
6181 } else {
6122 bp->pcix_cap = pci_find_capability(pdev, PCI_CAP_ID_PCIX); 6182 bp->pcix_cap = pci_find_capability(pdev, PCI_CAP_ID_PCIX);
6123 if (bp->pcix_cap == 0) { 6183 if (bp->pcix_cap == 0) {
6124 dev_err(&pdev->dev, 6184 dev_err(&pdev->dev,
@@ -6153,51 +6213,8 @@ bnx2_init_board(struct pci_dev *pdev, struct net_device *dev)
6153 goto err_out_unmap; 6213 goto err_out_unmap;
6154 } 6214 }
6155 6215
6156 /* Get bus information. */ 6216 if (!(bp->flags & PCIE_FLAG))
6157 reg = REG_RD(bp, BNX2_PCICFG_MISC_STATUS); 6217 bnx2_get_pci_speed(bp);
6158 if (reg & BNX2_PCICFG_MISC_STATUS_PCIX_DET) {
6159 u32 clkreg;
6160
6161 bp->flags |= PCIX_FLAG;
6162
6163 clkreg = REG_RD(bp, BNX2_PCICFG_PCI_CLOCK_CONTROL_BITS);
6164
6165 clkreg &= BNX2_PCICFG_PCI_CLOCK_CONTROL_BITS_PCI_CLK_SPD_DET;
6166 switch (clkreg) {
6167 case BNX2_PCICFG_PCI_CLOCK_CONTROL_BITS_PCI_CLK_SPD_DET_133MHZ:
6168 bp->bus_speed_mhz = 133;
6169 break;
6170
6171 case BNX2_PCICFG_PCI_CLOCK_CONTROL_BITS_PCI_CLK_SPD_DET_95MHZ:
6172 bp->bus_speed_mhz = 100;
6173 break;
6174
6175 case BNX2_PCICFG_PCI_CLOCK_CONTROL_BITS_PCI_CLK_SPD_DET_66MHZ:
6176 case BNX2_PCICFG_PCI_CLOCK_CONTROL_BITS_PCI_CLK_SPD_DET_80MHZ:
6177 bp->bus_speed_mhz = 66;
6178 break;
6179
6180 case BNX2_PCICFG_PCI_CLOCK_CONTROL_BITS_PCI_CLK_SPD_DET_48MHZ:
6181 case BNX2_PCICFG_PCI_CLOCK_CONTROL_BITS_PCI_CLK_SPD_DET_55MHZ:
6182 bp->bus_speed_mhz = 50;
6183 break;
6184
6185 case BNX2_PCICFG_PCI_CLOCK_CONTROL_BITS_PCI_CLK_SPD_DET_LOW:
6186 case BNX2_PCICFG_PCI_CLOCK_CONTROL_BITS_PCI_CLK_SPD_DET_32MHZ:
6187 case BNX2_PCICFG_PCI_CLOCK_CONTROL_BITS_PCI_CLK_SPD_DET_38MHZ:
6188 bp->bus_speed_mhz = 33;
6189 break;
6190 }
6191 }
6192 else {
6193 if (reg & BNX2_PCICFG_MISC_STATUS_M66EN)
6194 bp->bus_speed_mhz = 66;
6195 else
6196 bp->bus_speed_mhz = 33;
6197 }
6198
6199 if (reg & BNX2_PCICFG_MISC_STATUS_32BIT_DET)
6200 bp->flags |= PCI_32BIT_FLAG;
6201 6218
6202 /* 5706A0 may falsely detect SERR and PERR. */ 6219 /* 5706A0 may falsely detect SERR and PERR. */
6203 if (CHIP_ID(bp) == CHIP_ID_5706_A0) { 6220 if (CHIP_ID(bp) == CHIP_ID_5706_A0) {
@@ -6381,6 +6398,26 @@ err_out:
6381 return rc; 6398 return rc;
6382} 6399}
6383 6400
6401static char * __devinit
6402bnx2_bus_string(struct bnx2 *bp, char *str)
6403{
6404 char *s = str;
6405
6406 if (bp->flags & PCIE_FLAG) {
6407 s += sprintf(s, "PCI Express");
6408 } else {
6409 s += sprintf(s, "PCI");
6410 if (bp->flags & PCIX_FLAG)
6411 s += sprintf(s, "-X");
6412 if (bp->flags & PCI_32BIT_FLAG)
6413 s += sprintf(s, " 32-bit");
6414 else
6415 s += sprintf(s, " 64-bit");
6416 s += sprintf(s, " %dMHz", bp->bus_speed_mhz);
6417 }
6418 return str;
6419}
6420
6384static int __devinit 6421static int __devinit
6385bnx2_init_one(struct pci_dev *pdev, const struct pci_device_id *ent) 6422bnx2_init_one(struct pci_dev *pdev, const struct pci_device_id *ent)
6386{ 6423{
@@ -6388,6 +6425,7 @@ bnx2_init_one(struct pci_dev *pdev, const struct pci_device_id *ent)
6388 struct net_device *dev = NULL; 6425 struct net_device *dev = NULL;
6389 struct bnx2 *bp; 6426 struct bnx2 *bp;
6390 int rc, i; 6427 int rc, i;
6428 char str[40];
6391 6429
6392 if (version_printed++ == 0) 6430 if (version_printed++ == 0)
6393 printk(KERN_INFO "%s", version); 6431 printk(KERN_INFO "%s", version);
@@ -6456,15 +6494,13 @@ bnx2_init_one(struct pci_dev *pdev, const struct pci_device_id *ent)
6456 return rc; 6494 return rc;
6457 } 6495 }
6458 6496
6459 printk(KERN_INFO "%s: %s (%c%d) PCI%s %s %dMHz found at mem %lx, " 6497 printk(KERN_INFO "%s: %s (%c%d) %s found at mem %lx, "
6460 "IRQ %d, ", 6498 "IRQ %d, ",
6461 dev->name, 6499 dev->name,
6462 bp->name, 6500 bp->name,
6463 ((CHIP_ID(bp) & 0xf000) >> 12) + 'A', 6501 ((CHIP_ID(bp) & 0xf000) >> 12) + 'A',
6464 ((CHIP_ID(bp) & 0x0ff0) >> 4), 6502 ((CHIP_ID(bp) & 0x0ff0) >> 4),
6465 ((bp->flags & PCIX_FLAG) ? "-X" : ""), 6503 bnx2_bus_string(bp, str),
6466 ((bp->flags & PCI_32BIT_FLAG) ? "32-bit" : "64-bit"),
6467 bp->bus_speed_mhz,
6468 dev->base_addr, 6504 dev->base_addr,
6469 bp->pdev->irq); 6505 bp->pdev->irq);
6470 6506