diff options
author | Michael Chan <mchan@broadcom.com> | 2007-06-05 00:23:06 -0400 |
---|---|---|
committer | David S. Miller <davem@sunset.davemloft.net> | 2007-06-07 16:38:38 -0400 |
commit | 0aa38df7cd5b6c5b89f5146f4a2286434bc4a8f3 (patch) | |
tree | 428a62a17347f87980cdace06fef7b890288d6fa /drivers/net/bnx2.c | |
parent | 641bdcd56c8bb2110a31da846b2752b11a644050 (diff) |
[BNX2]: Enable DMA on 5709.
Add missing code to enable DMA on 5709 A1. The bit is a no-op on A0
and therefore can be set on all 5709 chips.
Signed-off-by: Michael Chan <mchan@broadcom.com>
Acked-by: Jeff Garzik <jeff@garzik.org>
Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers/net/bnx2.c')
-rw-r--r-- | drivers/net/bnx2.c | 5 |
1 files changed, 5 insertions, 0 deletions
diff --git a/drivers/net/bnx2.c b/drivers/net/bnx2.c index 9eba7a2635ad..3b7ca2a455b4 100644 --- a/drivers/net/bnx2.c +++ b/drivers/net/bnx2.c | |||
@@ -3815,6 +3815,11 @@ bnx2_init_chip(struct bnx2 *bp) | |||
3815 | /* Initialize the receive filter. */ | 3815 | /* Initialize the receive filter. */ |
3816 | bnx2_set_rx_mode(bp->dev); | 3816 | bnx2_set_rx_mode(bp->dev); |
3817 | 3817 | ||
3818 | if (CHIP_NUM(bp) == CHIP_NUM_5709) { | ||
3819 | val = REG_RD(bp, BNX2_MISC_NEW_CORE_CTL); | ||
3820 | val |= BNX2_MISC_NEW_CORE_CTL_DMA_ENABLE; | ||
3821 | REG_WR(bp, BNX2_MISC_NEW_CORE_CTL, val); | ||
3822 | } | ||
3818 | rc = bnx2_fw_sync(bp, BNX2_DRV_MSG_DATA_WAIT2 | BNX2_DRV_MSG_CODE_RESET, | 3823 | rc = bnx2_fw_sync(bp, BNX2_DRV_MSG_DATA_WAIT2 | BNX2_DRV_MSG_CODE_RESET, |
3819 | 0); | 3824 | 0); |
3820 | 3825 | ||