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authorAl Viro <viro@ftp.linux.org.uk>2007-12-22 14:44:51 -0500
committerDavid S. Miller <davem@davemloft.net>2008-01-28 18:10:32 -0500
commitb491edd5817f1618f4e06d67638739591a714bdb (patch)
tree2e0aae92f7190b7b3f0de336229eb726b30a3264 /drivers/net/bnx2.c
parentf305f789bb96ee6e35e71f58324b72abb7bd0b13 (diff)
bnx2 annotations
Signed-off-by: Al Viro <viro@zeniv.linux.org.uk> Signed-off-by: Jeff Garzik <jeff@garzik.org>
Diffstat (limited to 'drivers/net/bnx2.c')
-rw-r--r--drivers/net/bnx2.c22
1 files changed, 10 insertions, 12 deletions
diff --git a/drivers/net/bnx2.c b/drivers/net/bnx2.c
index 255197be35c1..34aebc6e7589 100644
--- a/drivers/net/bnx2.c
+++ b/drivers/net/bnx2.c
@@ -3111,7 +3111,7 @@ bnx2_set_rx_mode(struct net_device *dev)
3111} 3111}
3112 3112
3113static void 3113static void
3114load_rv2p_fw(struct bnx2 *bp, u32 *rv2p_code, u32 rv2p_code_len, 3114load_rv2p_fw(struct bnx2 *bp, __le32 *rv2p_code, u32 rv2p_code_len,
3115 u32 rv2p_proc) 3115 u32 rv2p_proc)
3116{ 3116{
3117 int i; 3117 int i;
@@ -3119,9 +3119,9 @@ load_rv2p_fw(struct bnx2 *bp, u32 *rv2p_code, u32 rv2p_code_len,
3119 3119
3120 3120
3121 for (i = 0; i < rv2p_code_len; i += 8) { 3121 for (i = 0; i < rv2p_code_len; i += 8) {
3122 REG_WR(bp, BNX2_RV2P_INSTR_HIGH, cpu_to_le32(*rv2p_code)); 3122 REG_WR(bp, BNX2_RV2P_INSTR_HIGH, le32_to_cpu(*rv2p_code));
3123 rv2p_code++; 3123 rv2p_code++;
3124 REG_WR(bp, BNX2_RV2P_INSTR_LOW, cpu_to_le32(*rv2p_code)); 3124 REG_WR(bp, BNX2_RV2P_INSTR_LOW, le32_to_cpu(*rv2p_code));
3125 rv2p_code++; 3125 rv2p_code++;
3126 3126
3127 if (rv2p_proc == RV2P_PROC1) { 3127 if (rv2p_proc == RV2P_PROC1) {
@@ -3167,7 +3167,7 @@ load_cpu_fw(struct bnx2 *bp, struct cpu_reg *cpu_reg, struct fw_info *fw)
3167 return rc; 3167 return rc;
3168 3168
3169 for (j = 0; j < (fw->text_len / 4); j++, offset += 4) { 3169 for (j = 0; j < (fw->text_len / 4); j++, offset += 4) {
3170 REG_WR_IND(bp, offset, cpu_to_le32(fw->text[j])); 3170 REG_WR_IND(bp, offset, le32_to_cpu(fw->text[j]));
3171 } 3171 }
3172 } 3172 }
3173 3173
@@ -3704,10 +3704,8 @@ bnx2_nvram_read_dword(struct bnx2 *bp, u32 offset, u8 *ret_val, u32 cmd_flags)
3704 3704
3705 val = REG_RD(bp, BNX2_NVM_COMMAND); 3705 val = REG_RD(bp, BNX2_NVM_COMMAND);
3706 if (val & BNX2_NVM_COMMAND_DONE) { 3706 if (val & BNX2_NVM_COMMAND_DONE) {
3707 val = REG_RD(bp, BNX2_NVM_READ); 3707 __be32 v = cpu_to_be32(REG_RD(bp, BNX2_NVM_READ));
3708 3708 memcpy(ret_val, &v, 4);
3709 val = be32_to_cpu(val);
3710 memcpy(ret_val, &val, 4);
3711 break; 3709 break;
3712 } 3710 }
3713 } 3711 }
@@ -3721,7 +3719,8 @@ bnx2_nvram_read_dword(struct bnx2 *bp, u32 offset, u8 *ret_val, u32 cmd_flags)
3721static int 3719static int
3722bnx2_nvram_write_dword(struct bnx2 *bp, u32 offset, u8 *val, u32 cmd_flags) 3720bnx2_nvram_write_dword(struct bnx2 *bp, u32 offset, u8 *val, u32 cmd_flags)
3723{ 3721{
3724 u32 cmd, val32; 3722 u32 cmd;
3723 __be32 val32;
3725 int j; 3724 int j;
3726 3725
3727 /* Build the command word. */ 3726 /* Build the command word. */
@@ -3738,10 +3737,9 @@ bnx2_nvram_write_dword(struct bnx2 *bp, u32 offset, u8 *val, u32 cmd_flags)
3738 REG_WR(bp, BNX2_NVM_COMMAND, BNX2_NVM_COMMAND_DONE); 3737 REG_WR(bp, BNX2_NVM_COMMAND, BNX2_NVM_COMMAND_DONE);
3739 3738
3740 memcpy(&val32, val, 4); 3739 memcpy(&val32, val, 4);
3741 val32 = cpu_to_be32(val32);
3742 3740
3743 /* Write the data. */ 3741 /* Write the data. */
3744 REG_WR(bp, BNX2_NVM_WRITE, val32); 3742 REG_WR(bp, BNX2_NVM_WRITE, be32_to_cpu(val32));
3745 3743
3746 /* Address of the NVRAM to write to. */ 3744 /* Address of the NVRAM to write to. */
3747 REG_WR(bp, BNX2_NVM_ADDR, offset & BNX2_NVM_ADDR_NVM_ADDR_VALUE); 3745 REG_WR(bp, BNX2_NVM_ADDR, offset & BNX2_NVM_ADDR_NVM_ADDR_VALUE);
@@ -5217,7 +5215,7 @@ bnx2_test_loopback(struct bnx2 *bp)
5217static int 5215static int
5218bnx2_test_nvram(struct bnx2 *bp) 5216bnx2_test_nvram(struct bnx2 *bp)
5219{ 5217{
5220 u32 buf[NVRAM_SIZE / 4]; 5218 __be32 buf[NVRAM_SIZE / 4];
5221 u8 *data = (u8 *) buf; 5219 u8 *data = (u8 *) buf;
5222 int rc = 0; 5220 int rc = 0;
5223 u32 magic, csum; 5221 u32 magic, csum;