be2net: adding support for Lancer family of CNAs

Key changes are:
- EQ ids are not assigned consecutively in Lancer. So, fix mapping of MSIx
  vector to EQ-id.
- BAR mapping and some req locations different for Lancer.
- TCP,UDP,IP checksum fields must be compulsorily set in TX wrb for TSO in
  Lancer.
- CEV_IST reg not present in Lancer; so, peek into event queue to check for
  new entries
- cq_create and mcc_create cmd interface is different for Lancer; handle
  accordingly

Signed-off-by: Padmanabh Ratnakar <padmanabh.ratnakar@emulex.com>
Signed-off-by: Sathya Perla <sathya.perla@emulex.com>
Signed-off-by: David S. Miller <davem@davemloft.net>

1 files changed, 73 insertions, 23 deletions

diff --git a/drivers/net/benet/be_cmds.c b/drivers/net/benet/be_cmds.c
index 36eca1ce75d4..3865b2bc65e6 100644
--- a/drivers/net/benet/be_cmds.c
+++ b/drivers/net/benet/be_cmds.c
@@ -323,7 +323,12 @@ static int be_mbox_notify_wait(struct be_adapter *adapter)
 
 static int be_POST_stage_get(struct be_adapter *adapter, u16 *stage)
 {
-        u32 sem = ioread32(adapter->csr + MPU_EP_SEMAPHORE_OFFSET);
+        u32 sem;
+
+        if (lancer_chip(adapter))
+                sem  = ioread32(adapter->db + MPU_EP_SEMAPHORE_IF_TYPE2_OFFSET);
+        else
+                sem  = ioread32(adapter->csr + MPU_EP_SEMAPHORE_OFFSET);
 
         *stage = sem & EP_SEMAPHORE_POST_STAGE_MASK;
         if ((sem >> EP_SEMAPHORE_POST_ERR_SHIFT) & EP_SEMAPHORE_POST_ERR_MASK)
@@ -465,14 +470,25 @@ int be_cmd_fw_init(struct be_adapter *adapter)
         spin_lock(&adapter->mbox_lock);
 
         wrb = (u8 *)wrb_from_mbox(adapter);
-        *wrb++ = 0xFF;
-        *wrb++ = 0x12;
-        *wrb++ = 0x34;
-        *wrb++ = 0xFF;
-        *wrb++ = 0xFF;
-        *wrb++ = 0x56;
-        *wrb++ = 0x78;
-        *wrb = 0xFF;
+        if (lancer_chip(adapter)) {
+                *wrb++ = 0xFF;
+                *wrb++ = 0x34;
+                *wrb++ = 0x12;
+                *wrb++ = 0xFF;
+                *wrb++ = 0xFF;
+                *wrb++ = 0x78;
+                *wrb++ = 0x56;
+                *wrb = 0xFF;
+        } else {
+                *wrb++ = 0xFF;
+                *wrb++ = 0x12;
+                *wrb++ = 0x34;
+                *wrb++ = 0xFF;
+                *wrb++ = 0xFF;
+                *wrb++ = 0x56;
+                *wrb++ = 0x78;
+                *wrb = 0xFF;
+        }
 
         status = be_mbox_notify_wait(adapter);
 
@@ -680,16 +696,36 @@ int be_cmd_cq_create(struct be_adapter *adapter,
                 OPCODE_COMMON_CQ_CREATE, sizeof(*req));
 
         req->num_pages =  cpu_to_le16(PAGES_4K_SPANNED(q_mem->va, q_mem->size));
+        if (lancer_chip(adapter)) {
+                req->hdr.version = 1;
+                req->page_size = 1; /* 1 for 4K */
+                AMAP_SET_BITS(struct amap_cq_context_lancer, coalescwm, ctxt,
+                                                                coalesce_wm);
+                AMAP_SET_BITS(struct amap_cq_context_lancer, nodelay, ctxt,
+                                                                no_delay);
+                AMAP_SET_BITS(struct amap_cq_context_lancer, count, ctxt,
+                                                __ilog2_u32(cq->len/256));
+                AMAP_SET_BITS(struct amap_cq_context_lancer, valid, ctxt, 1);
+                AMAP_SET_BITS(struct amap_cq_context_lancer, eventable,
+                                                                ctxt, 1);
+                AMAP_SET_BITS(struct amap_cq_context_lancer, eqid,
+                                                                ctxt, eq->id);
+                AMAP_SET_BITS(struct amap_cq_context_lancer, armed, ctxt, 1);
+        } else {
+                AMAP_SET_BITS(struct amap_cq_context_be, coalescwm, ctxt,
+                                                                coalesce_wm);
+                AMAP_SET_BITS(struct amap_cq_context_be, nodelay,
+                                                                ctxt, no_delay);
+                AMAP_SET_BITS(struct amap_cq_context_be, count, ctxt,
+                                                __ilog2_u32(cq->len/256));
+                AMAP_SET_BITS(struct amap_cq_context_be, valid, ctxt, 1);
+                AMAP_SET_BITS(struct amap_cq_context_be, solevent,
+                                                                ctxt, sol_evts);
+                AMAP_SET_BITS(struct amap_cq_context_be, eventable, ctxt, 1);
+                AMAP_SET_BITS(struct amap_cq_context_be, eqid, ctxt, eq->id);
+                AMAP_SET_BITS(struct amap_cq_context_be, armed, ctxt, 1);
+        }
 
-        AMAP_SET_BITS(struct amap_cq_context, coalescwm, ctxt, coalesce_wm);
-        AMAP_SET_BITS(struct amap_cq_context, nodelay, ctxt, no_delay);
-        AMAP_SET_BITS(struct amap_cq_context, count, ctxt,
-                        __ilog2_u32(cq->len/256));
-        AMAP_SET_BITS(struct amap_cq_context, valid, ctxt, 1);
-        AMAP_SET_BITS(struct amap_cq_context, solevent, ctxt, sol_evts);
-        AMAP_SET_BITS(struct amap_cq_context, eventable, ctxt, 1);
-        AMAP_SET_BITS(struct amap_cq_context, eqid, ctxt, eq->id);
-        AMAP_SET_BITS(struct amap_cq_context, armed, ctxt, 1);
         be_dws_cpu_to_le(ctxt, sizeof(req->context));
 
         be_cmd_page_addrs_prepare(req->pages, ARRAY_SIZE(req->pages), q_mem);
@@ -737,13 +773,27 @@ int be_cmd_mccq_create(struct be_adapter *adapter,
                         OPCODE_COMMON_MCC_CREATE_EXT, sizeof(*req));
 
         req->num_pages = cpu_to_le16(PAGES_4K_SPANNED(q_mem->va, q_mem->size));
+        if (lancer_chip(adapter)) {
+                req->hdr.version = 1;
+                req->cq_id = cpu_to_le16(cq->id);
+
+                AMAP_SET_BITS(struct amap_mcc_context_lancer, ring_size, ctxt,
+                                                be_encoded_q_len(mccq->len));
+                AMAP_SET_BITS(struct amap_mcc_context_lancer, valid, ctxt, 1);
+                AMAP_SET_BITS(struct amap_mcc_context_lancer, async_cq_id,
+                                                                ctxt, cq->id);
+                AMAP_SET_BITS(struct amap_mcc_context_lancer, async_cq_valid,
+                                                                 ctxt, 1);
+
+        } else {
+                AMAP_SET_BITS(struct amap_mcc_context_be, valid, ctxt, 1);
+                AMAP_SET_BITS(struct amap_mcc_context_be, ring_size, ctxt,
+                                                be_encoded_q_len(mccq->len));
+                AMAP_SET_BITS(struct amap_mcc_context_be, cq_id, ctxt, cq->id);
+        }
 
-        AMAP_SET_BITS(struct amap_mcc_context, valid, ctxt, 1);
-        AMAP_SET_BITS(struct amap_mcc_context, ring_size, ctxt,
-                be_encoded_q_len(mccq->len));
-        AMAP_SET_BITS(struct amap_mcc_context, cq_id, ctxt, cq->id);
         /* Subscribe to Link State and Group 5 Events(bits 1 and 5 set) */
-        req->async_event_bitmap[0] |= 0x00000022;
+        req->async_event_bitmap[0] = cpu_to_le32(0x00000022);
         be_dws_cpu_to_le(ctxt, sizeof(req->context));
 
         be_cmd_page_addrs_prepare(req->pages, ARRAY_SIZE(req->pages), q_mem);