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authorSarveshwar Bandi <sarveshwarb@serverengines.com>2010-05-25 19:16:32 -0400
committerDavid S. Miller <davem@davemloft.net>2010-05-25 19:16:32 -0400
commitdd131e76e562fa0c6f9dd53130e8d08d39a0b62c (patch)
treee53896ebd88874385459f1c60e19156f96c462d2 /drivers/net/benet/be_cmds.c
parent563b04671017ea00ba563ebeebdc36bce79b1b60 (diff)
be2net: Bug fix to avoid disabling bottom half during firmware upgrade.
Certain firmware commands/operations to upgrade firmware could take several seconds to complete. The code presently disables bottom half during these operations which could lead to unpredictable behaviour in certain cases. This patch now does all firmware upgrade operations asynchronously using a completion variable. Signed-off-by: Sarveshwar Bandi <sarveshwarb@serverengines.com> Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers/net/benet/be_cmds.c')
-rw-r--r--drivers/net/benet/be_cmds.c19
1 files changed, 17 insertions, 2 deletions
diff --git a/drivers/net/benet/be_cmds.c b/drivers/net/benet/be_cmds.c
index e79bf8b9af3b..c911bfb55b19 100644
--- a/drivers/net/benet/be_cmds.c
+++ b/drivers/net/benet/be_cmds.c
@@ -59,6 +59,13 @@ static int be_mcc_compl_process(struct be_adapter *adapter,
59 59
60 compl_status = (compl->status >> CQE_STATUS_COMPL_SHIFT) & 60 compl_status = (compl->status >> CQE_STATUS_COMPL_SHIFT) &
61 CQE_STATUS_COMPL_MASK; 61 CQE_STATUS_COMPL_MASK;
62
63 if ((compl->tag0 == OPCODE_COMMON_WRITE_FLASHROM) &&
64 (compl->tag1 == CMD_SUBSYSTEM_COMMON)) {
65 adapter->flash_status = compl_status;
66 complete(&adapter->flash_compl);
67 }
68
62 if (compl_status == MCC_STATUS_SUCCESS) { 69 if (compl_status == MCC_STATUS_SUCCESS) {
63 if (compl->tag0 == OPCODE_ETH_GET_STATISTICS) { 70 if (compl->tag0 == OPCODE_ETH_GET_STATISTICS) {
64 struct be_cmd_resp_get_stats *resp = 71 struct be_cmd_resp_get_stats *resp =
@@ -1417,6 +1424,7 @@ int be_cmd_write_flashrom(struct be_adapter *adapter, struct be_dma_mem *cmd,
1417 int status; 1424 int status;
1418 1425
1419 spin_lock_bh(&adapter->mcc_lock); 1426 spin_lock_bh(&adapter->mcc_lock);
1427 adapter->flash_status = 0;
1420 1428
1421 wrb = wrb_from_mccq(adapter); 1429 wrb = wrb_from_mccq(adapter);
1422 if (!wrb) { 1430 if (!wrb) {
@@ -1428,6 +1436,7 @@ int be_cmd_write_flashrom(struct be_adapter *adapter, struct be_dma_mem *cmd,
1428 1436
1429 be_wrb_hdr_prepare(wrb, cmd->size, false, 1, 1437 be_wrb_hdr_prepare(wrb, cmd->size, false, 1,
1430 OPCODE_COMMON_WRITE_FLASHROM); 1438 OPCODE_COMMON_WRITE_FLASHROM);
1439 wrb->tag1 = CMD_SUBSYSTEM_COMMON;
1431 1440
1432 be_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 1441 be_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON,
1433 OPCODE_COMMON_WRITE_FLASHROM, cmd->size); 1442 OPCODE_COMMON_WRITE_FLASHROM, cmd->size);
@@ -1439,10 +1448,16 @@ int be_cmd_write_flashrom(struct be_adapter *adapter, struct be_dma_mem *cmd,
1439 req->params.op_code = cpu_to_le32(flash_opcode); 1448 req->params.op_code = cpu_to_le32(flash_opcode);
1440 req->params.data_buf_size = cpu_to_le32(buf_size); 1449 req->params.data_buf_size = cpu_to_le32(buf_size);
1441 1450
1442 status = be_mcc_notify_wait(adapter); 1451 be_mcc_notify(adapter);
1452 spin_unlock_bh(&adapter->mcc_lock);
1453
1454 if (!wait_for_completion_timeout(&adapter->flash_compl,
1455 msecs_to_jiffies(12000)))
1456 status = -1;
1457 else
1458 status = adapter->flash_status;
1443 1459
1444err: 1460err:
1445 spin_unlock_bh(&adapter->mcc_lock);
1446 return status; 1461 return status;
1447} 1462}
1448 1463