diff options
author | Sathya Perla <sathyap@serverengines.com> | 2009-09-17 13:30:13 -0400 |
---|---|---|
committer | David S. Miller <davem@davemloft.net> | 2009-09-17 13:30:13 -0400 |
commit | b31c50a7f9e93a61d14740dedcbbf2c376998bc7 (patch) | |
tree | 5bdeef5b697e83c0000374d34967fbe70ef2a70d /drivers/net/benet/be_cmds.c | |
parent | 03f18991614cba1fa5be5dcd1a79b0e30ac44c50 (diff) |
be2net: fix some cmds to use mccq instead of mbox
All cmds issued to BE after the creation of mccq must now use the mcc-q
(and not mbox) to avoid a hw issue that results in mbox poll timeout.
Signed-off-by: Sathya Perla <sathyap@serverengines.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers/net/benet/be_cmds.c')
-rw-r--r-- | drivers/net/benet/be_cmds.c | 412 |
1 files changed, 246 insertions, 166 deletions
diff --git a/drivers/net/benet/be_cmds.c b/drivers/net/benet/be_cmds.c index 1db092498309..3dd76c4170bf 100644 --- a/drivers/net/benet/be_cmds.c +++ b/drivers/net/benet/be_cmds.c | |||
@@ -59,15 +59,22 @@ static int be_mcc_compl_process(struct be_adapter *adapter, | |||
59 | 59 | ||
60 | compl_status = (compl->status >> CQE_STATUS_COMPL_SHIFT) & | 60 | compl_status = (compl->status >> CQE_STATUS_COMPL_SHIFT) & |
61 | CQE_STATUS_COMPL_MASK; | 61 | CQE_STATUS_COMPL_MASK; |
62 | if (compl_status != MCC_STATUS_SUCCESS) { | 62 | if (compl_status == MCC_STATUS_SUCCESS) { |
63 | if (compl->tag0 == OPCODE_ETH_GET_STATISTICS) { | ||
64 | struct be_cmd_resp_get_stats *resp = | ||
65 | adapter->stats.cmd.va; | ||
66 | be_dws_le_to_cpu(&resp->hw_stats, | ||
67 | sizeof(resp->hw_stats)); | ||
68 | netdev_stats_update(adapter); | ||
69 | } | ||
70 | } else if (compl_status != MCC_STATUS_NOT_SUPPORTED) { | ||
63 | extd_status = (compl->status >> CQE_STATUS_EXTD_SHIFT) & | 71 | extd_status = (compl->status >> CQE_STATUS_EXTD_SHIFT) & |
64 | CQE_STATUS_EXTD_MASK; | 72 | CQE_STATUS_EXTD_MASK; |
65 | dev_warn(&adapter->pdev->dev, | 73 | dev_warn(&adapter->pdev->dev, |
66 | "Error in cmd completion: status(compl/extd)=%d/%d\n", | 74 | "Error in cmd completion: status(compl/extd)=%d/%d\n", |
67 | compl_status, extd_status); | 75 | compl_status, extd_status); |
68 | return -1; | ||
69 | } | 76 | } |
70 | return 0; | 77 | return compl_status; |
71 | } | 78 | } |
72 | 79 | ||
73 | /* Link state evt is a string of bytes; no need for endian swapping */ | 80 | /* Link state evt is a string of bytes; no need for endian swapping */ |
@@ -97,10 +104,10 @@ static struct be_mcc_compl *be_mcc_compl_get(struct be_adapter *adapter) | |||
97 | return NULL; | 104 | return NULL; |
98 | } | 105 | } |
99 | 106 | ||
100 | void be_process_mcc(struct be_adapter *adapter) | 107 | int be_process_mcc(struct be_adapter *adapter) |
101 | { | 108 | { |
102 | struct be_mcc_compl *compl; | 109 | struct be_mcc_compl *compl; |
103 | int num = 0; | 110 | int num = 0, status = 0; |
104 | 111 | ||
105 | spin_lock_bh(&adapter->mcc_cq_lock); | 112 | spin_lock_bh(&adapter->mcc_cq_lock); |
106 | while ((compl = be_mcc_compl_get(adapter))) { | 113 | while ((compl = be_mcc_compl_get(adapter))) { |
@@ -111,38 +118,47 @@ void be_process_mcc(struct be_adapter *adapter) | |||
111 | /* Interpret compl as a async link evt */ | 118 | /* Interpret compl as a async link evt */ |
112 | be_async_link_state_process(adapter, | 119 | be_async_link_state_process(adapter, |
113 | (struct be_async_event_link_state *) compl); | 120 | (struct be_async_event_link_state *) compl); |
114 | } else { | 121 | } else if (compl->flags & CQE_FLAGS_COMPLETED_MASK) { |
115 | be_mcc_compl_process(adapter, compl); | 122 | status = be_mcc_compl_process(adapter, compl); |
116 | atomic_dec(&adapter->mcc_obj.q.used); | 123 | atomic_dec(&adapter->mcc_obj.q.used); |
117 | } | 124 | } |
118 | be_mcc_compl_use(compl); | 125 | be_mcc_compl_use(compl); |
119 | num++; | 126 | num++; |
120 | } | 127 | } |
128 | |||
121 | if (num) | 129 | if (num) |
122 | be_cq_notify(adapter, adapter->mcc_obj.cq.id, true, num); | 130 | be_cq_notify(adapter, adapter->mcc_obj.cq.id, true, num); |
131 | |||
123 | spin_unlock_bh(&adapter->mcc_cq_lock); | 132 | spin_unlock_bh(&adapter->mcc_cq_lock); |
133 | return status; | ||
124 | } | 134 | } |
125 | 135 | ||
126 | /* Wait till no more pending mcc requests are present */ | 136 | /* Wait till no more pending mcc requests are present */ |
127 | static void be_mcc_wait_compl(struct be_adapter *adapter) | 137 | static int be_mcc_wait_compl(struct be_adapter *adapter) |
128 | { | 138 | { |
129 | #define mcc_timeout 50000 /* 5s timeout */ | 139 | #define mcc_timeout 120000 /* 12s timeout */ |
130 | int i; | 140 | int i, status; |
131 | for (i = 0; i < mcc_timeout; i++) { | 141 | for (i = 0; i < mcc_timeout; i++) { |
132 | be_process_mcc(adapter); | 142 | status = be_process_mcc(adapter); |
143 | if (status) | ||
144 | return status; | ||
145 | |||
133 | if (atomic_read(&adapter->mcc_obj.q.used) == 0) | 146 | if (atomic_read(&adapter->mcc_obj.q.used) == 0) |
134 | break; | 147 | break; |
135 | udelay(100); | 148 | udelay(100); |
136 | } | 149 | } |
137 | if (i == mcc_timeout) | 150 | if (i == mcc_timeout) { |
138 | dev_err(&adapter->pdev->dev, "mccq poll timed out\n"); | 151 | dev_err(&adapter->pdev->dev, "mccq poll timed out\n"); |
152 | return -1; | ||
153 | } | ||
154 | return 0; | ||
139 | } | 155 | } |
140 | 156 | ||
141 | /* Notify MCC requests and wait for completion */ | 157 | /* Notify MCC requests and wait for completion */ |
142 | static void be_mcc_notify_wait(struct be_adapter *adapter) | 158 | static int be_mcc_notify_wait(struct be_adapter *adapter) |
143 | { | 159 | { |
144 | be_mcc_notify(adapter); | 160 | be_mcc_notify(adapter); |
145 | be_mcc_wait_compl(adapter); | 161 | return be_mcc_wait_compl(adapter); |
146 | } | 162 | } |
147 | 163 | ||
148 | static int be_mbox_db_ready_wait(struct be_adapter *adapter, void __iomem *db) | 164 | static int be_mbox_db_ready_wait(struct be_adapter *adapter, void __iomem *db) |
@@ -173,7 +189,7 @@ static int be_mbox_db_ready_wait(struct be_adapter *adapter, void __iomem *db) | |||
173 | * Insert the mailbox address into the doorbell in two steps | 189 | * Insert the mailbox address into the doorbell in two steps |
174 | * Polls on the mbox doorbell till a command completion (or a timeout) occurs | 190 | * Polls on the mbox doorbell till a command completion (or a timeout) occurs |
175 | */ | 191 | */ |
176 | static int be_mbox_notify(struct be_adapter *adapter) | 192 | static int be_mbox_notify_wait(struct be_adapter *adapter) |
177 | { | 193 | { |
178 | int status; | 194 | int status; |
179 | u32 val = 0; | 195 | u32 val = 0; |
@@ -182,8 +198,6 @@ static int be_mbox_notify(struct be_adapter *adapter) | |||
182 | struct be_mcc_mailbox *mbox = mbox_mem->va; | 198 | struct be_mcc_mailbox *mbox = mbox_mem->va; |
183 | struct be_mcc_compl *compl = &mbox->compl; | 199 | struct be_mcc_compl *compl = &mbox->compl; |
184 | 200 | ||
185 | memset(compl, 0, sizeof(*compl)); | ||
186 | |||
187 | val |= MPU_MAILBOX_DB_HI_MASK; | 201 | val |= MPU_MAILBOX_DB_HI_MASK; |
188 | /* at bits 2 - 31 place mbox dma addr msb bits 34 - 63 */ | 202 | /* at bits 2 - 31 place mbox dma addr msb bits 34 - 63 */ |
189 | val |= (upper_32_bits(mbox_mem->dma) >> 2) << 2; | 203 | val |= (upper_32_bits(mbox_mem->dma) >> 2) << 2; |
@@ -310,34 +324,40 @@ static u32 eq_delay_to_mult(u32 usec_delay) | |||
310 | return multiplier; | 324 | return multiplier; |
311 | } | 325 | } |
312 | 326 | ||
313 | static inline struct be_mcc_wrb *wrb_from_mbox(struct be_dma_mem *mbox_mem) | 327 | static inline struct be_mcc_wrb *wrb_from_mbox(struct be_adapter *adapter) |
314 | { | 328 | { |
315 | return &((struct be_mcc_mailbox *)(mbox_mem->va))->wrb; | 329 | struct be_dma_mem *mbox_mem = &adapter->mbox_mem; |
330 | struct be_mcc_wrb *wrb | ||
331 | = &((struct be_mcc_mailbox *)(mbox_mem->va))->wrb; | ||
332 | memset(wrb, 0, sizeof(*wrb)); | ||
333 | return wrb; | ||
316 | } | 334 | } |
317 | 335 | ||
318 | static inline struct be_mcc_wrb *wrb_from_mcc(struct be_queue_info *mccq) | 336 | static struct be_mcc_wrb *wrb_from_mccq(struct be_adapter *adapter) |
319 | { | 337 | { |
320 | struct be_mcc_wrb *wrb = NULL; | 338 | struct be_queue_info *mccq = &adapter->mcc_obj.q; |
321 | if (atomic_read(&mccq->used) < mccq->len) { | 339 | struct be_mcc_wrb *wrb; |
322 | wrb = queue_head_node(mccq); | 340 | |
323 | queue_head_inc(mccq); | 341 | BUG_ON(atomic_read(&mccq->used) >= mccq->len); |
324 | atomic_inc(&mccq->used); | 342 | wrb = queue_head_node(mccq); |
325 | memset(wrb, 0, sizeof(*wrb)); | 343 | queue_head_inc(mccq); |
326 | } | 344 | atomic_inc(&mccq->used); |
345 | memset(wrb, 0, sizeof(*wrb)); | ||
327 | return wrb; | 346 | return wrb; |
328 | } | 347 | } |
329 | 348 | ||
330 | int be_cmd_eq_create(struct be_adapter *adapter, | 349 | int be_cmd_eq_create(struct be_adapter *adapter, |
331 | struct be_queue_info *eq, int eq_delay) | 350 | struct be_queue_info *eq, int eq_delay) |
332 | { | 351 | { |
333 | struct be_mcc_wrb *wrb = wrb_from_mbox(&adapter->mbox_mem); | 352 | struct be_mcc_wrb *wrb; |
334 | struct be_cmd_req_eq_create *req = embedded_payload(wrb); | 353 | struct be_cmd_req_eq_create *req; |
335 | struct be_cmd_resp_eq_create *resp = embedded_payload(wrb); | ||
336 | struct be_dma_mem *q_mem = &eq->dma_mem; | 354 | struct be_dma_mem *q_mem = &eq->dma_mem; |
337 | int status; | 355 | int status; |
338 | 356 | ||
339 | spin_lock(&adapter->mbox_lock); | 357 | spin_lock(&adapter->mbox_lock); |
340 | memset(wrb, 0, sizeof(*wrb)); | 358 | |
359 | wrb = wrb_from_mbox(adapter); | ||
360 | req = embedded_payload(wrb); | ||
341 | 361 | ||
342 | be_wrb_hdr_prepare(wrb, sizeof(*req), true, 0); | 362 | be_wrb_hdr_prepare(wrb, sizeof(*req), true, 0); |
343 | 363 | ||
@@ -359,25 +379,29 @@ int be_cmd_eq_create(struct be_adapter *adapter, | |||
359 | 379 | ||
360 | be_cmd_page_addrs_prepare(req->pages, ARRAY_SIZE(req->pages), q_mem); | 380 | be_cmd_page_addrs_prepare(req->pages, ARRAY_SIZE(req->pages), q_mem); |
361 | 381 | ||
362 | status = be_mbox_notify(adapter); | 382 | status = be_mbox_notify_wait(adapter); |
363 | if (!status) { | 383 | if (!status) { |
384 | struct be_cmd_resp_eq_create *resp = embedded_payload(wrb); | ||
364 | eq->id = le16_to_cpu(resp->eq_id); | 385 | eq->id = le16_to_cpu(resp->eq_id); |
365 | eq->created = true; | 386 | eq->created = true; |
366 | } | 387 | } |
388 | |||
367 | spin_unlock(&adapter->mbox_lock); | 389 | spin_unlock(&adapter->mbox_lock); |
368 | return status; | 390 | return status; |
369 | } | 391 | } |
370 | 392 | ||
393 | /* Uses mbox */ | ||
371 | int be_cmd_mac_addr_query(struct be_adapter *adapter, u8 *mac_addr, | 394 | int be_cmd_mac_addr_query(struct be_adapter *adapter, u8 *mac_addr, |
372 | u8 type, bool permanent, u32 if_handle) | 395 | u8 type, bool permanent, u32 if_handle) |
373 | { | 396 | { |
374 | struct be_mcc_wrb *wrb = wrb_from_mbox(&adapter->mbox_mem); | 397 | struct be_mcc_wrb *wrb; |
375 | struct be_cmd_req_mac_query *req = embedded_payload(wrb); | 398 | struct be_cmd_req_mac_query *req; |
376 | struct be_cmd_resp_mac_query *resp = embedded_payload(wrb); | ||
377 | int status; | 399 | int status; |
378 | 400 | ||
379 | spin_lock(&adapter->mbox_lock); | 401 | spin_lock(&adapter->mbox_lock); |
380 | memset(wrb, 0, sizeof(*wrb)); | 402 | |
403 | wrb = wrb_from_mbox(adapter); | ||
404 | req = embedded_payload(wrb); | ||
381 | 405 | ||
382 | be_wrb_hdr_prepare(wrb, sizeof(*req), true, 0); | 406 | be_wrb_hdr_prepare(wrb, sizeof(*req), true, 0); |
383 | 407 | ||
@@ -388,27 +412,32 @@ int be_cmd_mac_addr_query(struct be_adapter *adapter, u8 *mac_addr, | |||
388 | if (permanent) { | 412 | if (permanent) { |
389 | req->permanent = 1; | 413 | req->permanent = 1; |
390 | } else { | 414 | } else { |
391 | req->if_id = cpu_to_le16((u16)if_handle); | 415 | req->if_id = cpu_to_le16((u16) if_handle); |
392 | req->permanent = 0; | 416 | req->permanent = 0; |
393 | } | 417 | } |
394 | 418 | ||
395 | status = be_mbox_notify(adapter); | 419 | status = be_mbox_notify_wait(adapter); |
396 | if (!status) | 420 | if (!status) { |
421 | struct be_cmd_resp_mac_query *resp = embedded_payload(wrb); | ||
397 | memcpy(mac_addr, resp->mac.addr, ETH_ALEN); | 422 | memcpy(mac_addr, resp->mac.addr, ETH_ALEN); |
423 | } | ||
398 | 424 | ||
399 | spin_unlock(&adapter->mbox_lock); | 425 | spin_unlock(&adapter->mbox_lock); |
400 | return status; | 426 | return status; |
401 | } | 427 | } |
402 | 428 | ||
429 | /* Uses synchronous MCCQ */ | ||
403 | int be_cmd_pmac_add(struct be_adapter *adapter, u8 *mac_addr, | 430 | int be_cmd_pmac_add(struct be_adapter *adapter, u8 *mac_addr, |
404 | u32 if_id, u32 *pmac_id) | 431 | u32 if_id, u32 *pmac_id) |
405 | { | 432 | { |
406 | struct be_mcc_wrb *wrb = wrb_from_mbox(&adapter->mbox_mem); | 433 | struct be_mcc_wrb *wrb; |
407 | struct be_cmd_req_pmac_add *req = embedded_payload(wrb); | 434 | struct be_cmd_req_pmac_add *req; |
408 | int status; | 435 | int status; |
409 | 436 | ||
410 | spin_lock(&adapter->mbox_lock); | 437 | spin_lock_bh(&adapter->mcc_lock); |
411 | memset(wrb, 0, sizeof(*wrb)); | 438 | |
439 | wrb = wrb_from_mccq(adapter); | ||
440 | req = embedded_payload(wrb); | ||
412 | 441 | ||
413 | be_wrb_hdr_prepare(wrb, sizeof(*req), true, 0); | 442 | be_wrb_hdr_prepare(wrb, sizeof(*req), true, 0); |
414 | 443 | ||
@@ -418,24 +447,27 @@ int be_cmd_pmac_add(struct be_adapter *adapter, u8 *mac_addr, | |||
418 | req->if_id = cpu_to_le32(if_id); | 447 | req->if_id = cpu_to_le32(if_id); |
419 | memcpy(req->mac_address, mac_addr, ETH_ALEN); | 448 | memcpy(req->mac_address, mac_addr, ETH_ALEN); |
420 | 449 | ||
421 | status = be_mbox_notify(adapter); | 450 | status = be_mcc_notify_wait(adapter); |
422 | if (!status) { | 451 | if (!status) { |
423 | struct be_cmd_resp_pmac_add *resp = embedded_payload(wrb); | 452 | struct be_cmd_resp_pmac_add *resp = embedded_payload(wrb); |
424 | *pmac_id = le32_to_cpu(resp->pmac_id); | 453 | *pmac_id = le32_to_cpu(resp->pmac_id); |
425 | } | 454 | } |
426 | 455 | ||
427 | spin_unlock(&adapter->mbox_lock); | 456 | spin_unlock_bh(&adapter->mcc_lock); |
428 | return status; | 457 | return status; |
429 | } | 458 | } |
430 | 459 | ||
460 | /* Uses synchronous MCCQ */ | ||
431 | int be_cmd_pmac_del(struct be_adapter *adapter, u32 if_id, u32 pmac_id) | 461 | int be_cmd_pmac_del(struct be_adapter *adapter, u32 if_id, u32 pmac_id) |
432 | { | 462 | { |
433 | struct be_mcc_wrb *wrb = wrb_from_mbox(&adapter->mbox_mem); | 463 | struct be_mcc_wrb *wrb; |
434 | struct be_cmd_req_pmac_del *req = embedded_payload(wrb); | 464 | struct be_cmd_req_pmac_del *req; |
435 | int status; | 465 | int status; |
436 | 466 | ||
437 | spin_lock(&adapter->mbox_lock); | 467 | spin_lock_bh(&adapter->mcc_lock); |
438 | memset(wrb, 0, sizeof(*wrb)); | 468 | |
469 | wrb = wrb_from_mccq(adapter); | ||
470 | req = embedded_payload(wrb); | ||
439 | 471 | ||
440 | be_wrb_hdr_prepare(wrb, sizeof(*req), true, 0); | 472 | be_wrb_hdr_prepare(wrb, sizeof(*req), true, 0); |
441 | 473 | ||
@@ -445,25 +477,29 @@ int be_cmd_pmac_del(struct be_adapter *adapter, u32 if_id, u32 pmac_id) | |||
445 | req->if_id = cpu_to_le32(if_id); | 477 | req->if_id = cpu_to_le32(if_id); |
446 | req->pmac_id = cpu_to_le32(pmac_id); | 478 | req->pmac_id = cpu_to_le32(pmac_id); |
447 | 479 | ||
448 | status = be_mbox_notify(adapter); | 480 | status = be_mcc_notify_wait(adapter); |
449 | spin_unlock(&adapter->mbox_lock); | 481 | |
482 | spin_unlock_bh(&adapter->mcc_lock); | ||
450 | 483 | ||
451 | return status; | 484 | return status; |
452 | } | 485 | } |
453 | 486 | ||
487 | /* Uses Mbox */ | ||
454 | int be_cmd_cq_create(struct be_adapter *adapter, | 488 | int be_cmd_cq_create(struct be_adapter *adapter, |
455 | struct be_queue_info *cq, struct be_queue_info *eq, | 489 | struct be_queue_info *cq, struct be_queue_info *eq, |
456 | bool sol_evts, bool no_delay, int coalesce_wm) | 490 | bool sol_evts, bool no_delay, int coalesce_wm) |
457 | { | 491 | { |
458 | struct be_mcc_wrb *wrb = wrb_from_mbox(&adapter->mbox_mem); | 492 | struct be_mcc_wrb *wrb; |
459 | struct be_cmd_req_cq_create *req = embedded_payload(wrb); | 493 | struct be_cmd_req_cq_create *req; |
460 | struct be_cmd_resp_cq_create *resp = embedded_payload(wrb); | ||
461 | struct be_dma_mem *q_mem = &cq->dma_mem; | 494 | struct be_dma_mem *q_mem = &cq->dma_mem; |
462 | void *ctxt = &req->context; | 495 | void *ctxt; |
463 | int status; | 496 | int status; |
464 | 497 | ||
465 | spin_lock(&adapter->mbox_lock); | 498 | spin_lock(&adapter->mbox_lock); |
466 | memset(wrb, 0, sizeof(*wrb)); | 499 | |
500 | wrb = wrb_from_mbox(adapter); | ||
501 | req = embedded_payload(wrb); | ||
502 | ctxt = &req->context; | ||
467 | 503 | ||
468 | be_wrb_hdr_prepare(wrb, sizeof(*req), true, 0); | 504 | be_wrb_hdr_prepare(wrb, sizeof(*req), true, 0); |
469 | 505 | ||
@@ -486,11 +522,13 @@ int be_cmd_cq_create(struct be_adapter *adapter, | |||
486 | 522 | ||
487 | be_cmd_page_addrs_prepare(req->pages, ARRAY_SIZE(req->pages), q_mem); | 523 | be_cmd_page_addrs_prepare(req->pages, ARRAY_SIZE(req->pages), q_mem); |
488 | 524 | ||
489 | status = be_mbox_notify(adapter); | 525 | status = be_mbox_notify_wait(adapter); |
490 | if (!status) { | 526 | if (!status) { |
527 | struct be_cmd_resp_cq_create *resp = embedded_payload(wrb); | ||
491 | cq->id = le16_to_cpu(resp->cq_id); | 528 | cq->id = le16_to_cpu(resp->cq_id); |
492 | cq->created = true; | 529 | cq->created = true; |
493 | } | 530 | } |
531 | |||
494 | spin_unlock(&adapter->mbox_lock); | 532 | spin_unlock(&adapter->mbox_lock); |
495 | 533 | ||
496 | return status; | 534 | return status; |
@@ -508,14 +546,17 @@ int be_cmd_mccq_create(struct be_adapter *adapter, | |||
508 | struct be_queue_info *mccq, | 546 | struct be_queue_info *mccq, |
509 | struct be_queue_info *cq) | 547 | struct be_queue_info *cq) |
510 | { | 548 | { |
511 | struct be_mcc_wrb *wrb = wrb_from_mbox(&adapter->mbox_mem); | 549 | struct be_mcc_wrb *wrb; |
512 | struct be_cmd_req_mcc_create *req = embedded_payload(wrb); | 550 | struct be_cmd_req_mcc_create *req; |
513 | struct be_dma_mem *q_mem = &mccq->dma_mem; | 551 | struct be_dma_mem *q_mem = &mccq->dma_mem; |
514 | void *ctxt = &req->context; | 552 | void *ctxt; |
515 | int status; | 553 | int status; |
516 | 554 | ||
517 | spin_lock(&adapter->mbox_lock); | 555 | spin_lock(&adapter->mbox_lock); |
518 | memset(wrb, 0, sizeof(*wrb)); | 556 | |
557 | wrb = wrb_from_mbox(adapter); | ||
558 | req = embedded_payload(wrb); | ||
559 | ctxt = &req->context; | ||
519 | 560 | ||
520 | be_wrb_hdr_prepare(wrb, sizeof(*req), true, 0); | 561 | be_wrb_hdr_prepare(wrb, sizeof(*req), true, 0); |
521 | 562 | ||
@@ -534,7 +575,7 @@ int be_cmd_mccq_create(struct be_adapter *adapter, | |||
534 | 575 | ||
535 | be_cmd_page_addrs_prepare(req->pages, ARRAY_SIZE(req->pages), q_mem); | 576 | be_cmd_page_addrs_prepare(req->pages, ARRAY_SIZE(req->pages), q_mem); |
536 | 577 | ||
537 | status = be_mbox_notify(adapter); | 578 | status = be_mbox_notify_wait(adapter); |
538 | if (!status) { | 579 | if (!status) { |
539 | struct be_cmd_resp_mcc_create *resp = embedded_payload(wrb); | 580 | struct be_cmd_resp_mcc_create *resp = embedded_payload(wrb); |
540 | mccq->id = le16_to_cpu(resp->id); | 581 | mccq->id = le16_to_cpu(resp->id); |
@@ -549,15 +590,17 @@ int be_cmd_txq_create(struct be_adapter *adapter, | |||
549 | struct be_queue_info *txq, | 590 | struct be_queue_info *txq, |
550 | struct be_queue_info *cq) | 591 | struct be_queue_info *cq) |
551 | { | 592 | { |
552 | struct be_mcc_wrb *wrb = wrb_from_mbox(&adapter->mbox_mem); | 593 | struct be_mcc_wrb *wrb; |
553 | struct be_cmd_req_eth_tx_create *req = embedded_payload(wrb); | 594 | struct be_cmd_req_eth_tx_create *req; |
554 | struct be_dma_mem *q_mem = &txq->dma_mem; | 595 | struct be_dma_mem *q_mem = &txq->dma_mem; |
555 | void *ctxt = &req->context; | 596 | void *ctxt; |
556 | int status; | 597 | int status; |
557 | u32 len_encoded; | ||
558 | 598 | ||
559 | spin_lock(&adapter->mbox_lock); | 599 | spin_lock(&adapter->mbox_lock); |
560 | memset(wrb, 0, sizeof(*wrb)); | 600 | |
601 | wrb = wrb_from_mbox(adapter); | ||
602 | req = embedded_payload(wrb); | ||
603 | ctxt = &req->context; | ||
561 | 604 | ||
562 | be_wrb_hdr_prepare(wrb, sizeof(*req), true, 0); | 605 | be_wrb_hdr_prepare(wrb, sizeof(*req), true, 0); |
563 | 606 | ||
@@ -568,10 +611,8 @@ int be_cmd_txq_create(struct be_adapter *adapter, | |||
568 | req->ulp_num = BE_ULP1_NUM; | 611 | req->ulp_num = BE_ULP1_NUM; |
569 | req->type = BE_ETH_TX_RING_TYPE_STANDARD; | 612 | req->type = BE_ETH_TX_RING_TYPE_STANDARD; |
570 | 613 | ||
571 | len_encoded = fls(txq->len); /* log2(len) + 1 */ | 614 | AMAP_SET_BITS(struct amap_tx_context, tx_ring_size, ctxt, |
572 | if (len_encoded == 16) | 615 | be_encoded_q_len(txq->len)); |
573 | len_encoded = 0; | ||
574 | AMAP_SET_BITS(struct amap_tx_context, tx_ring_size, ctxt, len_encoded); | ||
575 | AMAP_SET_BITS(struct amap_tx_context, pci_func_id, ctxt, | 616 | AMAP_SET_BITS(struct amap_tx_context, pci_func_id, ctxt, |
576 | be_pci_func(adapter)); | 617 | be_pci_func(adapter)); |
577 | AMAP_SET_BITS(struct amap_tx_context, ctx_valid, ctxt, 1); | 618 | AMAP_SET_BITS(struct amap_tx_context, ctx_valid, ctxt, 1); |
@@ -581,28 +622,32 @@ int be_cmd_txq_create(struct be_adapter *adapter, | |||
581 | 622 | ||
582 | be_cmd_page_addrs_prepare(req->pages, ARRAY_SIZE(req->pages), q_mem); | 623 | be_cmd_page_addrs_prepare(req->pages, ARRAY_SIZE(req->pages), q_mem); |
583 | 624 | ||
584 | status = be_mbox_notify(adapter); | 625 | status = be_mbox_notify_wait(adapter); |
585 | if (!status) { | 626 | if (!status) { |
586 | struct be_cmd_resp_eth_tx_create *resp = embedded_payload(wrb); | 627 | struct be_cmd_resp_eth_tx_create *resp = embedded_payload(wrb); |
587 | txq->id = le16_to_cpu(resp->cid); | 628 | txq->id = le16_to_cpu(resp->cid); |
588 | txq->created = true; | 629 | txq->created = true; |
589 | } | 630 | } |
631 | |||
590 | spin_unlock(&adapter->mbox_lock); | 632 | spin_unlock(&adapter->mbox_lock); |
591 | 633 | ||
592 | return status; | 634 | return status; |
593 | } | 635 | } |
594 | 636 | ||
637 | /* Uses mbox */ | ||
595 | int be_cmd_rxq_create(struct be_adapter *adapter, | 638 | int be_cmd_rxq_create(struct be_adapter *adapter, |
596 | struct be_queue_info *rxq, u16 cq_id, u16 frag_size, | 639 | struct be_queue_info *rxq, u16 cq_id, u16 frag_size, |
597 | u16 max_frame_size, u32 if_id, u32 rss) | 640 | u16 max_frame_size, u32 if_id, u32 rss) |
598 | { | 641 | { |
599 | struct be_mcc_wrb *wrb = wrb_from_mbox(&adapter->mbox_mem); | 642 | struct be_mcc_wrb *wrb; |
600 | struct be_cmd_req_eth_rx_create *req = embedded_payload(wrb); | 643 | struct be_cmd_req_eth_rx_create *req; |
601 | struct be_dma_mem *q_mem = &rxq->dma_mem; | 644 | struct be_dma_mem *q_mem = &rxq->dma_mem; |
602 | int status; | 645 | int status; |
603 | 646 | ||
604 | spin_lock(&adapter->mbox_lock); | 647 | spin_lock(&adapter->mbox_lock); |
605 | memset(wrb, 0, sizeof(*wrb)); | 648 | |
649 | wrb = wrb_from_mbox(adapter); | ||
650 | req = embedded_payload(wrb); | ||
606 | 651 | ||
607 | be_wrb_hdr_prepare(wrb, sizeof(*req), true, 0); | 652 | be_wrb_hdr_prepare(wrb, sizeof(*req), true, 0); |
608 | 653 | ||
@@ -617,29 +662,34 @@ int be_cmd_rxq_create(struct be_adapter *adapter, | |||
617 | req->max_frame_size = cpu_to_le16(max_frame_size); | 662 | req->max_frame_size = cpu_to_le16(max_frame_size); |
618 | req->rss_queue = cpu_to_le32(rss); | 663 | req->rss_queue = cpu_to_le32(rss); |
619 | 664 | ||
620 | status = be_mbox_notify(adapter); | 665 | status = be_mbox_notify_wait(adapter); |
621 | if (!status) { | 666 | if (!status) { |
622 | struct be_cmd_resp_eth_rx_create *resp = embedded_payload(wrb); | 667 | struct be_cmd_resp_eth_rx_create *resp = embedded_payload(wrb); |
623 | rxq->id = le16_to_cpu(resp->id); | 668 | rxq->id = le16_to_cpu(resp->id); |
624 | rxq->created = true; | 669 | rxq->created = true; |
625 | } | 670 | } |
671 | |||
626 | spin_unlock(&adapter->mbox_lock); | 672 | spin_unlock(&adapter->mbox_lock); |
627 | 673 | ||
628 | return status; | 674 | return status; |
629 | } | 675 | } |
630 | 676 | ||
631 | /* Generic destroyer function for all types of queues */ | 677 | /* Generic destroyer function for all types of queues |
678 | * Uses Mbox | ||
679 | */ | ||
632 | int be_cmd_q_destroy(struct be_adapter *adapter, struct be_queue_info *q, | 680 | int be_cmd_q_destroy(struct be_adapter *adapter, struct be_queue_info *q, |
633 | int queue_type) | 681 | int queue_type) |
634 | { | 682 | { |
635 | struct be_mcc_wrb *wrb = wrb_from_mbox(&adapter->mbox_mem); | 683 | struct be_mcc_wrb *wrb; |
636 | struct be_cmd_req_q_destroy *req = embedded_payload(wrb); | 684 | struct be_cmd_req_q_destroy *req; |
637 | u8 subsys = 0, opcode = 0; | 685 | u8 subsys = 0, opcode = 0; |
638 | int status; | 686 | int status; |
639 | 687 | ||
640 | spin_lock(&adapter->mbox_lock); | 688 | spin_lock(&adapter->mbox_lock); |
641 | 689 | ||
642 | memset(wrb, 0, sizeof(*wrb)); | 690 | wrb = wrb_from_mbox(adapter); |
691 | req = embedded_payload(wrb); | ||
692 | |||
643 | be_wrb_hdr_prepare(wrb, sizeof(*req), true, 0); | 693 | be_wrb_hdr_prepare(wrb, sizeof(*req), true, 0); |
644 | 694 | ||
645 | switch (queue_type) { | 695 | switch (queue_type) { |
@@ -669,23 +719,27 @@ int be_cmd_q_destroy(struct be_adapter *adapter, struct be_queue_info *q, | |||
669 | be_cmd_hdr_prepare(&req->hdr, subsys, opcode, sizeof(*req)); | 719 | be_cmd_hdr_prepare(&req->hdr, subsys, opcode, sizeof(*req)); |
670 | req->id = cpu_to_le16(q->id); | 720 | req->id = cpu_to_le16(q->id); |
671 | 721 | ||
672 | status = be_mbox_notify(adapter); | 722 | status = be_mbox_notify_wait(adapter); |
673 | 723 | ||
674 | spin_unlock(&adapter->mbox_lock); | 724 | spin_unlock(&adapter->mbox_lock); |
675 | 725 | ||
676 | return status; | 726 | return status; |
677 | } | 727 | } |
678 | 728 | ||
679 | /* Create an rx filtering policy configuration on an i/f */ | 729 | /* Create an rx filtering policy configuration on an i/f |
730 | * Uses mbox | ||
731 | */ | ||
680 | int be_cmd_if_create(struct be_adapter *adapter, u32 flags, u8 *mac, | 732 | int be_cmd_if_create(struct be_adapter *adapter, u32 flags, u8 *mac, |
681 | bool pmac_invalid, u32 *if_handle, u32 *pmac_id) | 733 | bool pmac_invalid, u32 *if_handle, u32 *pmac_id) |
682 | { | 734 | { |
683 | struct be_mcc_wrb *wrb = wrb_from_mbox(&adapter->mbox_mem); | 735 | struct be_mcc_wrb *wrb; |
684 | struct be_cmd_req_if_create *req = embedded_payload(wrb); | 736 | struct be_cmd_req_if_create *req; |
685 | int status; | 737 | int status; |
686 | 738 | ||
687 | spin_lock(&adapter->mbox_lock); | 739 | spin_lock(&adapter->mbox_lock); |
688 | memset(wrb, 0, sizeof(*wrb)); | 740 | |
741 | wrb = wrb_from_mbox(adapter); | ||
742 | req = embedded_payload(wrb); | ||
689 | 743 | ||
690 | be_wrb_hdr_prepare(wrb, sizeof(*req), true, 0); | 744 | be_wrb_hdr_prepare(wrb, sizeof(*req), true, 0); |
691 | 745 | ||
@@ -694,10 +748,11 @@ int be_cmd_if_create(struct be_adapter *adapter, u32 flags, u8 *mac, | |||
694 | 748 | ||
695 | req->capability_flags = cpu_to_le32(flags); | 749 | req->capability_flags = cpu_to_le32(flags); |
696 | req->enable_flags = cpu_to_le32(flags); | 750 | req->enable_flags = cpu_to_le32(flags); |
751 | req->pmac_invalid = pmac_invalid; | ||
697 | if (!pmac_invalid) | 752 | if (!pmac_invalid) |
698 | memcpy(req->mac_addr, mac, ETH_ALEN); | 753 | memcpy(req->mac_addr, mac, ETH_ALEN); |
699 | 754 | ||
700 | status = be_mbox_notify(adapter); | 755 | status = be_mbox_notify_wait(adapter); |
701 | if (!status) { | 756 | if (!status) { |
702 | struct be_cmd_resp_if_create *resp = embedded_payload(wrb); | 757 | struct be_cmd_resp_if_create *resp = embedded_payload(wrb); |
703 | *if_handle = le32_to_cpu(resp->interface_id); | 758 | *if_handle = le32_to_cpu(resp->interface_id); |
@@ -709,14 +764,17 @@ int be_cmd_if_create(struct be_adapter *adapter, u32 flags, u8 *mac, | |||
709 | return status; | 764 | return status; |
710 | } | 765 | } |
711 | 766 | ||
767 | /* Uses mbox */ | ||
712 | int be_cmd_if_destroy(struct be_adapter *adapter, u32 interface_id) | 768 | int be_cmd_if_destroy(struct be_adapter *adapter, u32 interface_id) |
713 | { | 769 | { |
714 | struct be_mcc_wrb *wrb = wrb_from_mbox(&adapter->mbox_mem); | 770 | struct be_mcc_wrb *wrb; |
715 | struct be_cmd_req_if_destroy *req = embedded_payload(wrb); | 771 | struct be_cmd_req_if_destroy *req; |
716 | int status; | 772 | int status; |
717 | 773 | ||
718 | spin_lock(&adapter->mbox_lock); | 774 | spin_lock(&adapter->mbox_lock); |
719 | memset(wrb, 0, sizeof(*wrb)); | 775 | |
776 | wrb = wrb_from_mbox(adapter); | ||
777 | req = embedded_payload(wrb); | ||
720 | 778 | ||
721 | be_wrb_hdr_prepare(wrb, sizeof(*req), true, 0); | 779 | be_wrb_hdr_prepare(wrb, sizeof(*req), true, 0); |
722 | 780 | ||
@@ -724,7 +782,8 @@ int be_cmd_if_destroy(struct be_adapter *adapter, u32 interface_id) | |||
724 | OPCODE_COMMON_NTWK_INTERFACE_DESTROY, sizeof(*req)); | 782 | OPCODE_COMMON_NTWK_INTERFACE_DESTROY, sizeof(*req)); |
725 | 783 | ||
726 | req->interface_id = cpu_to_le32(interface_id); | 784 | req->interface_id = cpu_to_le32(interface_id); |
727 | status = be_mbox_notify(adapter); | 785 | |
786 | status = be_mbox_notify_wait(adapter); | ||
728 | 787 | ||
729 | spin_unlock(&adapter->mbox_lock); | 788 | spin_unlock(&adapter->mbox_lock); |
730 | 789 | ||
@@ -733,20 +792,22 @@ int be_cmd_if_destroy(struct be_adapter *adapter, u32 interface_id) | |||
733 | 792 | ||
734 | /* Get stats is a non embedded command: the request is not embedded inside | 793 | /* Get stats is a non embedded command: the request is not embedded inside |
735 | * WRB but is a separate dma memory block | 794 | * WRB but is a separate dma memory block |
795 | * Uses asynchronous MCC | ||
736 | */ | 796 | */ |
737 | int be_cmd_get_stats(struct be_adapter *adapter, struct be_dma_mem *nonemb_cmd) | 797 | int be_cmd_get_stats(struct be_adapter *adapter, struct be_dma_mem *nonemb_cmd) |
738 | { | 798 | { |
739 | struct be_mcc_wrb *wrb = wrb_from_mbox(&adapter->mbox_mem); | 799 | struct be_mcc_wrb *wrb; |
740 | struct be_cmd_req_get_stats *req = nonemb_cmd->va; | 800 | struct be_cmd_req_get_stats *req; |
741 | struct be_sge *sge = nonembedded_sgl(wrb); | 801 | struct be_sge *sge; |
742 | int status; | ||
743 | 802 | ||
744 | spin_lock(&adapter->mbox_lock); | 803 | spin_lock_bh(&adapter->mcc_lock); |
745 | memset(wrb, 0, sizeof(*wrb)); | ||
746 | 804 | ||
747 | memset(req, 0, sizeof(*req)); | 805 | wrb = wrb_from_mccq(adapter); |
806 | req = nonemb_cmd->va; | ||
807 | sge = nonembedded_sgl(wrb); | ||
748 | 808 | ||
749 | be_wrb_hdr_prepare(wrb, sizeof(*req), false, 1); | 809 | be_wrb_hdr_prepare(wrb, sizeof(*req), false, 1); |
810 | wrb->tag0 = OPCODE_ETH_GET_STATISTICS; | ||
750 | 811 | ||
751 | be_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_ETH, | 812 | be_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_ETH, |
752 | OPCODE_ETH_GET_STATISTICS, sizeof(*req)); | 813 | OPCODE_ETH_GET_STATISTICS, sizeof(*req)); |
@@ -754,59 +815,61 @@ int be_cmd_get_stats(struct be_adapter *adapter, struct be_dma_mem *nonemb_cmd) | |||
754 | sge->pa_lo = cpu_to_le32(nonemb_cmd->dma & 0xFFFFFFFF); | 815 | sge->pa_lo = cpu_to_le32(nonemb_cmd->dma & 0xFFFFFFFF); |
755 | sge->len = cpu_to_le32(nonemb_cmd->size); | 816 | sge->len = cpu_to_le32(nonemb_cmd->size); |
756 | 817 | ||
757 | status = be_mbox_notify(adapter); | 818 | be_mcc_notify(adapter); |
758 | if (!status) { | ||
759 | struct be_cmd_resp_get_stats *resp = nonemb_cmd->va; | ||
760 | be_dws_le_to_cpu(&resp->hw_stats, sizeof(resp->hw_stats)); | ||
761 | } | ||
762 | 819 | ||
763 | spin_unlock(&adapter->mbox_lock); | 820 | spin_unlock_bh(&adapter->mcc_lock); |
764 | return status; | 821 | return 0; |
765 | } | 822 | } |
766 | 823 | ||
824 | /* Uses synchronous mcc */ | ||
767 | int be_cmd_link_status_query(struct be_adapter *adapter, | 825 | int be_cmd_link_status_query(struct be_adapter *adapter, |
768 | bool *link_up) | 826 | bool *link_up) |
769 | { | 827 | { |
770 | struct be_mcc_wrb *wrb = wrb_from_mbox(&adapter->mbox_mem); | 828 | struct be_mcc_wrb *wrb; |
771 | struct be_cmd_req_link_status *req = embedded_payload(wrb); | 829 | struct be_cmd_req_link_status *req; |
772 | int status; | 830 | int status; |
773 | 831 | ||
774 | spin_lock(&adapter->mbox_lock); | 832 | spin_lock_bh(&adapter->mcc_lock); |
833 | |||
834 | wrb = wrb_from_mccq(adapter); | ||
835 | req = embedded_payload(wrb); | ||
775 | 836 | ||
776 | *link_up = false; | 837 | *link_up = false; |
777 | memset(wrb, 0, sizeof(*wrb)); | ||
778 | 838 | ||
779 | be_wrb_hdr_prepare(wrb, sizeof(*req), true, 0); | 839 | be_wrb_hdr_prepare(wrb, sizeof(*req), true, 0); |
780 | 840 | ||
781 | be_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, | 841 | be_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, |
782 | OPCODE_COMMON_NTWK_LINK_STATUS_QUERY, sizeof(*req)); | 842 | OPCODE_COMMON_NTWK_LINK_STATUS_QUERY, sizeof(*req)); |
783 | 843 | ||
784 | status = be_mbox_notify(adapter); | 844 | status = be_mcc_notify_wait(adapter); |
785 | if (!status) { | 845 | if (!status) { |
786 | struct be_cmd_resp_link_status *resp = embedded_payload(wrb); | 846 | struct be_cmd_resp_link_status *resp = embedded_payload(wrb); |
787 | if (resp->mac_speed != PHY_LINK_SPEED_ZERO) | 847 | if (resp->mac_speed != PHY_LINK_SPEED_ZERO) |
788 | *link_up = true; | 848 | *link_up = true; |
789 | } | 849 | } |
790 | 850 | ||
791 | spin_unlock(&adapter->mbox_lock); | 851 | spin_unlock_bh(&adapter->mcc_lock); |
792 | return status; | 852 | return status; |
793 | } | 853 | } |
794 | 854 | ||
855 | /* Uses Mbox */ | ||
795 | int be_cmd_get_fw_ver(struct be_adapter *adapter, char *fw_ver) | 856 | int be_cmd_get_fw_ver(struct be_adapter *adapter, char *fw_ver) |
796 | { | 857 | { |
797 | struct be_mcc_wrb *wrb = wrb_from_mbox(&adapter->mbox_mem); | 858 | struct be_mcc_wrb *wrb; |
798 | struct be_cmd_req_get_fw_version *req = embedded_payload(wrb); | 859 | struct be_cmd_req_get_fw_version *req; |
799 | int status; | 860 | int status; |
800 | 861 | ||
801 | spin_lock(&adapter->mbox_lock); | 862 | spin_lock(&adapter->mbox_lock); |
802 | memset(wrb, 0, sizeof(*wrb)); | 863 | |
864 | wrb = wrb_from_mbox(adapter); | ||
865 | req = embedded_payload(wrb); | ||
803 | 866 | ||
804 | be_wrb_hdr_prepare(wrb, sizeof(*req), true, 0); | 867 | be_wrb_hdr_prepare(wrb, sizeof(*req), true, 0); |
805 | 868 | ||
806 | be_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, | 869 | be_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, |
807 | OPCODE_COMMON_GET_FW_VERSION, sizeof(*req)); | 870 | OPCODE_COMMON_GET_FW_VERSION, sizeof(*req)); |
808 | 871 | ||
809 | status = be_mbox_notify(adapter); | 872 | status = be_mbox_notify_wait(adapter); |
810 | if (!status) { | 873 | if (!status) { |
811 | struct be_cmd_resp_get_fw_version *resp = embedded_payload(wrb); | 874 | struct be_cmd_resp_get_fw_version *resp = embedded_payload(wrb); |
812 | strncpy(fw_ver, resp->firmware_version_string, FW_VER_LEN); | 875 | strncpy(fw_ver, resp->firmware_version_string, FW_VER_LEN); |
@@ -816,15 +879,18 @@ int be_cmd_get_fw_ver(struct be_adapter *adapter, char *fw_ver) | |||
816 | return status; | 879 | return status; |
817 | } | 880 | } |
818 | 881 | ||
819 | /* set the EQ delay interval of an EQ to specified value */ | 882 | /* set the EQ delay interval of an EQ to specified value |
883 | * Uses async mcc | ||
884 | */ | ||
820 | int be_cmd_modify_eqd(struct be_adapter *adapter, u32 eq_id, u32 eqd) | 885 | int be_cmd_modify_eqd(struct be_adapter *adapter, u32 eq_id, u32 eqd) |
821 | { | 886 | { |
822 | struct be_mcc_wrb *wrb = wrb_from_mbox(&adapter->mbox_mem); | 887 | struct be_mcc_wrb *wrb; |
823 | struct be_cmd_req_modify_eq_delay *req = embedded_payload(wrb); | 888 | struct be_cmd_req_modify_eq_delay *req; |
824 | int status; | ||
825 | 889 | ||
826 | spin_lock(&adapter->mbox_lock); | 890 | spin_lock_bh(&adapter->mcc_lock); |
827 | memset(wrb, 0, sizeof(*wrb)); | 891 | |
892 | wrb = wrb_from_mccq(adapter); | ||
893 | req = embedded_payload(wrb); | ||
828 | 894 | ||
829 | be_wrb_hdr_prepare(wrb, sizeof(*req), true, 0); | 895 | be_wrb_hdr_prepare(wrb, sizeof(*req), true, 0); |
830 | 896 | ||
@@ -836,21 +902,24 @@ int be_cmd_modify_eqd(struct be_adapter *adapter, u32 eq_id, u32 eqd) | |||
836 | req->delay[0].phase = 0; | 902 | req->delay[0].phase = 0; |
837 | req->delay[0].delay_multiplier = cpu_to_le32(eqd); | 903 | req->delay[0].delay_multiplier = cpu_to_le32(eqd); |
838 | 904 | ||
839 | status = be_mbox_notify(adapter); | 905 | be_mcc_notify(adapter); |
840 | 906 | ||
841 | spin_unlock(&adapter->mbox_lock); | 907 | spin_unlock_bh(&adapter->mcc_lock); |
842 | return status; | 908 | return 0; |
843 | } | 909 | } |
844 | 910 | ||
911 | /* Uses sycnhronous mcc */ | ||
845 | int be_cmd_vlan_config(struct be_adapter *adapter, u32 if_id, u16 *vtag_array, | 912 | int be_cmd_vlan_config(struct be_adapter *adapter, u32 if_id, u16 *vtag_array, |
846 | u32 num, bool untagged, bool promiscuous) | 913 | u32 num, bool untagged, bool promiscuous) |
847 | { | 914 | { |
848 | struct be_mcc_wrb *wrb = wrb_from_mbox(&adapter->mbox_mem); | 915 | struct be_mcc_wrb *wrb; |
849 | struct be_cmd_req_vlan_config *req = embedded_payload(wrb); | 916 | struct be_cmd_req_vlan_config *req; |
850 | int status; | 917 | int status; |
851 | 918 | ||
852 | spin_lock(&adapter->mbox_lock); | 919 | spin_lock_bh(&adapter->mcc_lock); |
853 | memset(wrb, 0, sizeof(*wrb)); | 920 | |
921 | wrb = wrb_from_mccq(adapter); | ||
922 | req = embedded_payload(wrb); | ||
854 | 923 | ||
855 | be_wrb_hdr_prepare(wrb, sizeof(*req), true, 0); | 924 | be_wrb_hdr_prepare(wrb, sizeof(*req), true, 0); |
856 | 925 | ||
@@ -866,23 +935,24 @@ int be_cmd_vlan_config(struct be_adapter *adapter, u32 if_id, u16 *vtag_array, | |||
866 | req->num_vlan * sizeof(vtag_array[0])); | 935 | req->num_vlan * sizeof(vtag_array[0])); |
867 | } | 936 | } |
868 | 937 | ||
869 | status = be_mbox_notify(adapter); | 938 | status = be_mcc_notify_wait(adapter); |
870 | 939 | ||
871 | spin_unlock(&adapter->mbox_lock); | 940 | spin_unlock_bh(&adapter->mcc_lock); |
872 | return status; | 941 | return status; |
873 | } | 942 | } |
874 | 943 | ||
875 | /* Use MCC for this command as it may be called in BH context */ | 944 | /* Uses MCC for this command as it may be called in BH context |
945 | * Uses synchronous mcc | ||
946 | */ | ||
876 | int be_cmd_promiscuous_config(struct be_adapter *adapter, u8 port_num, bool en) | 947 | int be_cmd_promiscuous_config(struct be_adapter *adapter, u8 port_num, bool en) |
877 | { | 948 | { |
878 | struct be_mcc_wrb *wrb; | 949 | struct be_mcc_wrb *wrb; |
879 | struct be_cmd_req_promiscuous_config *req; | 950 | struct be_cmd_req_promiscuous_config *req; |
951 | int status; | ||
880 | 952 | ||
881 | spin_lock_bh(&adapter->mcc_lock); | 953 | spin_lock_bh(&adapter->mcc_lock); |
882 | 954 | ||
883 | wrb = wrb_from_mcc(&adapter->mcc_obj.q); | 955 | wrb = wrb_from_mccq(adapter); |
884 | BUG_ON(!wrb); | ||
885 | |||
886 | req = embedded_payload(wrb); | 956 | req = embedded_payload(wrb); |
887 | 957 | ||
888 | be_wrb_hdr_prepare(wrb, sizeof(*req), true, 0); | 958 | be_wrb_hdr_prepare(wrb, sizeof(*req), true, 0); |
@@ -895,14 +965,14 @@ int be_cmd_promiscuous_config(struct be_adapter *adapter, u8 port_num, bool en) | |||
895 | else | 965 | else |
896 | req->port0_promiscuous = en; | 966 | req->port0_promiscuous = en; |
897 | 967 | ||
898 | be_mcc_notify_wait(adapter); | 968 | status = be_mcc_notify_wait(adapter); |
899 | 969 | ||
900 | spin_unlock_bh(&adapter->mcc_lock); | 970 | spin_unlock_bh(&adapter->mcc_lock); |
901 | return 0; | 971 | return status; |
902 | } | 972 | } |
903 | 973 | ||
904 | /* | 974 | /* |
905 | * Use MCC for this command as it may be called in BH context | 975 | * Uses MCC for this command as it may be called in BH context |
906 | * (mc == NULL) => multicast promiscous | 976 | * (mc == NULL) => multicast promiscous |
907 | */ | 977 | */ |
908 | int be_cmd_multicast_set(struct be_adapter *adapter, u32 if_id, | 978 | int be_cmd_multicast_set(struct be_adapter *adapter, u32 if_id, |
@@ -914,9 +984,7 @@ int be_cmd_multicast_set(struct be_adapter *adapter, u32 if_id, | |||
914 | 984 | ||
915 | spin_lock_bh(&adapter->mcc_lock); | 985 | spin_lock_bh(&adapter->mcc_lock); |
916 | 986 | ||
917 | wrb = wrb_from_mcc(&adapter->mcc_obj.q); | 987 | wrb = wrb_from_mccq(adapter); |
918 | BUG_ON(!wrb); | ||
919 | |||
920 | req = embedded_payload(wrb); | 988 | req = embedded_payload(wrb); |
921 | 989 | ||
922 | be_wrb_hdr_prepare(wrb, sizeof(*req), true, 0); | 990 | be_wrb_hdr_prepare(wrb, sizeof(*req), true, 0); |
@@ -944,15 +1012,17 @@ int be_cmd_multicast_set(struct be_adapter *adapter, u32 if_id, | |||
944 | return 0; | 1012 | return 0; |
945 | } | 1013 | } |
946 | 1014 | ||
1015 | /* Uses synchrounous mcc */ | ||
947 | int be_cmd_set_flow_control(struct be_adapter *adapter, u32 tx_fc, u32 rx_fc) | 1016 | int be_cmd_set_flow_control(struct be_adapter *adapter, u32 tx_fc, u32 rx_fc) |
948 | { | 1017 | { |
949 | struct be_mcc_wrb *wrb = wrb_from_mbox(&adapter->mbox_mem); | 1018 | struct be_mcc_wrb *wrb; |
950 | struct be_cmd_req_set_flow_control *req = embedded_payload(wrb); | 1019 | struct be_cmd_req_set_flow_control *req; |
951 | int status; | 1020 | int status; |
952 | 1021 | ||
953 | spin_lock(&adapter->mbox_lock); | 1022 | spin_lock_bh(&adapter->mcc_lock); |
954 | 1023 | ||
955 | memset(wrb, 0, sizeof(*wrb)); | 1024 | wrb = wrb_from_mccq(adapter); |
1025 | req = embedded_payload(wrb); | ||
956 | 1026 | ||
957 | be_wrb_hdr_prepare(wrb, sizeof(*req), true, 0); | 1027 | be_wrb_hdr_prepare(wrb, sizeof(*req), true, 0); |
958 | 1028 | ||
@@ -962,28 +1032,30 @@ int be_cmd_set_flow_control(struct be_adapter *adapter, u32 tx_fc, u32 rx_fc) | |||
962 | req->tx_flow_control = cpu_to_le16((u16)tx_fc); | 1032 | req->tx_flow_control = cpu_to_le16((u16)tx_fc); |
963 | req->rx_flow_control = cpu_to_le16((u16)rx_fc); | 1033 | req->rx_flow_control = cpu_to_le16((u16)rx_fc); |
964 | 1034 | ||
965 | status = be_mbox_notify(adapter); | 1035 | status = be_mcc_notify_wait(adapter); |
966 | 1036 | ||
967 | spin_unlock(&adapter->mbox_lock); | 1037 | spin_unlock_bh(&adapter->mcc_lock); |
968 | return status; | 1038 | return status; |
969 | } | 1039 | } |
970 | 1040 | ||
1041 | /* Uses sycn mcc */ | ||
971 | int be_cmd_get_flow_control(struct be_adapter *adapter, u32 *tx_fc, u32 *rx_fc) | 1042 | int be_cmd_get_flow_control(struct be_adapter *adapter, u32 *tx_fc, u32 *rx_fc) |
972 | { | 1043 | { |
973 | struct be_mcc_wrb *wrb = wrb_from_mbox(&adapter->mbox_mem); | 1044 | struct be_mcc_wrb *wrb; |
974 | struct be_cmd_req_get_flow_control *req = embedded_payload(wrb); | 1045 | struct be_cmd_req_get_flow_control *req; |
975 | int status; | 1046 | int status; |
976 | 1047 | ||
977 | spin_lock(&adapter->mbox_lock); | 1048 | spin_lock_bh(&adapter->mcc_lock); |
978 | 1049 | ||
979 | memset(wrb, 0, sizeof(*wrb)); | 1050 | wrb = wrb_from_mccq(adapter); |
1051 | req = embedded_payload(wrb); | ||
980 | 1052 | ||
981 | be_wrb_hdr_prepare(wrb, sizeof(*req), true, 0); | 1053 | be_wrb_hdr_prepare(wrb, sizeof(*req), true, 0); |
982 | 1054 | ||
983 | be_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, | 1055 | be_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, |
984 | OPCODE_COMMON_GET_FLOW_CONTROL, sizeof(*req)); | 1056 | OPCODE_COMMON_GET_FLOW_CONTROL, sizeof(*req)); |
985 | 1057 | ||
986 | status = be_mbox_notify(adapter); | 1058 | status = be_mcc_notify_wait(adapter); |
987 | if (!status) { | 1059 | if (!status) { |
988 | struct be_cmd_resp_get_flow_control *resp = | 1060 | struct be_cmd_resp_get_flow_control *resp = |
989 | embedded_payload(wrb); | 1061 | embedded_payload(wrb); |
@@ -991,26 +1063,28 @@ int be_cmd_get_flow_control(struct be_adapter *adapter, u32 *tx_fc, u32 *rx_fc) | |||
991 | *rx_fc = le16_to_cpu(resp->rx_flow_control); | 1063 | *rx_fc = le16_to_cpu(resp->rx_flow_control); |
992 | } | 1064 | } |
993 | 1065 | ||
994 | spin_unlock(&adapter->mbox_lock); | 1066 | spin_unlock_bh(&adapter->mcc_lock); |
995 | return status; | 1067 | return status; |
996 | } | 1068 | } |
997 | 1069 | ||
1070 | /* Uses mbox */ | ||
998 | int be_cmd_query_fw_cfg(struct be_adapter *adapter, u32 *port_num) | 1071 | int be_cmd_query_fw_cfg(struct be_adapter *adapter, u32 *port_num) |
999 | { | 1072 | { |
1000 | struct be_mcc_wrb *wrb = wrb_from_mbox(&adapter->mbox_mem); | 1073 | struct be_mcc_wrb *wrb; |
1001 | struct be_cmd_req_query_fw_cfg *req = embedded_payload(wrb); | 1074 | struct be_cmd_req_query_fw_cfg *req; |
1002 | int status; | 1075 | int status; |
1003 | 1076 | ||
1004 | spin_lock(&adapter->mbox_lock); | 1077 | spin_lock(&adapter->mbox_lock); |
1005 | 1078 | ||
1006 | memset(wrb, 0, sizeof(*wrb)); | 1079 | wrb = wrb_from_mbox(adapter); |
1080 | req = embedded_payload(wrb); | ||
1007 | 1081 | ||
1008 | be_wrb_hdr_prepare(wrb, sizeof(*req), true, 0); | 1082 | be_wrb_hdr_prepare(wrb, sizeof(*req), true, 0); |
1009 | 1083 | ||
1010 | be_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, | 1084 | be_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, |
1011 | OPCODE_COMMON_QUERY_FIRMWARE_CONFIG, sizeof(*req)); | 1085 | OPCODE_COMMON_QUERY_FIRMWARE_CONFIG, sizeof(*req)); |
1012 | 1086 | ||
1013 | status = be_mbox_notify(adapter); | 1087 | status = be_mbox_notify_wait(adapter); |
1014 | if (!status) { | 1088 | if (!status) { |
1015 | struct be_cmd_resp_query_fw_cfg *resp = embedded_payload(wrb); | 1089 | struct be_cmd_resp_query_fw_cfg *resp = embedded_payload(wrb); |
1016 | *port_num = le32_to_cpu(resp->phys_port); | 1090 | *port_num = le32_to_cpu(resp->phys_port); |
@@ -1020,22 +1094,24 @@ int be_cmd_query_fw_cfg(struct be_adapter *adapter, u32 *port_num) | |||
1020 | return status; | 1094 | return status; |
1021 | } | 1095 | } |
1022 | 1096 | ||
1097 | /* Uses mbox */ | ||
1023 | int be_cmd_reset_function(struct be_adapter *adapter) | 1098 | int be_cmd_reset_function(struct be_adapter *adapter) |
1024 | { | 1099 | { |
1025 | struct be_mcc_wrb *wrb = wrb_from_mbox(&adapter->mbox_mem); | 1100 | struct be_mcc_wrb *wrb; |
1026 | struct be_cmd_req_hdr *req = embedded_payload(wrb); | 1101 | struct be_cmd_req_hdr *req; |
1027 | int status; | 1102 | int status; |
1028 | 1103 | ||
1029 | spin_lock(&adapter->mbox_lock); | 1104 | spin_lock(&adapter->mbox_lock); |
1030 | 1105 | ||
1031 | memset(wrb, 0, sizeof(*wrb)); | 1106 | wrb = wrb_from_mbox(adapter); |
1107 | req = embedded_payload(wrb); | ||
1032 | 1108 | ||
1033 | be_wrb_hdr_prepare(wrb, sizeof(*req), true, 0); | 1109 | be_wrb_hdr_prepare(wrb, sizeof(*req), true, 0); |
1034 | 1110 | ||
1035 | be_cmd_hdr_prepare(req, CMD_SUBSYSTEM_COMMON, | 1111 | be_cmd_hdr_prepare(req, CMD_SUBSYSTEM_COMMON, |
1036 | OPCODE_COMMON_FUNCTION_RESET, sizeof(*req)); | 1112 | OPCODE_COMMON_FUNCTION_RESET, sizeof(*req)); |
1037 | 1113 | ||
1038 | status = be_mbox_notify(adapter); | 1114 | status = be_mbox_notify_wait(adapter); |
1039 | 1115 | ||
1040 | spin_unlock(&adapter->mbox_lock); | 1116 | spin_unlock(&adapter->mbox_lock); |
1041 | return status; | 1117 | return status; |
@@ -1044,13 +1120,17 @@ int be_cmd_reset_function(struct be_adapter *adapter) | |||
1044 | int be_cmd_write_flashrom(struct be_adapter *adapter, struct be_dma_mem *cmd, | 1120 | int be_cmd_write_flashrom(struct be_adapter *adapter, struct be_dma_mem *cmd, |
1045 | u32 flash_type, u32 flash_opcode, u32 buf_size) | 1121 | u32 flash_type, u32 flash_opcode, u32 buf_size) |
1046 | { | 1122 | { |
1047 | struct be_mcc_wrb *wrb = wrb_from_mbox(&adapter->mbox_mem); | 1123 | struct be_mcc_wrb *wrb; |
1048 | struct be_cmd_write_flashrom *req = cmd->va; | 1124 | struct be_cmd_write_flashrom *req = cmd->va; |
1049 | struct be_sge *sge = nonembedded_sgl(wrb); | 1125 | struct be_sge *sge; |
1050 | int status; | 1126 | int status; |
1051 | 1127 | ||
1052 | spin_lock(&adapter->mbox_lock); | 1128 | spin_lock_bh(&adapter->mcc_lock); |
1053 | memset(wrb, 0, sizeof(*wrb)); | 1129 | |
1130 | wrb = wrb_from_mccq(adapter); | ||
1131 | req = embedded_payload(wrb); | ||
1132 | sge = nonembedded_sgl(wrb); | ||
1133 | |||
1054 | be_wrb_hdr_prepare(wrb, cmd->size, false, 1); | 1134 | be_wrb_hdr_prepare(wrb, cmd->size, false, 1); |
1055 | 1135 | ||
1056 | be_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, | 1136 | be_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, |
@@ -1063,8 +1143,8 @@ int be_cmd_write_flashrom(struct be_adapter *adapter, struct be_dma_mem *cmd, | |||
1063 | req->params.op_code = cpu_to_le32(flash_opcode); | 1143 | req->params.op_code = cpu_to_le32(flash_opcode); |
1064 | req->params.data_buf_size = cpu_to_le32(buf_size); | 1144 | req->params.data_buf_size = cpu_to_le32(buf_size); |
1065 | 1145 | ||
1066 | status = be_mbox_notify(adapter); | 1146 | status = be_mcc_notify_wait(adapter); |
1067 | 1147 | ||
1068 | spin_unlock(&adapter->mbox_lock); | 1148 | spin_unlock_bh(&adapter->mcc_lock); |
1069 | return status; | 1149 | return status; |
1070 | } | 1150 | } |