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authorJeff Garzik <jeff@garzik.org>2006-09-13 13:24:59 -0400
committerJeff Garzik <jeff@garzik.org>2006-09-13 13:24:59 -0400
commit6aa20a2235535605db6d6d2bd850298b2fe7f31e (patch)
treedf0b855043407b831d57f2f2c271f8aab48444f4 /drivers/net/au1000_eth.h
parent7a291083225af6e22ffaa46b3d91cfc1a1ccaab4 (diff)
drivers/net: Trim trailing whitespace
Signed-off-by: Jeff Garzik <jeff@garzik.org>
Diffstat (limited to 'drivers/net/au1000_eth.h')
-rw-r--r--drivers/net/au1000_eth.h12
1 files changed, 6 insertions, 6 deletions
diff --git a/drivers/net/au1000_eth.h b/drivers/net/au1000_eth.h
index 41c2f848d2c4..52fe00dd6d24 100644
--- a/drivers/net/au1000_eth.h
+++ b/drivers/net/au1000_eth.h
@@ -23,7 +23,7 @@
23 * 23 *
24 * ######################################################################## 24 * ########################################################################
25 * 25 *
26 * 26 *
27 */ 27 */
28 28
29 29
@@ -40,8 +40,8 @@
40 40
41#define MULTICAST_FILTER_LIMIT 64 41#define MULTICAST_FILTER_LIMIT 64
42 42
43/* 43/*
44 * Data Buffer Descriptor. Data buffers must be aligned on 32 byte 44 * Data Buffer Descriptor. Data buffers must be aligned on 32 byte
45 * boundary for both, receive and transmit. 45 * boundary for both, receive and transmit.
46 */ 46 */
47typedef struct db_dest { 47typedef struct db_dest {
@@ -51,7 +51,7 @@ typedef struct db_dest {
51} db_dest_t; 51} db_dest_t;
52 52
53/* 53/*
54 * The transmit and receive descriptors are memory 54 * The transmit and receive descriptors are memory
55 * mapped registers. 55 * mapped registers.
56 */ 56 */
57typedef struct tx_dma { 57typedef struct tx_dma {
@@ -107,9 +107,9 @@ struct au1000_private {
107 107
108 struct phy_device *phy_dev; 108 struct phy_device *phy_dev;
109 struct mii_bus mii_bus; 109 struct mii_bus mii_bus;
110 110
111 /* These variables are just for quick access to certain regs addresses. */ 111 /* These variables are just for quick access to certain regs addresses. */
112 volatile mac_reg_t *mac; /* mac registers */ 112 volatile mac_reg_t *mac; /* mac registers */
113 volatile u32 *enable; /* address of MAC Enable Register */ 113 volatile u32 *enable; /* address of MAC Enable Register */
114 114
115 u32 vaddr; /* virtual address of rx/tx buffers */ 115 u32 vaddr; /* virtual address of rx/tx buffers */