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authorAndrew Victor <andrew@sanpeople.com>2007-05-03 03:17:15 -0400
committerJeff Garzik <jeff@garzik.org>2007-05-08 01:30:21 -0400
commit6b4aea7352bed6e2fdb59a3fe24ce2b42b31c35a (patch)
tree414331d4c3790883a25a652c864098e650028e86 /drivers/net/arm/at91_ether.h
parent0b45d18643f0a3eab09616b8a1283b013a7417ea (diff)
AT91RM9200 Ethernet: Support additional PHYs
Add support for a number of new PHY's in the AT91RM9200 Ethernet driver. - Teridian 78Q21x3 - SMSC LAN83C185 (Patch from Luca Gamma) - National Semiconductor DP83848 (Patches from Ivan Kuten & Thomas Foldesi) Signed-off-by: Andrew Victor <andrew@sanpeople.com> Signed-off-by: Jeff Garzik <jeff@garzik.org>
Diffstat (limited to 'drivers/net/arm/at91_ether.h')
-rw-r--r--drivers/net/arm/at91_ether.h49
1 files changed, 28 insertions, 21 deletions
diff --git a/drivers/net/arm/at91_ether.h b/drivers/net/arm/at91_ether.h
index b6b665de2ea0..a38fd2d053a6 100644
--- a/drivers/net/arm/at91_ether.h
+++ b/drivers/net/arm/at91_ether.h
@@ -17,39 +17,46 @@
17 17
18 18
19/* Davicom 9161 PHY */ 19/* Davicom 9161 PHY */
20#define MII_DM9161_ID 0x0181b880 20#define MII_DM9161_ID 0x0181b880
21#define MII_DM9161A_ID 0x0181b8a0 21#define MII_DM9161A_ID 0x0181b8a0
22 22#define MII_DSCR_REG 16
23/* Davicom specific registers */ 23#define MII_DSCSR_REG 17
24#define MII_DSCR_REG 16 24#define MII_DSINTR_REG 21
25#define MII_DSCSR_REG 17
26#define MII_DSINTR_REG 21
27 25
28/* Intel LXT971A PHY */ 26/* Intel LXT971A PHY */
29#define MII_LXT971A_ID 0x001378E0 27#define MII_LXT971A_ID 0x001378E0
30 28#define MII_ISINTE_REG 18
31/* Intel specific registers */ 29#define MII_ISINTS_REG 19
32#define MII_ISINTE_REG 18 30#define MII_LEDCTRL_REG 20
33#define MII_ISINTS_REG 19
34#define MII_LEDCTRL_REG 20
35 31
36/* Realtek RTL8201 PHY */ 32/* Realtek RTL8201 PHY */
37#define MII_RTL8201_ID 0x00008200 33#define MII_RTL8201_ID 0x00008200
38 34
39/* Broadcom BCM5221 PHY */ 35/* Broadcom BCM5221 PHY */
40#define MII_BCM5221_ID 0x004061e0 36#define MII_BCM5221_ID 0x004061e0
41 37#define MII_BCMINTR_REG 26
42/* Broadcom specific registers */
43#define MII_BCMINTR_REG 26
44 38
45/* National Semiconductor DP83847 */ 39/* National Semiconductor DP83847 */
46#define MII_DP83847_ID 0x20005c30 40#define MII_DP83847_ID 0x20005c30
41
42/* National Semiconductor DP83848 */
43#define MII_DP83848_ID 0x20005c90
44#define MII_DPPHYSTS_REG 16
45#define MII_DPMICR_REG 17
46#define MII_DPMISR_REG 18
47 47
48/* Altima AC101L PHY */ 48/* Altima AC101L PHY */
49#define MII_AC101L_ID 0x00225520 49#define MII_AC101L_ID 0x00225520
50 50
51/* Micrel KS8721 PHY */ 51/* Micrel KS8721 PHY */
52#define MII_KS8721_ID 0x00221610 52#define MII_KS8721_ID 0x00221610
53
54/* Teridian 78Q2123/78Q2133 */
55#define MII_T78Q21x3_ID 0x000e7230
56#define MII_T78Q21INT_REG 17
57
58/* SMSC LAN83C185 */
59#define MII_LAN83C185_ID 0x0007C0A0
53 60
54/* ........................................................................ */ 61/* ........................................................................ */
55 62