diff options
author | Pekon Gupta <pekon@ti.com> | 2014-05-06 00:11:32 -0400 |
---|---|---|
committer | Brian Norris <computersforpeace@gmail.com> | 2014-05-20 19:35:31 -0400 |
commit | f034d87def51f026b735d1e2877e9387011b2ba3 (patch) | |
tree | 2c89a1214796d309856efbbcfe25372df9fc665d /drivers/mtd | |
parent | 81d46c59550997ae17e441c0327ee92f7ba7dc6f (diff) |
mtd: eLBC NAND: fix subpage write support
As subpage write is enabled by default for all drivers, nand_write_subpage_hwecc
causes a crash if the driver did not register ecc->hwctl or ecc->calculate.
This behavior was introduced in
commit 837a6ba4f3b6d23026674e6af6b6849a4634fff9
"mtd: nand: subpage write support for hardware based ECC schemes".
This fixes a crash by emulating subpage write support by padding sub-page data
with 0xff on either sides to make it full page compatible.
Reported-by: Helmut Schaa <helmut.schaa@googlemail.com>
Tested-by: Helmut Schaa <helmut.schaa@googlemail.com>
Signed-off-by: Pekon Gupta <pekon@ti.com>
Reviewed-by: Scott Wood <scottwood@freescale.com>
Cc: <stable@vger.kernel.org> # 3.10.x+
Signed-off-by: Brian Norris <computersforpeace@gmail.com>
Diffstat (limited to 'drivers/mtd')
-rw-r--r-- | drivers/mtd/nand/fsl_elbc_nand.c | 14 |
1 files changed, 14 insertions, 0 deletions
diff --git a/drivers/mtd/nand/fsl_elbc_nand.c b/drivers/mtd/nand/fsl_elbc_nand.c index ec549cd9849f..545a5c002f09 100644 --- a/drivers/mtd/nand/fsl_elbc_nand.c +++ b/drivers/mtd/nand/fsl_elbc_nand.c | |||
@@ -723,6 +723,19 @@ static int fsl_elbc_write_page(struct mtd_info *mtd, struct nand_chip *chip, | |||
723 | return 0; | 723 | return 0; |
724 | } | 724 | } |
725 | 725 | ||
726 | /* ECC will be calculated automatically, and errors will be detected in | ||
727 | * waitfunc. | ||
728 | */ | ||
729 | static int fsl_elbc_write_subpage(struct mtd_info *mtd, struct nand_chip *chip, | ||
730 | uint32_t offset, uint32_t data_len, | ||
731 | const uint8_t *buf, int oob_required) | ||
732 | { | ||
733 | fsl_elbc_write_buf(mtd, buf, mtd->writesize); | ||
734 | fsl_elbc_write_buf(mtd, chip->oob_poi, mtd->oobsize); | ||
735 | |||
736 | return 0; | ||
737 | } | ||
738 | |||
726 | static int fsl_elbc_chip_init(struct fsl_elbc_mtd *priv) | 739 | static int fsl_elbc_chip_init(struct fsl_elbc_mtd *priv) |
727 | { | 740 | { |
728 | struct fsl_lbc_ctrl *ctrl = priv->ctrl; | 741 | struct fsl_lbc_ctrl *ctrl = priv->ctrl; |
@@ -761,6 +774,7 @@ static int fsl_elbc_chip_init(struct fsl_elbc_mtd *priv) | |||
761 | 774 | ||
762 | chip->ecc.read_page = fsl_elbc_read_page; | 775 | chip->ecc.read_page = fsl_elbc_read_page; |
763 | chip->ecc.write_page = fsl_elbc_write_page; | 776 | chip->ecc.write_page = fsl_elbc_write_page; |
777 | chip->ecc.write_subpage = fsl_elbc_write_subpage; | ||
764 | 778 | ||
765 | /* If CS Base Register selects full hardware ECC then use it */ | 779 | /* If CS Base Register selects full hardware ECC then use it */ |
766 | if ((in_be32(&lbc->bank[priv->bank].br) & BR_DECC) == | 780 | if ((in_be32(&lbc->bank[priv->bank].br) & BR_DECC) == |