diff options
author | Huang Shijie <b32955@freescale.com> | 2013-10-18 02:20:53 -0400 |
---|---|---|
committer | Brian Norris <computersforpeace@gmail.com> | 2013-11-07 03:08:56 -0500 |
commit | 97de79e02d5e85b4a147b74cc2947b8613d806f7 (patch) | |
tree | 7b357da4333869e941b1f7f8293ce972c6226daf /drivers/mtd | |
parent | b1eb234fb38dd1b6fb86969bf8f27348e4ec4c74 (diff) |
mtd: nand: use a local variable to simplify the nand_scan_tail
There are too many "chip->ecc" in the nand_scan_tail() which makes the eyes
sore.
This patch uses a local variable "ecc" to replace the "chip->ecc" to
make the code more graceful.
Do the code change with "s/chip->ecc\./ecc->/g" in the nand_scan_tail,
and also change some lines by hand.
Signed-off-by: Huang Shijie <b32955@freescale.com>
Signed-off-by: Brian Norris <computersforpeace@gmail.com>
Diffstat (limited to 'drivers/mtd')
-rw-r--r-- | drivers/mtd/nand/nand_base.c | 213 |
1 files changed, 104 insertions, 109 deletions
diff --git a/drivers/mtd/nand/nand_base.c b/drivers/mtd/nand/nand_base.c index ec1db1e19c05..bd39f7b67906 100644 --- a/drivers/mtd/nand/nand_base.c +++ b/drivers/mtd/nand/nand_base.c | |||
@@ -3558,6 +3558,7 @@ int nand_scan_tail(struct mtd_info *mtd) | |||
3558 | { | 3558 | { |
3559 | int i; | 3559 | int i; |
3560 | struct nand_chip *chip = mtd->priv; | 3560 | struct nand_chip *chip = mtd->priv; |
3561 | struct nand_ecc_ctrl *ecc = &chip->ecc; | ||
3561 | 3562 | ||
3562 | /* New bad blocks should be marked in OOB, flash-based BBT, or both */ | 3563 | /* New bad blocks should be marked in OOB, flash-based BBT, or both */ |
3563 | BUG_ON((chip->bbt_options & NAND_BBT_NO_OOB_BBM) && | 3564 | BUG_ON((chip->bbt_options & NAND_BBT_NO_OOB_BBM) && |
@@ -3574,19 +3575,19 @@ int nand_scan_tail(struct mtd_info *mtd) | |||
3574 | /* | 3575 | /* |
3575 | * If no default placement scheme is given, select an appropriate one. | 3576 | * If no default placement scheme is given, select an appropriate one. |
3576 | */ | 3577 | */ |
3577 | if (!chip->ecc.layout && (chip->ecc.mode != NAND_ECC_SOFT_BCH)) { | 3578 | if (!ecc->layout && (ecc->mode != NAND_ECC_SOFT_BCH)) { |
3578 | switch (mtd->oobsize) { | 3579 | switch (mtd->oobsize) { |
3579 | case 8: | 3580 | case 8: |
3580 | chip->ecc.layout = &nand_oob_8; | 3581 | ecc->layout = &nand_oob_8; |
3581 | break; | 3582 | break; |
3582 | case 16: | 3583 | case 16: |
3583 | chip->ecc.layout = &nand_oob_16; | 3584 | ecc->layout = &nand_oob_16; |
3584 | break; | 3585 | break; |
3585 | case 64: | 3586 | case 64: |
3586 | chip->ecc.layout = &nand_oob_64; | 3587 | ecc->layout = &nand_oob_64; |
3587 | break; | 3588 | break; |
3588 | case 128: | 3589 | case 128: |
3589 | chip->ecc.layout = &nand_oob_128; | 3590 | ecc->layout = &nand_oob_128; |
3590 | break; | 3591 | break; |
3591 | default: | 3592 | default: |
3592 | pr_warn("No oob scheme defined for oobsize %d\n", | 3593 | pr_warn("No oob scheme defined for oobsize %d\n", |
@@ -3603,64 +3604,62 @@ int nand_scan_tail(struct mtd_info *mtd) | |||
3603 | * selected and we have 256 byte pagesize fallback to software ECC | 3604 | * selected and we have 256 byte pagesize fallback to software ECC |
3604 | */ | 3605 | */ |
3605 | 3606 | ||
3606 | switch (chip->ecc.mode) { | 3607 | switch (ecc->mode) { |
3607 | case NAND_ECC_HW_OOB_FIRST: | 3608 | case NAND_ECC_HW_OOB_FIRST: |
3608 | /* Similar to NAND_ECC_HW, but a separate read_page handle */ | 3609 | /* Similar to NAND_ECC_HW, but a separate read_page handle */ |
3609 | if (!chip->ecc.calculate || !chip->ecc.correct || | 3610 | if (!ecc->calculate || !ecc->correct || !ecc->hwctl) { |
3610 | !chip->ecc.hwctl) { | ||
3611 | pr_warn("No ECC functions supplied; " | 3611 | pr_warn("No ECC functions supplied; " |
3612 | "hardware ECC not possible\n"); | 3612 | "hardware ECC not possible\n"); |
3613 | BUG(); | 3613 | BUG(); |
3614 | } | 3614 | } |
3615 | if (!chip->ecc.read_page) | 3615 | if (!ecc->read_page) |
3616 | chip->ecc.read_page = nand_read_page_hwecc_oob_first; | 3616 | ecc->read_page = nand_read_page_hwecc_oob_first; |
3617 | 3617 | ||
3618 | case NAND_ECC_HW: | 3618 | case NAND_ECC_HW: |
3619 | /* Use standard hwecc read page function? */ | 3619 | /* Use standard hwecc read page function? */ |
3620 | if (!chip->ecc.read_page) | 3620 | if (!ecc->read_page) |
3621 | chip->ecc.read_page = nand_read_page_hwecc; | 3621 | ecc->read_page = nand_read_page_hwecc; |
3622 | if (!chip->ecc.write_page) | 3622 | if (!ecc->write_page) |
3623 | chip->ecc.write_page = nand_write_page_hwecc; | 3623 | ecc->write_page = nand_write_page_hwecc; |
3624 | if (!chip->ecc.read_page_raw) | 3624 | if (!ecc->read_page_raw) |
3625 | chip->ecc.read_page_raw = nand_read_page_raw; | 3625 | ecc->read_page_raw = nand_read_page_raw; |
3626 | if (!chip->ecc.write_page_raw) | 3626 | if (!ecc->write_page_raw) |
3627 | chip->ecc.write_page_raw = nand_write_page_raw; | 3627 | ecc->write_page_raw = nand_write_page_raw; |
3628 | if (!chip->ecc.read_oob) | 3628 | if (!ecc->read_oob) |
3629 | chip->ecc.read_oob = nand_read_oob_std; | 3629 | ecc->read_oob = nand_read_oob_std; |
3630 | if (!chip->ecc.write_oob) | 3630 | if (!ecc->write_oob) |
3631 | chip->ecc.write_oob = nand_write_oob_std; | 3631 | ecc->write_oob = nand_write_oob_std; |
3632 | if (!chip->ecc.read_subpage) | 3632 | if (!ecc->read_subpage) |
3633 | chip->ecc.read_subpage = nand_read_subpage; | 3633 | ecc->read_subpage = nand_read_subpage; |
3634 | if (!chip->ecc.write_subpage) | 3634 | if (!ecc->write_subpage) |
3635 | chip->ecc.write_subpage = nand_write_subpage_hwecc; | 3635 | ecc->write_subpage = nand_write_subpage_hwecc; |
3636 | 3636 | ||
3637 | case NAND_ECC_HW_SYNDROME: | 3637 | case NAND_ECC_HW_SYNDROME: |
3638 | if ((!chip->ecc.calculate || !chip->ecc.correct || | 3638 | if ((!ecc->calculate || !ecc->correct || !ecc->hwctl) && |
3639 | !chip->ecc.hwctl) && | 3639 | (!ecc->read_page || |
3640 | (!chip->ecc.read_page || | 3640 | ecc->read_page == nand_read_page_hwecc || |
3641 | chip->ecc.read_page == nand_read_page_hwecc || | 3641 | !ecc->write_page || |
3642 | !chip->ecc.write_page || | 3642 | ecc->write_page == nand_write_page_hwecc)) { |
3643 | chip->ecc.write_page == nand_write_page_hwecc)) { | ||
3644 | pr_warn("No ECC functions supplied; " | 3643 | pr_warn("No ECC functions supplied; " |
3645 | "hardware ECC not possible\n"); | 3644 | "hardware ECC not possible\n"); |
3646 | BUG(); | 3645 | BUG(); |
3647 | } | 3646 | } |
3648 | /* Use standard syndrome read/write page function? */ | 3647 | /* Use standard syndrome read/write page function? */ |
3649 | if (!chip->ecc.read_page) | 3648 | if (!ecc->read_page) |
3650 | chip->ecc.read_page = nand_read_page_syndrome; | 3649 | ecc->read_page = nand_read_page_syndrome; |
3651 | if (!chip->ecc.write_page) | 3650 | if (!ecc->write_page) |
3652 | chip->ecc.write_page = nand_write_page_syndrome; | 3651 | ecc->write_page = nand_write_page_syndrome; |
3653 | if (!chip->ecc.read_page_raw) | 3652 | if (!ecc->read_page_raw) |
3654 | chip->ecc.read_page_raw = nand_read_page_raw_syndrome; | 3653 | ecc->read_page_raw = nand_read_page_raw_syndrome; |
3655 | if (!chip->ecc.write_page_raw) | 3654 | if (!ecc->write_page_raw) |
3656 | chip->ecc.write_page_raw = nand_write_page_raw_syndrome; | 3655 | ecc->write_page_raw = nand_write_page_raw_syndrome; |
3657 | if (!chip->ecc.read_oob) | 3656 | if (!ecc->read_oob) |
3658 | chip->ecc.read_oob = nand_read_oob_syndrome; | 3657 | ecc->read_oob = nand_read_oob_syndrome; |
3659 | if (!chip->ecc.write_oob) | 3658 | if (!ecc->write_oob) |
3660 | chip->ecc.write_oob = nand_write_oob_syndrome; | 3659 | ecc->write_oob = nand_write_oob_syndrome; |
3661 | 3660 | ||
3662 | if (mtd->writesize >= chip->ecc.size) { | 3661 | if (mtd->writesize >= ecc->size) { |
3663 | if (!chip->ecc.strength) { | 3662 | if (!ecc->strength) { |
3664 | pr_warn("Driver must set ecc.strength when using hardware ECC\n"); | 3663 | pr_warn("Driver must set ecc.strength when using hardware ECC\n"); |
3665 | BUG(); | 3664 | BUG(); |
3666 | } | 3665 | } |
@@ -3668,23 +3667,23 @@ int nand_scan_tail(struct mtd_info *mtd) | |||
3668 | } | 3667 | } |
3669 | pr_warn("%d byte HW ECC not possible on " | 3668 | pr_warn("%d byte HW ECC not possible on " |
3670 | "%d byte page size, fallback to SW ECC\n", | 3669 | "%d byte page size, fallback to SW ECC\n", |
3671 | chip->ecc.size, mtd->writesize); | 3670 | ecc->size, mtd->writesize); |
3672 | chip->ecc.mode = NAND_ECC_SOFT; | 3671 | ecc->mode = NAND_ECC_SOFT; |
3673 | 3672 | ||
3674 | case NAND_ECC_SOFT: | 3673 | case NAND_ECC_SOFT: |
3675 | chip->ecc.calculate = nand_calculate_ecc; | 3674 | ecc->calculate = nand_calculate_ecc; |
3676 | chip->ecc.correct = nand_correct_data; | 3675 | ecc->correct = nand_correct_data; |
3677 | chip->ecc.read_page = nand_read_page_swecc; | 3676 | ecc->read_page = nand_read_page_swecc; |
3678 | chip->ecc.read_subpage = nand_read_subpage; | 3677 | ecc->read_subpage = nand_read_subpage; |
3679 | chip->ecc.write_page = nand_write_page_swecc; | 3678 | ecc->write_page = nand_write_page_swecc; |
3680 | chip->ecc.read_page_raw = nand_read_page_raw; | 3679 | ecc->read_page_raw = nand_read_page_raw; |
3681 | chip->ecc.write_page_raw = nand_write_page_raw; | 3680 | ecc->write_page_raw = nand_write_page_raw; |
3682 | chip->ecc.read_oob = nand_read_oob_std; | 3681 | ecc->read_oob = nand_read_oob_std; |
3683 | chip->ecc.write_oob = nand_write_oob_std; | 3682 | ecc->write_oob = nand_write_oob_std; |
3684 | if (!chip->ecc.size) | 3683 | if (!ecc->size) |
3685 | chip->ecc.size = 256; | 3684 | ecc->size = 256; |
3686 | chip->ecc.bytes = 3; | 3685 | ecc->bytes = 3; |
3687 | chip->ecc.strength = 1; | 3686 | ecc->strength = 1; |
3688 | break; | 3687 | break; |
3689 | 3688 | ||
3690 | case NAND_ECC_SOFT_BCH: | 3689 | case NAND_ECC_SOFT_BCH: |
@@ -3692,87 +3691,83 @@ int nand_scan_tail(struct mtd_info *mtd) | |||
3692 | pr_warn("CONFIG_MTD_ECC_BCH not enabled\n"); | 3691 | pr_warn("CONFIG_MTD_ECC_BCH not enabled\n"); |
3693 | BUG(); | 3692 | BUG(); |
3694 | } | 3693 | } |
3695 | chip->ecc.calculate = nand_bch_calculate_ecc; | 3694 | ecc->calculate = nand_bch_calculate_ecc; |
3696 | chip->ecc.correct = nand_bch_correct_data; | 3695 | ecc->correct = nand_bch_correct_data; |
3697 | chip->ecc.read_page = nand_read_page_swecc; | 3696 | ecc->read_page = nand_read_page_swecc; |
3698 | chip->ecc.read_subpage = nand_read_subpage; | 3697 | ecc->read_subpage = nand_read_subpage; |
3699 | chip->ecc.write_page = nand_write_page_swecc; | 3698 | ecc->write_page = nand_write_page_swecc; |
3700 | chip->ecc.read_page_raw = nand_read_page_raw; | 3699 | ecc->read_page_raw = nand_read_page_raw; |
3701 | chip->ecc.write_page_raw = nand_write_page_raw; | 3700 | ecc->write_page_raw = nand_write_page_raw; |
3702 | chip->ecc.read_oob = nand_read_oob_std; | 3701 | ecc->read_oob = nand_read_oob_std; |
3703 | chip->ecc.write_oob = nand_write_oob_std; | 3702 | ecc->write_oob = nand_write_oob_std; |
3704 | /* | 3703 | /* |
3705 | * Board driver should supply ecc.size and ecc.bytes values to | 3704 | * Board driver should supply ecc.size and ecc.bytes values to |
3706 | * select how many bits are correctable; see nand_bch_init() | 3705 | * select how many bits are correctable; see nand_bch_init() |
3707 | * for details. Otherwise, default to 4 bits for large page | 3706 | * for details. Otherwise, default to 4 bits for large page |
3708 | * devices. | 3707 | * devices. |
3709 | */ | 3708 | */ |
3710 | if (!chip->ecc.size && (mtd->oobsize >= 64)) { | 3709 | if (!ecc->size && (mtd->oobsize >= 64)) { |
3711 | chip->ecc.size = 512; | 3710 | ecc->size = 512; |
3712 | chip->ecc.bytes = 7; | 3711 | ecc->bytes = 7; |
3713 | } | 3712 | } |
3714 | chip->ecc.priv = nand_bch_init(mtd, | 3713 | ecc->priv = nand_bch_init(mtd, ecc->size, ecc->bytes, |
3715 | chip->ecc.size, | 3714 | &ecc->layout); |
3716 | chip->ecc.bytes, | 3715 | if (!ecc->priv) { |
3717 | &chip->ecc.layout); | ||
3718 | if (!chip->ecc.priv) { | ||
3719 | pr_warn("BCH ECC initialization failed!\n"); | 3716 | pr_warn("BCH ECC initialization failed!\n"); |
3720 | BUG(); | 3717 | BUG(); |
3721 | } | 3718 | } |
3722 | chip->ecc.strength = | 3719 | ecc->strength = ecc->bytes * 8 / fls(8 * ecc->size); |
3723 | chip->ecc.bytes * 8 / fls(8 * chip->ecc.size); | ||
3724 | break; | 3720 | break; |
3725 | 3721 | ||
3726 | case NAND_ECC_NONE: | 3722 | case NAND_ECC_NONE: |
3727 | pr_warn("NAND_ECC_NONE selected by board driver. " | 3723 | pr_warn("NAND_ECC_NONE selected by board driver. " |
3728 | "This is not recommended!\n"); | 3724 | "This is not recommended!\n"); |
3729 | chip->ecc.read_page = nand_read_page_raw; | 3725 | ecc->read_page = nand_read_page_raw; |
3730 | chip->ecc.write_page = nand_write_page_raw; | 3726 | ecc->write_page = nand_write_page_raw; |
3731 | chip->ecc.read_oob = nand_read_oob_std; | 3727 | ecc->read_oob = nand_read_oob_std; |
3732 | chip->ecc.read_page_raw = nand_read_page_raw; | 3728 | ecc->read_page_raw = nand_read_page_raw; |
3733 | chip->ecc.write_page_raw = nand_write_page_raw; | 3729 | ecc->write_page_raw = nand_write_page_raw; |
3734 | chip->ecc.write_oob = nand_write_oob_std; | 3730 | ecc->write_oob = nand_write_oob_std; |
3735 | chip->ecc.size = mtd->writesize; | 3731 | ecc->size = mtd->writesize; |
3736 | chip->ecc.bytes = 0; | 3732 | ecc->bytes = 0; |
3737 | chip->ecc.strength = 0; | 3733 | ecc->strength = 0; |
3738 | break; | 3734 | break; |
3739 | 3735 | ||
3740 | default: | 3736 | default: |
3741 | pr_warn("Invalid NAND_ECC_MODE %d\n", chip->ecc.mode); | 3737 | pr_warn("Invalid NAND_ECC_MODE %d\n", ecc->mode); |
3742 | BUG(); | 3738 | BUG(); |
3743 | } | 3739 | } |
3744 | 3740 | ||
3745 | /* For many systems, the standard OOB write also works for raw */ | 3741 | /* For many systems, the standard OOB write also works for raw */ |
3746 | if (!chip->ecc.read_oob_raw) | 3742 | if (!ecc->read_oob_raw) |
3747 | chip->ecc.read_oob_raw = chip->ecc.read_oob; | 3743 | ecc->read_oob_raw = ecc->read_oob; |
3748 | if (!chip->ecc.write_oob_raw) | 3744 | if (!ecc->write_oob_raw) |
3749 | chip->ecc.write_oob_raw = chip->ecc.write_oob; | 3745 | ecc->write_oob_raw = ecc->write_oob; |
3750 | 3746 | ||
3751 | /* | 3747 | /* |
3752 | * The number of bytes available for a client to place data into | 3748 | * The number of bytes available for a client to place data into |
3753 | * the out of band area. | 3749 | * the out of band area. |
3754 | */ | 3750 | */ |
3755 | chip->ecc.layout->oobavail = 0; | 3751 | ecc->layout->oobavail = 0; |
3756 | for (i = 0; chip->ecc.layout->oobfree[i].length | 3752 | for (i = 0; ecc->layout->oobfree[i].length |
3757 | && i < ARRAY_SIZE(chip->ecc.layout->oobfree); i++) | 3753 | && i < ARRAY_SIZE(ecc->layout->oobfree); i++) |
3758 | chip->ecc.layout->oobavail += | 3754 | ecc->layout->oobavail += ecc->layout->oobfree[i].length; |
3759 | chip->ecc.layout->oobfree[i].length; | 3755 | mtd->oobavail = ecc->layout->oobavail; |
3760 | mtd->oobavail = chip->ecc.layout->oobavail; | ||
3761 | 3756 | ||
3762 | /* | 3757 | /* |
3763 | * Set the number of read / write steps for one page depending on ECC | 3758 | * Set the number of read / write steps for one page depending on ECC |
3764 | * mode. | 3759 | * mode. |
3765 | */ | 3760 | */ |
3766 | chip->ecc.steps = mtd->writesize / chip->ecc.size; | 3761 | ecc->steps = mtd->writesize / ecc->size; |
3767 | if (chip->ecc.steps * chip->ecc.size != mtd->writesize) { | 3762 | if (ecc->steps * ecc->size != mtd->writesize) { |
3768 | pr_warn("Invalid ECC parameters\n"); | 3763 | pr_warn("Invalid ECC parameters\n"); |
3769 | BUG(); | 3764 | BUG(); |
3770 | } | 3765 | } |
3771 | chip->ecc.total = chip->ecc.steps * chip->ecc.bytes; | 3766 | ecc->total = ecc->steps * ecc->bytes; |
3772 | 3767 | ||
3773 | /* Allow subpage writes up to ecc.steps. Not possible for MLC flash */ | 3768 | /* Allow subpage writes up to ecc.steps. Not possible for MLC flash */ |
3774 | if (!(chip->options & NAND_NO_SUBPAGE_WRITE) && nand_is_slc(chip)) { | 3769 | if (!(chip->options & NAND_NO_SUBPAGE_WRITE) && nand_is_slc(chip)) { |
3775 | switch (chip->ecc.steps) { | 3770 | switch (ecc->steps) { |
3776 | case 2: | 3771 | case 2: |
3777 | mtd->subpage_sft = 1; | 3772 | mtd->subpage_sft = 1; |
3778 | break; | 3773 | break; |
@@ -3792,7 +3787,7 @@ int nand_scan_tail(struct mtd_info *mtd) | |||
3792 | chip->pagebuf = -1; | 3787 | chip->pagebuf = -1; |
3793 | 3788 | ||
3794 | /* Large page NAND with SOFT_ECC should support subpage reads */ | 3789 | /* Large page NAND with SOFT_ECC should support subpage reads */ |
3795 | if ((chip->ecc.mode == NAND_ECC_SOFT) && (chip->page_shift > 9)) | 3790 | if ((ecc->mode == NAND_ECC_SOFT) && (chip->page_shift > 9)) |
3796 | chip->options |= NAND_SUBPAGE_READ; | 3791 | chip->options |= NAND_SUBPAGE_READ; |
3797 | 3792 | ||
3798 | /* Fill in remaining MTD driver data */ | 3793 | /* Fill in remaining MTD driver data */ |
@@ -3817,9 +3812,9 @@ int nand_scan_tail(struct mtd_info *mtd) | |||
3817 | mtd->writebufsize = mtd->writesize; | 3812 | mtd->writebufsize = mtd->writesize; |
3818 | 3813 | ||
3819 | /* propagate ecc info to mtd_info */ | 3814 | /* propagate ecc info to mtd_info */ |
3820 | mtd->ecclayout = chip->ecc.layout; | 3815 | mtd->ecclayout = ecc->layout; |
3821 | mtd->ecc_strength = chip->ecc.strength; | 3816 | mtd->ecc_strength = ecc->strength; |
3822 | mtd->ecc_step_size = chip->ecc.size; | 3817 | mtd->ecc_step_size = ecc->size; |
3823 | /* | 3818 | /* |
3824 | * Initialize bitflip_threshold to its default prior scan_bbt() call. | 3819 | * Initialize bitflip_threshold to its default prior scan_bbt() call. |
3825 | * scan_bbt() might invoke mtd_read(), thus bitflip_threshold must be | 3820 | * scan_bbt() might invoke mtd_read(), thus bitflip_threshold must be |