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authorDavid Woodhouse <dwmw2@infradead.org>2007-10-06 14:59:32 -0400
committerDavid Woodhouse <dwmw2@infradead.org>2007-10-06 14:59:32 -0400
commit1fcf8ce51e7acc4b66904c4e159690c9467606b5 (patch)
tree952df20913bb20ccf42a50e57e1286aafa80e9ea /drivers/mtd
parent06ed24e5773346eb13579a4ae9599502bc78e4f7 (diff)
[MTD] [NAND] Resume method for CAFÉ NAND controller
Originally from Marcelo; modified to put the original timing registers back instead of 0xFFFFFFFF. Signed-off-by: David Woodhouse <dwmw2@infradead.org>
Diffstat (limited to 'drivers/mtd')
-rw-r--r--drivers/mtd/nand/cafe_nand.c42
1 files changed, 39 insertions, 3 deletions
diff --git a/drivers/mtd/nand/cafe_nand.c b/drivers/mtd/nand/cafe_nand.c
index 0b3f840b6cbe..e2832d0b9899 100644
--- a/drivers/mtd/nand/cafe_nand.c
+++ b/drivers/mtd/nand/cafe_nand.c
@@ -827,15 +827,51 @@ static struct pci_device_id cafe_nand_tbl[] = {
827 827
828MODULE_DEVICE_TABLE(pci, cafe_nand_tbl); 828MODULE_DEVICE_TABLE(pci, cafe_nand_tbl);
829 829
830static int cafe_nand_resume(struct pci_dev *pdev)
831{
832 uint32_t ctrl;
833 struct mtd_info *mtd = pci_get_drvdata(pdev);
834 struct cafe_priv *cafe = mtd->priv;
835
836 /* Start off by resetting the NAND controller completely */
837 cafe_writel(cafe, 1, NAND_RESET);
838 cafe_writel(cafe, 0, NAND_RESET);
839 cafe_writel(cafe, 0xffffffff, NAND_IRQ_MASK);
840
841 /* Restore timing configuration */
842 cafe_writel(cafe, timing[0], NAND_TIMING1);
843 cafe_writel(cafe, timing[1], NAND_TIMING2);
844 cafe_writel(cafe, timing[2], NAND_TIMING3);
845
846 /* Disable master reset, enable NAND clock */
847 ctrl = cafe_readl(cafe, GLOBAL_CTRL);
848 ctrl &= 0xffffeff0;
849 ctrl |= 0x00007000;
850 cafe_writel(cafe, ctrl | 0x05, GLOBAL_CTRL);
851 cafe_writel(cafe, ctrl | 0x0a, GLOBAL_CTRL);
852 cafe_writel(cafe, 0, NAND_DMA_CTRL);
853 cafe_writel(cafe, 0x7006, GLOBAL_CTRL);
854 cafe_writel(cafe, 0x700a, GLOBAL_CTRL);
855
856 /* Set up DMA address */
857 cafe_writel(cafe, cafe->dmaaddr & 0xffffffff, NAND_DMA_ADDR0);
858 if (sizeof(cafe->dmaaddr) > 4)
859 /* Shift in two parts to shut the compiler up */
860 cafe_writel(cafe, (cafe->dmaaddr >> 16) >> 16, NAND_DMA_ADDR1);
861 else
862 cafe_writel(cafe, 0, NAND_DMA_ADDR1);
863
864 /* Enable NAND IRQ in global IRQ mask register */
865 cafe_writel(cafe, 0x80000007, GLOBAL_IRQ_MASK);
866 return 0;
867}
868
830static struct pci_driver cafe_nand_pci_driver = { 869static struct pci_driver cafe_nand_pci_driver = {
831 .name = "CAFÉ NAND", 870 .name = "CAFÉ NAND",
832 .id_table = cafe_nand_tbl, 871 .id_table = cafe_nand_tbl,
833 .probe = cafe_nand_probe, 872 .probe = cafe_nand_probe,
834 .remove = __devexit_p(cafe_nand_remove), 873 .remove = __devexit_p(cafe_nand_remove),
835#ifdef CONFIG_PMx
836 .suspend = cafe_nand_suspend,
837 .resume = cafe_nand_resume, 874 .resume = cafe_nand_resume,
838#endif
839}; 875};
840 876
841static int cafe_nand_init(void) 877static int cafe_nand_init(void)