diff options
author | Josh Wu <josh.wu@atmel.com> | 2013-01-23 07:47:12 -0500 |
---|---|---|
committer | Artem Bityutskiy <artem.bityutskiy@linux.intel.com> | 2013-02-12 10:01:02 -0500 |
commit | 84cfbbb85a98c8c89407f108da9d102e5dfe2ae5 (patch) | |
tree | 89e04400380e86c9421be61318796d49084fa679 /drivers/mtd | |
parent | e66b4318f8fc0e12421de6287c557cdd92789010 (diff) |
mtd: at91: atmel_nand: for PMECC, add code to check the ONFI parameter ECC requirement.
This patch will check NAND flash's ecc minimum requirement in ONFI parameter.
1. if pmecc-cap, pmecc-sector-size is set in dts. then use it. Driver will
print out a WARNING if the values are different from ONFI parameters.
2. if pmecc-cap, pmecc-sector-size is not set in dts, then use the value
from ONFI parameters.
* If ONFI ECC parameters are in ONFI extended parameter page, since we are
not support it, so assume the minimum ecc requirement is 2 bits in 512
bytes.
* For non-ONFI support nand flash, also assume the minimum ecc requirement is
2 bits in 512 bytes.
Signed-off-by: Josh Wu <josh.wu@atmel.com>
Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com>
Diffstat (limited to 'drivers/mtd')
-rw-r--r-- | drivers/mtd/nand/atmel_nand.c | 90 |
1 files changed, 87 insertions, 3 deletions
diff --git a/drivers/mtd/nand/atmel_nand.c b/drivers/mtd/nand/atmel_nand.c index f186a371e437..ffcbcca2fd2d 100644 --- a/drivers/mtd/nand/atmel_nand.c +++ b/drivers/mtd/nand/atmel_nand.c | |||
@@ -910,6 +910,84 @@ static void atmel_pmecc_core_init(struct mtd_info *mtd) | |||
910 | pmecc_writel(host->ecc, CTRL, PMECC_CTRL_ENABLE); | 910 | pmecc_writel(host->ecc, CTRL, PMECC_CTRL_ENABLE); |
911 | } | 911 | } |
912 | 912 | ||
913 | /* | ||
914 | * Get ECC requirement in ONFI parameters, returns -1 if ONFI | ||
915 | * parameters is not supported. | ||
916 | * return 0 if success to get the ECC requirement. | ||
917 | */ | ||
918 | static int get_onfi_ecc_param(struct nand_chip *chip, | ||
919 | int *ecc_bits, int *sector_size) | ||
920 | { | ||
921 | *ecc_bits = *sector_size = 0; | ||
922 | |||
923 | if (chip->onfi_params.ecc_bits == 0xff) | ||
924 | /* TODO: the sector_size and ecc_bits need to be find in | ||
925 | * extended ecc parameter, currently we don't support it. | ||
926 | */ | ||
927 | return -1; | ||
928 | |||
929 | *ecc_bits = chip->onfi_params.ecc_bits; | ||
930 | |||
931 | /* The default sector size (ecc codeword size) is 512 */ | ||
932 | *sector_size = 512; | ||
933 | |||
934 | return 0; | ||
935 | } | ||
936 | |||
937 | /* | ||
938 | * Get ecc requirement from ONFI parameters ecc requirement. | ||
939 | * If pmecc-cap, pmecc-sector-size in DTS are not specified, this function | ||
940 | * will set them according to ONFI ecc requirement. Otherwise, use the | ||
941 | * value in DTS file. | ||
942 | * return 0 if success. otherwise return error code. | ||
943 | */ | ||
944 | static int pmecc_choose_ecc(struct atmel_nand_host *host, | ||
945 | int *cap, int *sector_size) | ||
946 | { | ||
947 | /* Get ECC requirement from ONFI parameters */ | ||
948 | *cap = *sector_size = 0; | ||
949 | if (host->nand_chip.onfi_version) { | ||
950 | if (!get_onfi_ecc_param(&host->nand_chip, cap, sector_size)) | ||
951 | dev_info(host->dev, "ONFI params, minimum required ECC: %d bits in %d bytes\n", | ||
952 | *cap, *sector_size); | ||
953 | else | ||
954 | dev_info(host->dev, "NAND chip ECC reqirement is in Extended ONFI parameter, we don't support yet.\n"); | ||
955 | } else { | ||
956 | dev_info(host->dev, "NAND chip is not ONFI compliant, assume ecc_bits is 2 in 512 bytes"); | ||
957 | } | ||
958 | if (*cap == 0 && *sector_size == 0) { | ||
959 | *cap = 2; | ||
960 | *sector_size = 512; | ||
961 | } | ||
962 | |||
963 | /* If dts file doesn't specify then use the one in ONFI parameters */ | ||
964 | if (host->pmecc_corr_cap == 0) { | ||
965 | /* use the most fitable ecc bits (the near bigger one ) */ | ||
966 | if (*cap <= 2) | ||
967 | host->pmecc_corr_cap = 2; | ||
968 | else if (*cap <= 4) | ||
969 | host->pmecc_corr_cap = 4; | ||
970 | else if (*cap < 8) | ||
971 | host->pmecc_corr_cap = 8; | ||
972 | else if (*cap < 12) | ||
973 | host->pmecc_corr_cap = 12; | ||
974 | else if (*cap < 24) | ||
975 | host->pmecc_corr_cap = 24; | ||
976 | else | ||
977 | return -EINVAL; | ||
978 | } | ||
979 | if (host->pmecc_sector_size == 0) { | ||
980 | /* use the most fitable sector size (the near smaller one ) */ | ||
981 | if (*sector_size >= 1024) | ||
982 | host->pmecc_sector_size = 1024; | ||
983 | else if (*sector_size >= 512) | ||
984 | host->pmecc_sector_size = 512; | ||
985 | else | ||
986 | return -EINVAL; | ||
987 | } | ||
988 | return 0; | ||
989 | } | ||
990 | |||
913 | static int __init atmel_pmecc_nand_init_params(struct platform_device *pdev, | 991 | static int __init atmel_pmecc_nand_init_params(struct platform_device *pdev, |
914 | struct atmel_nand_host *host) | 992 | struct atmel_nand_host *host) |
915 | { | 993 | { |
@@ -918,9 +996,15 @@ static int __init atmel_pmecc_nand_init_params(struct platform_device *pdev, | |||
918 | struct resource *regs, *regs_pmerr, *regs_rom; | 996 | struct resource *regs, *regs_pmerr, *regs_rom; |
919 | int cap, sector_size, err_no; | 997 | int cap, sector_size, err_no; |
920 | 998 | ||
921 | if (host->pmecc_corr_cap == 0 || host->pmecc_sector_size == 0) | 999 | err_no = pmecc_choose_ecc(host, &cap, §or_size); |
922 | /* TODO: Should use ONFI ecc parameters. */ | 1000 | if (err_no) { |
923 | return -EINVAL; | 1001 | dev_err(host->dev, "The NAND flash's ECC requirement are not support!"); |
1002 | return err_no; | ||
1003 | } | ||
1004 | |||
1005 | if (cap != host->pmecc_corr_cap || | ||
1006 | sector_size != host->pmecc_sector_size) | ||
1007 | dev_info(host->dev, "WARNING: Be Caution! Using different PMECC parameters from Nand ONFI ECC reqirement.\n"); | ||
924 | 1008 | ||
925 | cap = host->pmecc_corr_cap; | 1009 | cap = host->pmecc_corr_cap; |
926 | sector_size = host->pmecc_sector_size; | 1010 | sector_size = host->pmecc_sector_size; |