diff options
author | White Ding <bpqw@micron.com> | 2014-07-23 12:10:45 -0400 |
---|---|---|
committer | Brian Norris <computersforpeace@gmail.com> | 2014-08-19 14:53:07 -0400 |
commit | 57d3a9a89a0645f3597561e214f8d6852a2c56b4 (patch) | |
tree | 301383669e65312665f6c01820884bdb10ba3ee0 /drivers/mtd | |
parent | 6f3c0f163103fb225c77b73ca17fc4ecea308103 (diff) |
mtd: nand: fix nand_lock/unlock() function
Do nand reset before write protect check.
If we want to check the WP# low or high through STATUS READ and check bit 7,
we must reset the device, other operation (eg.erase/program a locked block) can
also clear the bit 7 of status register.
As we know the status register can be refreshed, if we do some operation to trigger it,
for example if we do erase/program operation to one block that is locked, then READ STATUS,
the bit 7 of READ STATUS will be 0 indicate the device in write protect, then if we do
erase/program operation to another block that is unlocked, the bit 7 of READ STATUS will
be 1 indicate the device is not write protect.
Suppose we checked the bit 7 of READ STATUS is 0 then judge the WP# is low (write protect),
but in this case the WP# maybe high if we do erase/program operation to a locked block,
so we must reset the device if we want to check the WP# low or high through STATUS READ and
check bit 7.
Signed-off-by: White Ding <bpqw@micron.com>
Signed-off-by: Brian Norris <computersforpeace@gmail.com>
Diffstat (limited to 'drivers/mtd')
-rw-r--r-- | drivers/mtd/nand/nand_base.c | 18 |
1 files changed, 18 insertions, 0 deletions
diff --git a/drivers/mtd/nand/nand_base.c b/drivers/mtd/nand/nand_base.c index d8cdf06343fb..1a27c2da29ff 100644 --- a/drivers/mtd/nand/nand_base.c +++ b/drivers/mtd/nand/nand_base.c | |||
@@ -982,6 +982,15 @@ int nand_unlock(struct mtd_info *mtd, loff_t ofs, uint64_t len) | |||
982 | 982 | ||
983 | chip->select_chip(mtd, chipnr); | 983 | chip->select_chip(mtd, chipnr); |
984 | 984 | ||
985 | /* | ||
986 | * Reset the chip. | ||
987 | * If we want to check the WP through READ STATUS and check the bit 7 | ||
988 | * we must reset the chip | ||
989 | * some operation can also clear the bit 7 of status register | ||
990 | * eg. erase/program a locked block | ||
991 | */ | ||
992 | chip->cmdfunc(mtd, NAND_CMD_RESET, -1, -1); | ||
993 | |||
985 | /* Check, if it is write protected */ | 994 | /* Check, if it is write protected */ |
986 | if (nand_check_wp(mtd)) { | 995 | if (nand_check_wp(mtd)) { |
987 | pr_debug("%s: device is write protected!\n", | 996 | pr_debug("%s: device is write protected!\n", |
@@ -1032,6 +1041,15 @@ int nand_lock(struct mtd_info *mtd, loff_t ofs, uint64_t len) | |||
1032 | 1041 | ||
1033 | chip->select_chip(mtd, chipnr); | 1042 | chip->select_chip(mtd, chipnr); |
1034 | 1043 | ||
1044 | /* | ||
1045 | * Reset the chip. | ||
1046 | * If we want to check the WP through READ STATUS and check the bit 7 | ||
1047 | * we must reset the chip | ||
1048 | * some operation can also clear the bit 7 of status register | ||
1049 | * eg. erase/program a locked block | ||
1050 | */ | ||
1051 | chip->cmdfunc(mtd, NAND_CMD_RESET, -1, -1); | ||
1052 | |||
1035 | /* Check, if it is write protected */ | 1053 | /* Check, if it is write protected */ |
1036 | if (nand_check_wp(mtd)) { | 1054 | if (nand_check_wp(mtd)) { |
1037 | pr_debug("%s: device is write protected!\n", | 1055 | pr_debug("%s: device is write protected!\n", |