diff options
author | Alexey Korolev <alexey.korolev@intel.com> | 2006-02-20 21:27:55 -0500 |
---|---|---|
committer | Linus Torvalds <torvalds@g5.osdl.org> | 2006-02-20 23:00:09 -0500 |
commit | d86d43706a27bb87c2873de369f94a10f8758063 (patch) | |
tree | 58b59f28120448b529b76cc24c5076a113e5af08 /drivers/mtd | |
parent | 7d4c8e56109e0799ab9fb644c08a8daf4a026675 (diff) |
[PATCH] cfi_cmdset_0001: fix range for cache invalidation
I found an issue in cfi_cmdset0001.c. It is related to cache region
invalidation in the buffered write procedure.
The code performs cache invalidation from "cmd_addr" to "cmd_adr + len" in
do_write_buffer() while we modify region from "adr" to "adr+len".
This issue affects writes + reads of data by small chunks.
Signed-off-by: Nicolas Pitre <nico@cam.org>
Acked-by: Thomas Gleixner <tglx@linutronix.de>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
Diffstat (limited to 'drivers/mtd')
-rw-r--r-- | drivers/mtd/chips/cfi_cmdset_0001.c | 14 |
1 files changed, 7 insertions, 7 deletions
diff --git a/drivers/mtd/chips/cfi_cmdset_0001.c b/drivers/mtd/chips/cfi_cmdset_0001.c index 69c04945591f..ded2c33f5b85 100644 --- a/drivers/mtd/chips/cfi_cmdset_0001.c +++ b/drivers/mtd/chips/cfi_cmdset_0001.c | |||
@@ -1019,8 +1019,8 @@ static void __xipram xip_udelay(struct map_info *map, struct flchip *chip, | |||
1019 | #define XIP_INVAL_CACHED_RANGE(map, from, size) \ | 1019 | #define XIP_INVAL_CACHED_RANGE(map, from, size) \ |
1020 | INVALIDATE_CACHED_RANGE(map, from, size) | 1020 | INVALIDATE_CACHED_RANGE(map, from, size) |
1021 | 1021 | ||
1022 | #define INVALIDATE_CACHE_UDELAY(map, chip, adr, len, usec) \ | 1022 | #define INVALIDATE_CACHE_UDELAY(map, chip, cmd_adr, adr, len, usec) \ |
1023 | UDELAY(map, chip, adr, usec) | 1023 | UDELAY(map, chip, cmd_adr, usec) |
1024 | 1024 | ||
1025 | /* | 1025 | /* |
1026 | * Extra notes: | 1026 | * Extra notes: |
@@ -1052,7 +1052,7 @@ do { \ | |||
1052 | spin_lock(chip->mutex); \ | 1052 | spin_lock(chip->mutex); \ |
1053 | } while (0) | 1053 | } while (0) |
1054 | 1054 | ||
1055 | #define INVALIDATE_CACHE_UDELAY(map, chip, adr, len, usec) \ | 1055 | #define INVALIDATE_CACHE_UDELAY(map, chip, cmd_adr, adr, len, usec) \ |
1056 | do { \ | 1056 | do { \ |
1057 | spin_unlock(chip->mutex); \ | 1057 | spin_unlock(chip->mutex); \ |
1058 | INVALIDATE_CACHED_RANGE(map, adr, len); \ | 1058 | INVALIDATE_CACHED_RANGE(map, adr, len); \ |
@@ -1284,7 +1284,7 @@ static int __xipram do_write_oneword(struct map_info *map, struct flchip *chip, | |||
1284 | map_write(map, datum, adr); | 1284 | map_write(map, datum, adr); |
1285 | chip->state = mode; | 1285 | chip->state = mode; |
1286 | 1286 | ||
1287 | INVALIDATE_CACHE_UDELAY(map, chip, | 1287 | INVALIDATE_CACHE_UDELAY(map, chip, adr, |
1288 | adr, map_bankwidth(map), | 1288 | adr, map_bankwidth(map), |
1289 | chip->word_write_time); | 1289 | chip->word_write_time); |
1290 | 1290 | ||
@@ -1572,8 +1572,8 @@ static int __xipram do_write_buffer(struct map_info *map, struct flchip *chip, | |||
1572 | map_write(map, CMD(0xd0), cmd_adr); | 1572 | map_write(map, CMD(0xd0), cmd_adr); |
1573 | chip->state = FL_WRITING; | 1573 | chip->state = FL_WRITING; |
1574 | 1574 | ||
1575 | INVALIDATE_CACHE_UDELAY(map, chip, | 1575 | INVALIDATE_CACHE_UDELAY(map, chip, cmd_adr, |
1576 | cmd_adr, len, | 1576 | adr, len, |
1577 | chip->buffer_write_time); | 1577 | chip->buffer_write_time); |
1578 | 1578 | ||
1579 | timeo = jiffies + (HZ/2); | 1579 | timeo = jiffies + (HZ/2); |
@@ -1744,7 +1744,7 @@ static int __xipram do_erase_oneblock(struct map_info *map, struct flchip *chip, | |||
1744 | chip->state = FL_ERASING; | 1744 | chip->state = FL_ERASING; |
1745 | chip->erase_suspended = 0; | 1745 | chip->erase_suspended = 0; |
1746 | 1746 | ||
1747 | INVALIDATE_CACHE_UDELAY(map, chip, | 1747 | INVALIDATE_CACHE_UDELAY(map, chip, adr, |
1748 | adr, len, | 1748 | adr, len, |
1749 | chip->erase_time*1000/2); | 1749 | chip->erase_time*1000/2); |
1750 | 1750 | ||