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authorMichael Hennerich <michael.hennerich@analog.com>2007-10-30 05:08:29 -0400
committerDavid Woodhouse <dwmw2@infradead.org>2007-10-30 08:50:46 -0400
commita25b7fee537ab4dbc6eb301bd455ee8d01b707f6 (patch)
tree3602bacd9c7e3d5451984d7133f59e360f880101 /drivers/mtd
parent3c441baa0365ea7c3be9ee79f03e944289dd37e1 (diff)
[MTD] [NAND] Add Blackfin BF52x support in bf5xx_nand driver
Signed-off-by: Michael Hennerich <michael.hennerich@analog.com> Signed-off-by: Bryan Wu <bryan.wu@analog.com> Signed-off-by: David Woodhouse <dwmw2@infradead.org>
Diffstat (limited to 'drivers/mtd')
-rw-r--r--drivers/mtd/nand/Kconfig2
-rw-r--r--drivers/mtd/nand/bf5xx_nand.c20
2 files changed, 19 insertions, 3 deletions
diff --git a/drivers/mtd/nand/Kconfig b/drivers/mtd/nand/Kconfig
index 246d4512f64b..bf0e9b083d13 100644
--- a/drivers/mtd/nand/Kconfig
+++ b/drivers/mtd/nand/Kconfig
@@ -93,7 +93,7 @@ config MTD_NAND_AU1550
93 93
94config MTD_NAND_BF5XX 94config MTD_NAND_BF5XX
95 tristate "Blackfin on-chip NAND Flash Controller driver" 95 tristate "Blackfin on-chip NAND Flash Controller driver"
96 depends on BF54x && MTD_NAND 96 depends on (BF54x || BF52x) && MTD_NAND
97 help 97 help
98 This enables the Blackfin on-chip NAND flash controller 98 This enables the Blackfin on-chip NAND flash controller
99 99
diff --git a/drivers/mtd/nand/bf5xx_nand.c b/drivers/mtd/nand/bf5xx_nand.c
index 1657ecd74881..542850cd4c37 100644
--- a/drivers/mtd/nand/bf5xx_nand.c
+++ b/drivers/mtd/nand/bf5xx_nand.c
@@ -74,7 +74,22 @@ static int hardware_ecc = 1;
74static int hardware_ecc; 74static int hardware_ecc;
75#endif 75#endif
76 76
77static unsigned short bfin_nfc_pin_req[] = {P_NAND_CE, P_NAND_RB, 0}; 77static unsigned short bfin_nfc_pin_req[] =
78 {P_NAND_CE,
79 P_NAND_RB,
80 P_NAND_D0,
81 P_NAND_D1,
82 P_NAND_D2,
83 P_NAND_D3,
84 P_NAND_D4,
85 P_NAND_D5,
86 P_NAND_D6,
87 P_NAND_D7,
88 P_NAND_WE,
89 P_NAND_RE,
90 P_NAND_CLE,
91 P_NAND_ALE,
92 0};
78 93
79/* 94/*
80 * Data structures for bf5xx nand flash controller driver 95 * Data structures for bf5xx nand flash controller driver
@@ -507,12 +522,13 @@ static int bf5xx_nand_dma_init(struct bf5xx_nand_info *info)
507 522
508 init_completion(&info->dma_completion); 523 init_completion(&info->dma_completion);
509 524
525#ifdef CONFIG_BF54x
510 /* Setup DMAC1 channel mux for NFC which shared with SDH */ 526 /* Setup DMAC1 channel mux for NFC which shared with SDH */
511 val = bfin_read_DMAC1_PERIMUX(); 527 val = bfin_read_DMAC1_PERIMUX();
512 val &= 0xFFFE; 528 val &= 0xFFFE;
513 bfin_write_DMAC1_PERIMUX(val); 529 bfin_write_DMAC1_PERIMUX(val);
514 SSYNC(); 530 SSYNC();
515 531#endif
516 /* Request NFC DMA channel */ 532 /* Request NFC DMA channel */
517 ret = request_dma(CH_NFC, "BF5XX NFC driver"); 533 ret = request_dma(CH_NFC, "BF5XX NFC driver");
518 if (ret < 0) { 534 if (ret < 0) {