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authorHaojian Zhuang <haojian.zhuang@marvell.com>2009-09-10 02:33:30 -0400
committerEric Miao <eric.y.miao@gmail.com>2009-11-30 20:02:41 -0500
commitd3490dfdbc453a16bc7f3cff731c9f7851735ab3 (patch)
tree8384cef1ea03d64a9a280d0ae8b1beecf994fb68 /drivers/mtd
parent346e125967c39fc25263f3071dfc88224ae843f4 (diff)
pxa3xx_nand: add new nand chip support
Support samsung 2GbX8 and 32GbX8 nand flash. Support micron 4GbX8 and 4GbX16 nand flash. Signed-off-by: Haojian Zhuang <haojian.zhuang@marvell.com> Signed-off-by: Eric Miao <eric.y.miao@gmail.com>
Diffstat (limited to 'drivers/mtd')
-rw-r--r--drivers/mtd/nand/pxa3xx_nand.c48
1 files changed, 48 insertions, 0 deletions
diff --git a/drivers/mtd/nand/pxa3xx_nand.c b/drivers/mtd/nand/pxa3xx_nand.c
index 11f32454fc77..7f97d57e8a5e 100644
--- a/drivers/mtd/nand/pxa3xx_nand.c
+++ b/drivers/mtd/nand/pxa3xx_nand.c
@@ -226,6 +226,28 @@ static struct pxa3xx_nand_flash samsung512MbX16 = {
226 .chip_id = 0x46ec, 226 .chip_id = 0x46ec,
227}; 227};
228 228
229static struct pxa3xx_nand_flash samsung2GbX8 = {
230 .timing = &samsung512MbX16_timing,
231 .cmdset = &smallpage_cmdset,
232 .page_per_block = 64,
233 .page_size = 2048,
234 .flash_width = 8,
235 .dfc_width = 8,
236 .num_blocks = 2048,
237 .chip_id = 0xdaec,
238};
239
240static struct pxa3xx_nand_flash samsung32GbX8 = {
241 .timing = &samsung512MbX16_timing,
242 .cmdset = &smallpage_cmdset,
243 .page_per_block = 128,
244 .page_size = 4096,
245 .flash_width = 8,
246 .dfc_width = 8,
247 .num_blocks = 8192,
248 .chip_id = 0xd7ec,
249};
250
229static struct pxa3xx_nand_timing micron_timing = { 251static struct pxa3xx_nand_timing micron_timing = {
230 .tCH = 10, 252 .tCH = 10,
231 .tCS = 25, 253 .tCS = 25,
@@ -260,6 +282,28 @@ static struct pxa3xx_nand_flash micron1GbX16 = {
260 .chip_id = 0xb12c, 282 .chip_id = 0xb12c,
261}; 283};
262 284
285static struct pxa3xx_nand_flash micron4GbX8 = {
286 .timing = &micron_timing,
287 .cmdset = &largepage_cmdset,
288 .page_per_block = 64,
289 .page_size = 2048,
290 .flash_width = 8,
291 .dfc_width = 8,
292 .num_blocks = 4096,
293 .chip_id = 0xdc2c,
294};
295
296static struct pxa3xx_nand_flash micron4GbX16 = {
297 .timing = &micron_timing,
298 .cmdset = &largepage_cmdset,
299 .page_per_block = 64,
300 .page_size = 2048,
301 .flash_width = 16,
302 .dfc_width = 16,
303 .num_blocks = 4096,
304 .chip_id = 0xcc2c,
305};
306
263static struct pxa3xx_nand_timing stm2GbX16_timing = { 307static struct pxa3xx_nand_timing stm2GbX16_timing = {
264 .tCH = 10, 308 .tCH = 10,
265 .tCS = 35, 309 .tCS = 35,
@@ -285,8 +329,12 @@ static struct pxa3xx_nand_flash stm2GbX16 = {
285 329
286static struct pxa3xx_nand_flash *builtin_flash_types[] = { 330static struct pxa3xx_nand_flash *builtin_flash_types[] = {
287 &samsung512MbX16, 331 &samsung512MbX16,
332 &samsung2GbX8,
333 &samsung32GbX8,
288 &micron1GbX8, 334 &micron1GbX8,
289 &micron1GbX16, 335 &micron1GbX16,
336 &micron4GbX8,
337 &micron4GbX16,
290 &stm2GbX16, 338 &stm2GbX16,
291}; 339};
292#endif /* CONFIG_MTD_NAND_PXA3xx_BUILTIN */ 340#endif /* CONFIG_MTD_NAND_PXA3xx_BUILTIN */