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authorHåvard Skinnemoen <haavard.skinnemoen@atmel.com>2008-06-06 12:04:53 -0400
committerDavid Woodhouse <dwmw2@infradead.org>2008-06-07 03:43:00 -0400
commit3c3796cc32b6e53653a5eb868dc959b8c2779db9 (patch)
tree2ff83e14ac5e4b0889f06ad76951972bd4c3db17 /drivers/mtd
parentd4f4c0aa8e36f69e46360b3d3569dc15d6099894 (diff)
[MTD] [NAND] rename at91_nand -> atmel_nand: internal symbols
This is basically s/at91_nand/atmel_nand/g with some manual inspection. Signed-off-by: Håvard Skinnemoen <haavard.skinnemoen@atmel.com> Signed-off-by: David Woodhouse <dwmw2@infradead.org>
Diffstat (limited to 'drivers/mtd')
-rw-r--r--drivers/mtd/nand/atmel_nand.c152
-rw-r--r--drivers/mtd/nand/atmel_nand_ecc.h34
2 files changed, 93 insertions, 93 deletions
diff --git a/drivers/mtd/nand/atmel_nand.c b/drivers/mtd/nand/atmel_nand.c
index 51b703155db6..675a82ca77f5 100644
--- a/drivers/mtd/nand/atmel_nand.c
+++ b/drivers/mtd/nand/atmel_nand.c
@@ -48,9 +48,9 @@
48 48
49/* Register access macros */ 49/* Register access macros */
50#define ecc_readl(add, reg) \ 50#define ecc_readl(add, reg) \
51 __raw_readl(add + AT91_ECC_##reg) 51 __raw_readl(add + ATMEL_ECC_##reg)
52#define ecc_writel(add, reg, value) \ 52#define ecc_writel(add, reg, value) \
53 __raw_writel((value), add + AT91_ECC_##reg) 53 __raw_writel((value), add + ATMEL_ECC_##reg)
54 54
55#include "atmel_nand_ecc.h" /* Hardware ECC registers */ 55#include "atmel_nand_ecc.h" /* Hardware ECC registers */
56 56
@@ -59,7 +59,7 @@
59 * the bytes have to be consecutives to avoid 59 * the bytes have to be consecutives to avoid
60 * several NAND_CMD_RNDOUT during read 60 * several NAND_CMD_RNDOUT during read
61 */ 61 */
62static struct nand_ecclayout at91_oobinfo_large = { 62static struct nand_ecclayout atmel_oobinfo_large = {
63 .eccbytes = 4, 63 .eccbytes = 4,
64 .eccpos = {60, 61, 62, 63}, 64 .eccpos = {60, 61, 62, 63},
65 .oobfree = { 65 .oobfree = {
@@ -72,7 +72,7 @@ static struct nand_ecclayout at91_oobinfo_large = {
72 * the bytes have to be consecutives to avoid 72 * the bytes have to be consecutives to avoid
73 * several NAND_CMD_RNDOUT during read 73 * several NAND_CMD_RNDOUT during read
74 */ 74 */
75static struct nand_ecclayout at91_oobinfo_small = { 75static struct nand_ecclayout atmel_oobinfo_small = {
76 .eccbytes = 4, 76 .eccbytes = 4,
77 .eccpos = {0, 1, 2, 3}, 77 .eccpos = {0, 1, 2, 3},
78 .oobfree = { 78 .oobfree = {
@@ -80,11 +80,11 @@ static struct nand_ecclayout at91_oobinfo_small = {
80 }, 80 },
81}; 81};
82 82
83struct at91_nand_host { 83struct atmel_nand_host {
84 struct nand_chip nand_chip; 84 struct nand_chip nand_chip;
85 struct mtd_info mtd; 85 struct mtd_info mtd;
86 void __iomem *io_base; 86 void __iomem *io_base;
87 struct at91_nand_data *board; 87 struct atmel_nand_data *board;
88 struct device *dev; 88 struct device *dev;
89 void __iomem *ecc; 89 void __iomem *ecc;
90}; 90};
@@ -92,7 +92,7 @@ struct at91_nand_host {
92/* 92/*
93 * Enable NAND. 93 * Enable NAND.
94 */ 94 */
95static void at91_nand_enable(struct at91_nand_host *host) 95static void atmel_nand_enable(struct atmel_nand_host *host)
96{ 96{
97 if (host->board->enable_pin) 97 if (host->board->enable_pin)
98 gpio_set_value(host->board->enable_pin, 0); 98 gpio_set_value(host->board->enable_pin, 0);
@@ -101,7 +101,7 @@ static void at91_nand_enable(struct at91_nand_host *host)
101/* 101/*
102 * Disable NAND. 102 * Disable NAND.
103 */ 103 */
104static void at91_nand_disable(struct at91_nand_host *host) 104static void atmel_nand_disable(struct atmel_nand_host *host)
105{ 105{
106 if (host->board->enable_pin) 106 if (host->board->enable_pin)
107 gpio_set_value(host->board->enable_pin, 1); 107 gpio_set_value(host->board->enable_pin, 1);
@@ -110,16 +110,16 @@ static void at91_nand_disable(struct at91_nand_host *host)
110/* 110/*
111 * Hardware specific access to control-lines 111 * Hardware specific access to control-lines
112 */ 112 */
113static void at91_nand_cmd_ctrl(struct mtd_info *mtd, int cmd, unsigned int ctrl) 113static void atmel_nand_cmd_ctrl(struct mtd_info *mtd, int cmd, unsigned int ctrl)
114{ 114{
115 struct nand_chip *nand_chip = mtd->priv; 115 struct nand_chip *nand_chip = mtd->priv;
116 struct at91_nand_host *host = nand_chip->priv; 116 struct atmel_nand_host *host = nand_chip->priv;
117 117
118 if (ctrl & NAND_CTRL_CHANGE) { 118 if (ctrl & NAND_CTRL_CHANGE) {
119 if (ctrl & NAND_NCE) 119 if (ctrl & NAND_NCE)
120 at91_nand_enable(host); 120 atmel_nand_enable(host);
121 else 121 else
122 at91_nand_disable(host); 122 atmel_nand_disable(host);
123 } 123 }
124 if (cmd == NAND_CMD_NONE) 124 if (cmd == NAND_CMD_NONE)
125 return; 125 return;
@@ -133,10 +133,10 @@ static void at91_nand_cmd_ctrl(struct mtd_info *mtd, int cmd, unsigned int ctrl)
133/* 133/*
134 * Read the Device Ready pin. 134 * Read the Device Ready pin.
135 */ 135 */
136static int at91_nand_device_ready(struct mtd_info *mtd) 136static int atmel_nand_device_ready(struct mtd_info *mtd)
137{ 137{
138 struct nand_chip *nand_chip = mtd->priv; 138 struct nand_chip *nand_chip = mtd->priv;
139 struct at91_nand_host *host = nand_chip->priv; 139 struct atmel_nand_host *host = nand_chip->priv;
140 140
141 return gpio_get_value(host->board->rdy_pin); 141 return gpio_get_value(host->board->rdy_pin);
142} 142}
@@ -144,7 +144,7 @@ static int at91_nand_device_ready(struct mtd_info *mtd)
144/* 144/*
145 * write oob for small pages 145 * write oob for small pages
146 */ 146 */
147static int at91_nand_write_oob_512(struct mtd_info *mtd, 147static int atmel_nand_write_oob_512(struct mtd_info *mtd,
148 struct nand_chip *chip, int page) 148 struct nand_chip *chip, int page)
149{ 149{
150 int chunk = chip->ecc.bytes + chip->ecc.prepad + chip->ecc.postpad; 150 int chunk = chip->ecc.bytes + chip->ecc.prepad + chip->ecc.postpad;
@@ -172,7 +172,7 @@ static int at91_nand_write_oob_512(struct mtd_info *mtd,
172/* 172/*
173 * read oob for small pages 173 * read oob for small pages
174 */ 174 */
175static int at91_nand_read_oob_512(struct mtd_info *mtd, 175static int atmel_nand_read_oob_512(struct mtd_info *mtd,
176 struct nand_chip *chip, int page, int sndcmd) 176 struct nand_chip *chip, int page, int sndcmd)
177{ 177{
178 if (sndcmd) { 178 if (sndcmd) {
@@ -192,11 +192,11 @@ static int at91_nand_read_oob_512(struct mtd_info *mtd,
192 * dat: raw data (unused) 192 * dat: raw data (unused)
193 * ecc_code: buffer for ECC 193 * ecc_code: buffer for ECC
194 */ 194 */
195static int at91_nand_calculate(struct mtd_info *mtd, 195static int atmel_nand_calculate(struct mtd_info *mtd,
196 const u_char *dat, unsigned char *ecc_code) 196 const u_char *dat, unsigned char *ecc_code)
197{ 197{
198 struct nand_chip *nand_chip = mtd->priv; 198 struct nand_chip *nand_chip = mtd->priv;
199 struct at91_nand_host *host = nand_chip->priv; 199 struct atmel_nand_host *host = nand_chip->priv;
200 uint32_t *eccpos = nand_chip->ecc.layout->eccpos; 200 uint32_t *eccpos = nand_chip->ecc.layout->eccpos;
201 unsigned int ecc_value; 201 unsigned int ecc_value;
202 202
@@ -207,7 +207,7 @@ static int at91_nand_calculate(struct mtd_info *mtd,
207 ecc_code[eccpos[1]] = (ecc_value >> 8) & 0xFF; 207 ecc_code[eccpos[1]] = (ecc_value >> 8) & 0xFF;
208 208
209 /* get the last 2 ECC bytes */ 209 /* get the last 2 ECC bytes */
210 ecc_value = ecc_readl(host->ecc, NPR) & AT91_ECC_NPARITY; 210 ecc_value = ecc_readl(host->ecc, NPR) & ATMEL_ECC_NPARITY;
211 211
212 ecc_code[eccpos[2]] = ecc_value & 0xFF; 212 ecc_code[eccpos[2]] = ecc_value & 0xFF;
213 ecc_code[eccpos[3]] = (ecc_value >> 8) & 0xFF; 213 ecc_code[eccpos[3]] = (ecc_value >> 8) & 0xFF;
@@ -222,7 +222,7 @@ static int at91_nand_calculate(struct mtd_info *mtd,
222 * chip: nand chip info structure 222 * chip: nand chip info structure
223 * buf: buffer to store read data 223 * buf: buffer to store read data
224 */ 224 */
225static int at91_nand_read_page(struct mtd_info *mtd, 225static int atmel_nand_read_page(struct mtd_info *mtd,
226 struct nand_chip *chip, uint8_t *buf) 226 struct nand_chip *chip, uint8_t *buf)
227{ 227{
228 int eccsize = chip->ecc.size; 228 int eccsize = chip->ecc.size;
@@ -281,11 +281,11 @@ static int at91_nand_read_page(struct mtd_info *mtd,
281 * 281 *
282 * Detect and correct a 1 bit error for a page 282 * Detect and correct a 1 bit error for a page
283 */ 283 */
284static int at91_nand_correct(struct mtd_info *mtd, u_char *dat, 284static int atmel_nand_correct(struct mtd_info *mtd, u_char *dat,
285 u_char *read_ecc, u_char *isnull) 285 u_char *read_ecc, u_char *isnull)
286{ 286{
287 struct nand_chip *nand_chip = mtd->priv; 287 struct nand_chip *nand_chip = mtd->priv;
288 struct at91_nand_host *host = nand_chip->priv; 288 struct atmel_nand_host *host = nand_chip->priv;
289 unsigned int ecc_status; 289 unsigned int ecc_status;
290 unsigned int ecc_word, ecc_bit; 290 unsigned int ecc_word, ecc_bit;
291 291
@@ -293,43 +293,43 @@ static int at91_nand_correct(struct mtd_info *mtd, u_char *dat,
293 ecc_status = ecc_readl(host->ecc, SR); 293 ecc_status = ecc_readl(host->ecc, SR);
294 294
295 /* if there's no error */ 295 /* if there's no error */
296 if (likely(!(ecc_status & AT91_ECC_RECERR))) 296 if (likely(!(ecc_status & ATMEL_ECC_RECERR)))
297 return 0; 297 return 0;
298 298
299 /* get error bit offset (4 bits) */ 299 /* get error bit offset (4 bits) */
300 ecc_bit = ecc_readl(host->ecc, PR) & AT91_ECC_BITADDR; 300 ecc_bit = ecc_readl(host->ecc, PR) & ATMEL_ECC_BITADDR;
301 /* get word address (12 bits) */ 301 /* get word address (12 bits) */
302 ecc_word = ecc_readl(host->ecc, PR) & AT91_ECC_WORDADDR; 302 ecc_word = ecc_readl(host->ecc, PR) & ATMEL_ECC_WORDADDR;
303 ecc_word >>= 4; 303 ecc_word >>= 4;
304 304
305 /* if there are multiple errors */ 305 /* if there are multiple errors */
306 if (ecc_status & AT91_ECC_MULERR) { 306 if (ecc_status & ATMEL_ECC_MULERR) {
307 /* check if it is a freshly erased block 307 /* check if it is a freshly erased block
308 * (filled with 0xff) */ 308 * (filled with 0xff) */
309 if ((ecc_bit == AT91_ECC_BITADDR) 309 if ((ecc_bit == ATMEL_ECC_BITADDR)
310 && (ecc_word == (AT91_ECC_WORDADDR >> 4))) { 310 && (ecc_word == (ATMEL_ECC_WORDADDR >> 4))) {
311 /* the block has just been erased, return OK */ 311 /* the block has just been erased, return OK */
312 return 0; 312 return 0;
313 } 313 }
314 /* it doesn't seems to be a freshly 314 /* it doesn't seems to be a freshly
315 * erased block. 315 * erased block.
316 * We can't correct so many errors */ 316 * We can't correct so many errors */
317 dev_dbg(host->dev, "at91_nand : multiple errors detected." 317 dev_dbg(host->dev, "atmel_nand : multiple errors detected."
318 " Unable to correct.\n"); 318 " Unable to correct.\n");
319 return -EIO; 319 return -EIO;
320 } 320 }
321 321
322 /* if there's a single bit error : we can correct it */ 322 /* if there's a single bit error : we can correct it */
323 if (ecc_status & AT91_ECC_ECCERR) { 323 if (ecc_status & ATMEL_ECC_ECCERR) {
324 /* there's nothing much to do here. 324 /* there's nothing much to do here.
325 * the bit error is on the ECC itself. 325 * the bit error is on the ECC itself.
326 */ 326 */
327 dev_dbg(host->dev, "at91_nand : one bit error on ECC code." 327 dev_dbg(host->dev, "atmel_nand : one bit error on ECC code."
328 " Nothing to correct\n"); 328 " Nothing to correct\n");
329 return 0; 329 return 0;
330 } 330 }
331 331
332 dev_dbg(host->dev, "at91_nand : one bit error on data." 332 dev_dbg(host->dev, "atmel_nand : one bit error on data."
333 " (word offset in the page :" 333 " (word offset in the page :"
334 " 0x%x bit offset : 0x%x)\n", 334 " 0x%x bit offset : 0x%x)\n",
335 ecc_word, ecc_bit); 335 ecc_word, ecc_bit);
@@ -341,14 +341,14 @@ static int at91_nand_correct(struct mtd_info *mtd, u_char *dat,
341 /* 8 bits words */ 341 /* 8 bits words */
342 dat[ecc_word] ^= (1 << ecc_bit); 342 dat[ecc_word] ^= (1 << ecc_bit);
343 } 343 }
344 dev_dbg(host->dev, "at91_nand : error corrected\n"); 344 dev_dbg(host->dev, "atmel_nand : error corrected\n");
345 return 1; 345 return 1;
346} 346}
347 347
348/* 348/*
349 * Enable HW ECC : unsused 349 * Enable HW ECC : unsused
350 */ 350 */
351static void at91_nand_hwctl(struct mtd_info *mtd, int mode) { ; } 351static void atmel_nand_hwctl(struct mtd_info *mtd, int mode) { ; }
352 352
353#ifdef CONFIG_MTD_PARTITIONS 353#ifdef CONFIG_MTD_PARTITIONS
354static const char *part_probes[] = { "cmdlinepart", NULL }; 354static const char *part_probes[] = { "cmdlinepart", NULL };
@@ -357,9 +357,9 @@ static const char *part_probes[] = { "cmdlinepart", NULL };
357/* 357/*
358 * Probe for the NAND device. 358 * Probe for the NAND device.
359 */ 359 */
360static int __init at91_nand_probe(struct platform_device *pdev) 360static int __init atmel_nand_probe(struct platform_device *pdev)
361{ 361{
362 struct at91_nand_host *host; 362 struct atmel_nand_host *host;
363 struct mtd_info *mtd; 363 struct mtd_info *mtd;
364 struct nand_chip *nand_chip; 364 struct nand_chip *nand_chip;
365 struct resource *regs; 365 struct resource *regs;
@@ -372,21 +372,21 @@ static int __init at91_nand_probe(struct platform_device *pdev)
372#endif 372#endif
373 373
374 /* Allocate memory for the device structure (and zero it) */ 374 /* Allocate memory for the device structure (and zero it) */
375 host = kzalloc(sizeof(struct at91_nand_host), GFP_KERNEL); 375 host = kzalloc(sizeof(struct atmel_nand_host), GFP_KERNEL);
376 if (!host) { 376 if (!host) {
377 printk(KERN_ERR "at91_nand: failed to allocate device structure.\n"); 377 printk(KERN_ERR "atmel_nand: failed to allocate device structure.\n");
378 return -ENOMEM; 378 return -ENOMEM;
379 } 379 }
380 380
381 mem = platform_get_resource(pdev, IORESOURCE_MEM, 0); 381 mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
382 if (!mem) { 382 if (!mem) {
383 printk(KERN_ERR "at91_nand: can't get I/O resource mem\n"); 383 printk(KERN_ERR "atmel_nand: can't get I/O resource mem\n");
384 return -ENXIO; 384 return -ENXIO;
385 } 385 }
386 386
387 host->io_base = ioremap(mem->start, mem->end - mem->start + 1); 387 host->io_base = ioremap(mem->start, mem->end - mem->start + 1);
388 if (host->io_base == NULL) { 388 if (host->io_base == NULL) {
389 printk(KERN_ERR "at91_nand: ioremap failed\n"); 389 printk(KERN_ERR "atmel_nand: ioremap failed\n");
390 kfree(host); 390 kfree(host);
391 return -EIO; 391 return -EIO;
392 } 392 }
@@ -403,14 +403,14 @@ static int __init at91_nand_probe(struct platform_device *pdev)
403 /* Set address of NAND IO lines */ 403 /* Set address of NAND IO lines */
404 nand_chip->IO_ADDR_R = host->io_base; 404 nand_chip->IO_ADDR_R = host->io_base;
405 nand_chip->IO_ADDR_W = host->io_base; 405 nand_chip->IO_ADDR_W = host->io_base;
406 nand_chip->cmd_ctrl = at91_nand_cmd_ctrl; 406 nand_chip->cmd_ctrl = atmel_nand_cmd_ctrl;
407 407
408 if (host->board->rdy_pin) 408 if (host->board->rdy_pin)
409 nand_chip->dev_ready = at91_nand_device_ready; 409 nand_chip->dev_ready = atmel_nand_device_ready;
410 410
411 regs = platform_get_resource(pdev, IORESOURCE_MEM, 1); 411 regs = platform_get_resource(pdev, IORESOURCE_MEM, 1);
412 if (!regs && hard_ecc) { 412 if (!regs && hard_ecc) {
413 printk(KERN_ERR "at91_nand: can't get I/O resource " 413 printk(KERN_ERR "atmel_nand: can't get I/O resource "
414 "regs\nFalling back on software ECC\n"); 414 "regs\nFalling back on software ECC\n");
415 } 415 }
416 416
@@ -420,15 +420,15 @@ static int __init at91_nand_probe(struct platform_device *pdev)
420 if (hard_ecc && regs) { 420 if (hard_ecc && regs) {
421 host->ecc = ioremap(regs->start, regs->end - regs->start + 1); 421 host->ecc = ioremap(regs->start, regs->end - regs->start + 1);
422 if (host->ecc == NULL) { 422 if (host->ecc == NULL) {
423 printk(KERN_ERR "at91_nand: ioremap failed\n"); 423 printk(KERN_ERR "atmel_nand: ioremap failed\n");
424 res = -EIO; 424 res = -EIO;
425 goto err_ecc_ioremap; 425 goto err_ecc_ioremap;
426 } 426 }
427 nand_chip->ecc.mode = NAND_ECC_HW_SYNDROME; 427 nand_chip->ecc.mode = NAND_ECC_HW_SYNDROME;
428 nand_chip->ecc.calculate = at91_nand_calculate; 428 nand_chip->ecc.calculate = atmel_nand_calculate;
429 nand_chip->ecc.correct = at91_nand_correct; 429 nand_chip->ecc.correct = atmel_nand_correct;
430 nand_chip->ecc.hwctl = at91_nand_hwctl; 430 nand_chip->ecc.hwctl = atmel_nand_hwctl;
431 nand_chip->ecc.read_page = at91_nand_read_page; 431 nand_chip->ecc.read_page = atmel_nand_read_page;
432 nand_chip->ecc.bytes = 4; 432 nand_chip->ecc.bytes = 4;
433 nand_chip->ecc.prepad = 0; 433 nand_chip->ecc.prepad = 0;
434 nand_chip->ecc.postpad = 0; 434 nand_chip->ecc.postpad = 0;
@@ -440,7 +440,7 @@ static int __init at91_nand_probe(struct platform_device *pdev)
440 nand_chip->options |= NAND_BUSWIDTH_16; 440 nand_chip->options |= NAND_BUSWIDTH_16;
441 441
442 platform_set_drvdata(pdev, host); 442 platform_set_drvdata(pdev, host);
443 at91_nand_enable(host); 443 atmel_nand_enable(host);
444 444
445 if (host->board->det_pin) { 445 if (host->board->det_pin) {
446 if (gpio_get_value(host->board->det_pin)) { 446 if (gpio_get_value(host->board->det_pin)) {
@@ -463,22 +463,22 @@ static int __init at91_nand_probe(struct platform_device *pdev)
463 /* set ECC page size and oob layout */ 463 /* set ECC page size and oob layout */
464 switch (mtd->writesize) { 464 switch (mtd->writesize) {
465 case 512: 465 case 512:
466 nand_chip->ecc.layout = &at91_oobinfo_small; 466 nand_chip->ecc.layout = &atmel_oobinfo_small;
467 nand_chip->ecc.read_oob = at91_nand_read_oob_512; 467 nand_chip->ecc.read_oob = atmel_nand_read_oob_512;
468 nand_chip->ecc.write_oob = at91_nand_write_oob_512; 468 nand_chip->ecc.write_oob = atmel_nand_write_oob_512;
469 ecc_writel(host->ecc, MR, AT91_ECC_PAGESIZE_528); 469 ecc_writel(host->ecc, MR, ATMEL_ECC_PAGESIZE_528);
470 break; 470 break;
471 case 1024: 471 case 1024:
472 nand_chip->ecc.layout = &at91_oobinfo_large; 472 nand_chip->ecc.layout = &atmel_oobinfo_large;
473 ecc_writel(host->ecc, MR, AT91_ECC_PAGESIZE_1056); 473 ecc_writel(host->ecc, MR, ATMEL_ECC_PAGESIZE_1056);
474 break; 474 break;
475 case 2048: 475 case 2048:
476 nand_chip->ecc.layout = &at91_oobinfo_large; 476 nand_chip->ecc.layout = &atmel_oobinfo_large;
477 ecc_writel(host->ecc, MR, AT91_ECC_PAGESIZE_2112); 477 ecc_writel(host->ecc, MR, ATMEL_ECC_PAGESIZE_2112);
478 break; 478 break;
479 case 4096: 479 case 4096:
480 nand_chip->ecc.layout = &at91_oobinfo_large; 480 nand_chip->ecc.layout = &atmel_oobinfo_large;
481 ecc_writel(host->ecc, MR, AT91_ECC_PAGESIZE_4224); 481 ecc_writel(host->ecc, MR, ATMEL_ECC_PAGESIZE_4224);
482 break; 482 break;
483 default: 483 default:
484 /* page size not handled by HW ECC */ 484 /* page size not handled by HW ECC */
@@ -503,7 +503,7 @@ static int __init at91_nand_probe(struct platform_device *pdev)
503 503
504#ifdef CONFIG_MTD_PARTITIONS 504#ifdef CONFIG_MTD_PARTITIONS
505#ifdef CONFIG_MTD_CMDLINE_PARTS 505#ifdef CONFIG_MTD_CMDLINE_PARTS
506 mtd->name = "at91_nand"; 506 mtd->name = "atmel_nand";
507 num_partitions = parse_mtd_partitions(mtd, part_probes, 507 num_partitions = parse_mtd_partitions(mtd, part_probes,
508 &partitions, 0); 508 &partitions, 0);
509#endif 509#endif
@@ -512,7 +512,7 @@ static int __init at91_nand_probe(struct platform_device *pdev)
512 &num_partitions); 512 &num_partitions);
513 513
514 if ((!partitions) || (num_partitions == 0)) { 514 if ((!partitions) || (num_partitions == 0)) {
515 printk(KERN_ERR "at91_nand: No parititions defined, or unsupported device.\n"); 515 printk(KERN_ERR "atmel_nand: No parititions defined, or unsupported device.\n");
516 res = ENXIO; 516 res = ENXIO;
517 goto release; 517 goto release;
518 } 518 }
@@ -534,7 +534,7 @@ out:
534 iounmap(host->ecc); 534 iounmap(host->ecc);
535 535
536err_ecc_ioremap: 536err_ecc_ioremap:
537 at91_nand_disable(host); 537 atmel_nand_disable(host);
538 platform_set_drvdata(pdev, NULL); 538 platform_set_drvdata(pdev, NULL);
539 iounmap(host->io_base); 539 iounmap(host->io_base);
540 kfree(host); 540 kfree(host);
@@ -544,14 +544,14 @@ err_ecc_ioremap:
544/* 544/*
545 * Remove a NAND device. 545 * Remove a NAND device.
546 */ 546 */
547static int __devexit at91_nand_remove(struct platform_device *pdev) 547static int __devexit atmel_nand_remove(struct platform_device *pdev)
548{ 548{
549 struct at91_nand_host *host = platform_get_drvdata(pdev); 549 struct atmel_nand_host *host = platform_get_drvdata(pdev);
550 struct mtd_info *mtd = &host->mtd; 550 struct mtd_info *mtd = &host->mtd;
551 551
552 nand_release(mtd); 552 nand_release(mtd);
553 553
554 at91_nand_disable(host); 554 atmel_nand_disable(host);
555 555
556 iounmap(host->io_base); 556 iounmap(host->io_base);
557 iounmap(host->ecc); 557 iounmap(host->ecc);
@@ -560,31 +560,31 @@ static int __devexit at91_nand_remove(struct platform_device *pdev)
560 return 0; 560 return 0;
561} 561}
562 562
563static struct platform_driver at91_nand_driver = { 563static struct platform_driver atmel_nand_driver = {
564 .probe = at91_nand_probe, 564 .probe = atmel_nand_probe,
565 .remove = at91_nand_remove, 565 .remove = atmel_nand_remove,
566 .driver = { 566 .driver = {
567 .name = "at91_nand", 567 .name = "atmel_nand",
568 .owner = THIS_MODULE, 568 .owner = THIS_MODULE,
569 }, 569 },
570}; 570};
571 571
572static int __init at91_nand_init(void) 572static int __init atmel_nand_init(void)
573{ 573{
574 return platform_driver_register(&at91_nand_driver); 574 return platform_driver_register(&atmel_nand_driver);
575} 575}
576 576
577 577
578static void __exit at91_nand_exit(void) 578static void __exit atmel_nand_exit(void)
579{ 579{
580 platform_driver_unregister(&at91_nand_driver); 580 platform_driver_unregister(&atmel_nand_driver);
581} 581}
582 582
583 583
584module_init(at91_nand_init); 584module_init(atmel_nand_init);
585module_exit(at91_nand_exit); 585module_exit(atmel_nand_exit);
586 586
587MODULE_LICENSE("GPL"); 587MODULE_LICENSE("GPL");
588MODULE_AUTHOR("Rick Bronson"); 588MODULE_AUTHOR("Rick Bronson");
589MODULE_DESCRIPTION("NAND/SmartMedia driver for AT91 / AVR32"); 589MODULE_DESCRIPTION("NAND/SmartMedia driver for AT91 / AVR32");
590MODULE_ALIAS("platform:at91_nand"); 590MODULE_ALIAS("platform:atmel_nand");
diff --git a/drivers/mtd/nand/atmel_nand_ecc.h b/drivers/mtd/nand/atmel_nand_ecc.h
index 170db869aacf..1ee7f993db1c 100644
--- a/drivers/mtd/nand/atmel_nand_ecc.h
+++ b/drivers/mtd/nand/atmel_nand_ecc.h
@@ -11,26 +11,26 @@
11#ifndef ATMEL_NAND_ECC_H 11#ifndef ATMEL_NAND_ECC_H
12#define ATMEL_NAND_ECC_H 12#define ATMEL_NAND_ECC_H
13 13
14#define AT91_ECC_CR 0x00 /* Control register */ 14#define ATMEL_ECC_CR 0x00 /* Control register */
15#define AT91_ECC_RST (1 << 0) /* Reset parity */ 15#define ATMEL_ECC_RST (1 << 0) /* Reset parity */
16 16
17#define AT91_ECC_MR 0x04 /* Mode register */ 17#define ATMEL_ECC_MR 0x04 /* Mode register */
18#define AT91_ECC_PAGESIZE (3 << 0) /* Page Size */ 18#define ATMEL_ECC_PAGESIZE (3 << 0) /* Page Size */
19#define AT91_ECC_PAGESIZE_528 (0) 19#define ATMEL_ECC_PAGESIZE_528 (0)
20#define AT91_ECC_PAGESIZE_1056 (1) 20#define ATMEL_ECC_PAGESIZE_1056 (1)
21#define AT91_ECC_PAGESIZE_2112 (2) 21#define ATMEL_ECC_PAGESIZE_2112 (2)
22#define AT91_ECC_PAGESIZE_4224 (3) 22#define ATMEL_ECC_PAGESIZE_4224 (3)
23 23
24#define AT91_ECC_SR 0x08 /* Status register */ 24#define ATMEL_ECC_SR 0x08 /* Status register */
25#define AT91_ECC_RECERR (1 << 0) /* Recoverable Error */ 25#define ATMEL_ECC_RECERR (1 << 0) /* Recoverable Error */
26#define AT91_ECC_ECCERR (1 << 1) /* ECC Single Bit Error */ 26#define ATMEL_ECC_ECCERR (1 << 1) /* ECC Single Bit Error */
27#define AT91_ECC_MULERR (1 << 2) /* Multiple Errors */ 27#define ATMEL_ECC_MULERR (1 << 2) /* Multiple Errors */
28 28
29#define AT91_ECC_PR 0x0c /* Parity register */ 29#define ATMEL_ECC_PR 0x0c /* Parity register */
30#define AT91_ECC_BITADDR (0xf << 0) /* Bit Error Address */ 30#define ATMEL_ECC_BITADDR (0xf << 0) /* Bit Error Address */
31#define AT91_ECC_WORDADDR (0xfff << 4) /* Word Error Address */ 31#define ATMEL_ECC_WORDADDR (0xfff << 4) /* Word Error Address */
32 32
33#define AT91_ECC_NPR 0x10 /* NParity register */ 33#define ATMEL_ECC_NPR 0x10 /* NParity register */
34#define AT91_ECC_NPARITY (0xffff << 0) /* NParity */ 34#define ATMEL_ECC_NPARITY (0xffff << 0) /* NParity */
35 35
36#endif 36#endif