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authorDavid Woodhouse <David.Woodhouse@intel.com>2010-05-13 11:12:43 -0400
committerDavid Woodhouse <David.Woodhouse@intel.com>2010-05-13 11:12:45 -0400
commitaadff49c56f921d18cc280cbf087a550c67bbd02 (patch)
treedaedf299c3724c7c5c33343b010fd6a7f00af805 /drivers/mtd
parentce082596ae4308f67f0953a67db508bb085520fa (diff)
mtd/nand: Fix denali build on ppc64
drivers/mtd/nand/denali.c:1427: error: conflicting types for ‘enable_dma’ arch/powerpc/include/asm/dma.h:189: note: previous definition of ‘enable_dma’ was here Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
Diffstat (limited to 'drivers/mtd')
-rw-r--r--drivers/mtd/nand/denali.c22
1 files changed, 11 insertions, 11 deletions
diff --git a/drivers/mtd/nand/denali.c b/drivers/mtd/nand/denali.c
index 8a6ce0dd9537..ca03428b59cc 100644
--- a/drivers/mtd/nand/denali.c
+++ b/drivers/mtd/nand/denali.c
@@ -1424,7 +1424,7 @@ static bool handle_ecc(struct denali_nand_info *denali, uint8_t *buf,
1424} 1424}
1425 1425
1426/* programs the controller to either enable/disable DMA transfers */ 1426/* programs the controller to either enable/disable DMA transfers */
1427static void enable_dma(struct denali_nand_info *denali, bool en) 1427static void denali_enable_dma(struct denali_nand_info *denali, bool en)
1428{ 1428{
1429 uint32_t reg_val = 0x0; 1429 uint32_t reg_val = 0x0;
1430 1430
@@ -1435,7 +1435,7 @@ static void enable_dma(struct denali_nand_info *denali, bool en)
1435} 1435}
1436 1436
1437/* setups the HW to perform the data DMA */ 1437/* setups the HW to perform the data DMA */
1438static void setup_dma(struct denali_nand_info *denali, int op) 1438static void denali_setup_dma(struct denali_nand_info *denali, int op)
1439{ 1439{
1440 uint32_t mode = 0x0; 1440 uint32_t mode = 0x0;
1441 const int page_count = 1; 1441 const int page_count = 1;
@@ -1494,9 +1494,9 @@ static void write_page(struct mtd_info *mtd, struct nand_chip *chip,
1494 pci_dma_sync_single_for_device(pci_dev, addr, size, PCI_DMA_TODEVICE); 1494 pci_dma_sync_single_for_device(pci_dev, addr, size, PCI_DMA_TODEVICE);
1495 1495
1496 clear_interrupts(denali); 1496 clear_interrupts(denali);
1497 enable_dma(denali, true); 1497 denali_enable_dma(denali, true);
1498 1498
1499 setup_dma(denali, DENALI_WRITE); 1499 denali_setup_dma(denali, DENALI_WRITE);
1500 1500
1501 /* wait for operation to complete */ 1501 /* wait for operation to complete */
1502 irq_status = wait_for_irq(denali, irq_mask); 1502 irq_status = wait_for_irq(denali, irq_mask);
@@ -1509,7 +1509,7 @@ static void write_page(struct mtd_info *mtd, struct nand_chip *chip,
1509 PASS; 1509 PASS;
1510 } 1510 }
1511 1511
1512 enable_dma(denali, false); 1512 denali_enable_dma(denali, false);
1513 pci_dma_sync_single_for_cpu(pci_dev, addr, size, PCI_DMA_TODEVICE); 1513 pci_dma_sync_single_for_cpu(pci_dev, addr, size, PCI_DMA_TODEVICE);
1514} 1514}
1515 1515
@@ -1569,11 +1569,11 @@ static int denali_read_page(struct mtd_info *mtd, struct nand_chip *chip,
1569 1569
1570 setup_ecc_for_xfer(denali, true, false); 1570 setup_ecc_for_xfer(denali, true, false);
1571 1571
1572 enable_dma(denali, true); 1572 denali_enable_dma(denali, true);
1573 pci_dma_sync_single_for_device(pci_dev, addr, size, PCI_DMA_FROMDEVICE); 1573 pci_dma_sync_single_for_device(pci_dev, addr, size, PCI_DMA_FROMDEVICE);
1574 1574
1575 clear_interrupts(denali); 1575 clear_interrupts(denali);
1576 setup_dma(denali, DENALI_READ); 1576 denali_setup_dma(denali, DENALI_READ);
1577 1577
1578 /* wait for operation to complete */ 1578 /* wait for operation to complete */
1579 irq_status = wait_for_irq(denali, irq_mask); 1579 irq_status = wait_for_irq(denali, irq_mask);
@@ -1583,7 +1583,7 @@ static int denali_read_page(struct mtd_info *mtd, struct nand_chip *chip,
1583 memcpy(buf, denali->buf.buf, mtd->writesize); 1583 memcpy(buf, denali->buf.buf, mtd->writesize);
1584 1584
1585 check_erased_page = handle_ecc(denali, buf, chip->oob_poi, irq_status); 1585 check_erased_page = handle_ecc(denali, buf, chip->oob_poi, irq_status);
1586 enable_dma(denali, false); 1586 denali_enable_dma(denali, false);
1587 1587
1588 if (check_erased_page) 1588 if (check_erased_page)
1589 { 1589 {
@@ -1618,19 +1618,19 @@ static int denali_read_page_raw(struct mtd_info *mtd, struct nand_chip *chip,
1618 uint32_t irq_mask = INTR_STATUS0__DMA_CMD_COMP; 1618 uint32_t irq_mask = INTR_STATUS0__DMA_CMD_COMP;
1619 1619
1620 setup_ecc_for_xfer(denali, false, true); 1620 setup_ecc_for_xfer(denali, false, true);
1621 enable_dma(denali, true); 1621 denali_enable_dma(denali, true);
1622 1622
1623 pci_dma_sync_single_for_device(pci_dev, addr, size, PCI_DMA_FROMDEVICE); 1623 pci_dma_sync_single_for_device(pci_dev, addr, size, PCI_DMA_FROMDEVICE);
1624 1624
1625 clear_interrupts(denali); 1625 clear_interrupts(denali);
1626 setup_dma(denali, DENALI_READ); 1626 denali_setup_dma(denali, DENALI_READ);
1627 1627
1628 /* wait for operation to complete */ 1628 /* wait for operation to complete */
1629 irq_status = wait_for_irq(denali, irq_mask); 1629 irq_status = wait_for_irq(denali, irq_mask);
1630 1630
1631 pci_dma_sync_single_for_cpu(pci_dev, addr, size, PCI_DMA_FROMDEVICE); 1631 pci_dma_sync_single_for_cpu(pci_dev, addr, size, PCI_DMA_FROMDEVICE);
1632 1632
1633 enable_dma(denali, false); 1633 denali_enable_dma(denali, false);
1634 1634
1635 memcpy(buf, denali->buf.buf, mtd->writesize); 1635 memcpy(buf, denali->buf.buf, mtd->writesize);
1636 memcpy(chip->oob_poi, denali->buf.buf + mtd->writesize, mtd->oobsize); 1636 memcpy(chip->oob_poi, denali->buf.buf + mtd->writesize, mtd->oobsize);