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authorLinus Torvalds <torvalds@linux-foundation.org>2008-08-01 14:29:54 -0400
committerLinus Torvalds <torvalds@linux-foundation.org>2008-08-01 14:29:54 -0400
commit623fa579e61f250c1913c70257ef3a753820bb68 (patch)
tree179fcff4a0469bfa9a9ce5cab14fff6141810cd0 /drivers/mtd
parentd65f5c5803d9cd6fa0b540a0dddf956be671bc36 (diff)
parente4c094a595ba8ea402e6b2153f7bbf6ef039eea0 (diff)
Merge git://git.infradead.org/mtd-2.6
* git://git.infradead.org/mtd-2.6: [MTD] [NAND] drivers/mtd/nand/nandsim.c: fix printk warnings [MTD] [NAND] Blackfin NFC Driver: Cleanup the error exit path of bf5xx_nand_probe function [MTD] [NAND] Blackfin NFC Driver: use standard dev_err() rather than printk() [MTD] [NAND] Blackfin NFC Driver: enable Blackfin nand HWECC support by default [MTD] [NAND] Blackfin NFC Driver: add proper devinit/devexit markings to probe/remove functions [MTD] [NAND] Blackfin NFC Driver: add support for the ECC layout the Blackfin bootrom uses [MTD] [NAND] Blackfin NFC Driver: fix bug - hw ecc calc by making sure we extract 11 bits from each register instead of 10 [MTD] [NAND] Blackfin NFC Driver: fix bug - do not clobber the status from the first 256 bytes if operating on 512 pages [MTD] [NAND] diskonchip.c fix sparse endian warnings [MTD] [NAND] drivers/mtd/nand/nandsim.c needs div64.h [JFFS2] Fix allocation of summary buffer Fix rename of at91_nand -> atmel_nand [MTD] [NOR] drivers/mtd/chips/jedec_probe.c: fix Am29DL800BB device ID [MTD] MTD_DEBUG always does compile-time typechecks [MTD] DataFlash: bugfix, binary page sizes now handled [MTD] [NAND] fsl_elbc_nand.c: fix printk warning [MTD] [NAND] nandsim: support random page read command [MTD] [NAND] fix subpage read for small page NAND
Diffstat (limited to 'drivers/mtd')
-rw-r--r--drivers/mtd/chips/jedec_probe.c2
-rw-r--r--drivers/mtd/devices/mtd_dataflash.c130
-rw-r--r--drivers/mtd/nand/Kconfig13
-rw-r--r--drivers/mtd/nand/bf5xx_nand.c93
-rw-r--r--drivers/mtd/nand/diskonchip.c30
-rw-r--r--drivers/mtd/nand/fsl_elbc_nand.c2
-rw-r--r--drivers/mtd/nand/nandsim.c66
7 files changed, 230 insertions, 106 deletions
diff --git a/drivers/mtd/chips/jedec_probe.c b/drivers/mtd/chips/jedec_probe.c
index dbba5abf0db8..f84ab6182148 100644
--- a/drivers/mtd/chips/jedec_probe.c
+++ b/drivers/mtd/chips/jedec_probe.c
@@ -41,7 +41,7 @@
41 41
42 42
43/* AMD */ 43/* AMD */
44#define AM29DL800BB 0x22C8 44#define AM29DL800BB 0x22CB
45#define AM29DL800BT 0x224A 45#define AM29DL800BT 0x224A
46 46
47#define AM29F800BB 0x2258 47#define AM29F800BB 0x2258
diff --git a/drivers/mtd/devices/mtd_dataflash.c b/drivers/mtd/devices/mtd_dataflash.c
index 54e36bfc2c3b..8bd0dea6885f 100644
--- a/drivers/mtd/devices/mtd_dataflash.c
+++ b/drivers/mtd/devices/mtd_dataflash.c
@@ -15,6 +15,8 @@
15#include <linux/delay.h> 15#include <linux/delay.h>
16#include <linux/device.h> 16#include <linux/device.h>
17#include <linux/mutex.h> 17#include <linux/mutex.h>
18#include <linux/err.h>
19
18#include <linux/spi/spi.h> 20#include <linux/spi/spi.h>
19#include <linux/spi/flash.h> 21#include <linux/spi/flash.h>
20 22
@@ -487,9 +489,8 @@ add_dataflash(struct spi_device *spi, char *name,
487 device->write = dataflash_write; 489 device->write = dataflash_write;
488 device->priv = priv; 490 device->priv = priv;
489 491
490 dev_info(&spi->dev, "%s (%d KBytes) pagesize %d bytes, " 492 dev_info(&spi->dev, "%s (%d KBytes) pagesize %d bytes\n",
491 "erasesize %d bytes\n", name, device->size/1024, 493 name, DIV_ROUND_UP(device->size, 1024), pagesize);
492 pagesize, pagesize * 8); /* 8 pages = 1 block */
493 dev_set_drvdata(&spi->dev, priv); 494 dev_set_drvdata(&spi->dev, priv);
494 495
495 if (mtd_has_partitions()) { 496 if (mtd_has_partitions()) {
@@ -518,65 +519,57 @@ add_dataflash(struct spi_device *spi, char *name,
518 return add_mtd_device(device) == 1 ? -ENODEV : 0; 519 return add_mtd_device(device) == 1 ? -ENODEV : 0;
519} 520}
520 521
521/*
522 * Detect and initialize DataFlash device:
523 *
524 * Device Density ID code #Pages PageSize Offset
525 * AT45DB011B 1Mbit (128K) xx0011xx (0x0c) 512 264 9
526 * AT45DB021B 2Mbit (256K) xx0101xx (0x14) 1024 264 9
527 * AT45DB041B 4Mbit (512K) xx0111xx (0x1c) 2048 264 9
528 * AT45DB081B 8Mbit (1M) xx1001xx (0x24) 4096 264 9
529 * AT45DB0161B 16Mbit (2M) xx1011xx (0x2c) 4096 528 10
530 * AT45DB0321B 32Mbit (4M) xx1101xx (0x34) 8192 528 10
531 * AT45DB0642 64Mbit (8M) xx111xxx (0x3c) 8192 1056 11
532 * AT45DB1282 128Mbit (16M) xx0100xx (0x10) 16384 1056 11
533 */
534
535struct flash_info { 522struct flash_info {
536 char *name; 523 char *name;
537 524
538 /* JEDEC id zero means "no ID" (most older chips); otherwise it has 525 /* JEDEC id has a high byte of zero plus three data bytes:
539 * a high byte of zero plus three data bytes: the manufacturer id, 526 * the manufacturer id, then a two byte device id.
540 * then a two byte device id.
541 */ 527 */
542 uint32_t jedec_id; 528 uint32_t jedec_id;
543 529
544 /* The size listed here is what works with OPCODE_SE, which isn't 530 /* The size listed here is what works with OP_ERASE_PAGE. */
545 * necessarily called a "sector" by the vendor.
546 */
547 unsigned nr_pages; 531 unsigned nr_pages;
548 uint16_t pagesize; 532 uint16_t pagesize;
549 uint16_t pageoffset; 533 uint16_t pageoffset;
550 534
551 uint16_t flags; 535 uint16_t flags;
552#define SUP_POW2PS 0x02 536#define SUP_POW2PS 0x0002 /* supports 2^N byte pages */
553#define IS_POW2PS 0x01 537#define IS_POW2PS 0x0001 /* uses 2^N byte pages */
554}; 538};
555 539
556static struct flash_info __devinitdata dataflash_data [] = { 540static struct flash_info __devinitdata dataflash_data [] = {
557 541
558 { "at45db011d", 0x1f2200, 512, 264, 9, SUP_POW2PS}, 542 /*
543 * NOTE: chips with SUP_POW2PS (rev D and up) need two entries,
544 * one with IS_POW2PS and the other without. The entry with the
545 * non-2^N byte page size can't name exact chip revisions without
546 * losing backwards compatibility for cmdlinepart.
547 *
548 * These newer chips also support 128-byte security registers (with
549 * 64 bytes one-time-programmable) and software write-protection.
550 */
551 { "AT45DB011B", 0x1f2200, 512, 264, 9, SUP_POW2PS},
559 { "at45db011d", 0x1f2200, 512, 256, 8, SUP_POW2PS | IS_POW2PS}, 552 { "at45db011d", 0x1f2200, 512, 256, 8, SUP_POW2PS | IS_POW2PS},
560 553
561 { "at45db021d", 0x1f2300, 1024, 264, 9, SUP_POW2PS}, 554 { "AT45DB021B", 0x1f2300, 1024, 264, 9, SUP_POW2PS},
562 { "at45db021d", 0x1f2300, 1024, 256, 8, SUP_POW2PS | IS_POW2PS}, 555 { "at45db021d", 0x1f2300, 1024, 256, 8, SUP_POW2PS | IS_POW2PS},
563 556
564 { "at45db041d", 0x1f2400, 2048, 264, 9, SUP_POW2PS}, 557 { "AT45DB041x", 0x1f2400, 2048, 264, 9, SUP_POW2PS},
565 { "at45db041d", 0x1f2400, 2048, 256, 8, SUP_POW2PS | IS_POW2PS}, 558 { "at45db041d", 0x1f2400, 2048, 256, 8, SUP_POW2PS | IS_POW2PS},
566 559
567 { "at45db081d", 0x1f2500, 4096, 264, 9, SUP_POW2PS}, 560 { "AT45DB081B", 0x1f2500, 4096, 264, 9, SUP_POW2PS},
568 { "at45db081d", 0x1f2500, 4096, 256, 8, SUP_POW2PS | IS_POW2PS}, 561 { "at45db081d", 0x1f2500, 4096, 256, 8, SUP_POW2PS | IS_POW2PS},
569 562
570 { "at45db161d", 0x1f2600, 4096, 528, 10, SUP_POW2PS}, 563 { "AT45DB161x", 0x1f2600, 4096, 528, 10, SUP_POW2PS},
571 { "at45db161d", 0x1f2600, 4096, 512, 9, SUP_POW2PS | IS_POW2PS}, 564 { "at45db161d", 0x1f2600, 4096, 512, 9, SUP_POW2PS | IS_POW2PS},
572 565
573 { "at45db321c", 0x1f2700, 8192, 528, 10, }, 566 { "AT45DB321x", 0x1f2700, 8192, 528, 10, 0}, /* rev C */
574 567
575 { "at45db321d", 0x1f2701, 8192, 528, 10, SUP_POW2PS}, 568 { "AT45DB321x", 0x1f2701, 8192, 528, 10, SUP_POW2PS},
576 { "at45db321d", 0x1f2701, 8192, 512, 9, SUP_POW2PS | IS_POW2PS}, 569 { "at45db321d", 0x1f2701, 8192, 512, 9, SUP_POW2PS | IS_POW2PS},
577 570
578 { "at45db641d", 0x1f2800, 8192, 1056, 11, SUP_POW2PS}, 571 { "AT45DB642x", 0x1f2800, 8192, 1056, 11, SUP_POW2PS},
579 { "at45db641d", 0x1f2800, 8192, 1024, 10, SUP_POW2PS | IS_POW2PS}, 572 { "at45db642d", 0x1f2800, 8192, 1024, 10, SUP_POW2PS | IS_POW2PS},
580}; 573};
581 574
582static struct flash_info *__devinit jedec_probe(struct spi_device *spi) 575static struct flash_info *__devinit jedec_probe(struct spi_device *spi)
@@ -588,17 +581,23 @@ static struct flash_info *__devinit jedec_probe(struct spi_device *spi)
588 struct flash_info *info; 581 struct flash_info *info;
589 int status; 582 int status;
590 583
591
592 /* JEDEC also defines an optional "extended device information" 584 /* JEDEC also defines an optional "extended device information"
593 * string for after vendor-specific data, after the three bytes 585 * string for after vendor-specific data, after the three bytes
594 * we use here. Supporting some chips might require using it. 586 * we use here. Supporting some chips might require using it.
587 *
588 * If the vendor ID isn't Atmel's (0x1f), assume this call failed.
589 * That's not an error; only rev C and newer chips handle it, and
590 * only Atmel sells these chips.
595 */ 591 */
596 tmp = spi_write_then_read(spi, &code, 1, id, 3); 592 tmp = spi_write_then_read(spi, &code, 1, id, 3);
597 if (tmp < 0) { 593 if (tmp < 0) {
598 DEBUG(MTD_DEBUG_LEVEL0, "%s: error %d reading JEDEC ID\n", 594 DEBUG(MTD_DEBUG_LEVEL0, "%s: error %d reading JEDEC ID\n",
599 spi->dev.bus_id, tmp); 595 spi->dev.bus_id, tmp);
600 return NULL; 596 return ERR_PTR(tmp);
601 } 597 }
598 if (id[0] != 0x1f)
599 return NULL;
600
602 jedec = id[0]; 601 jedec = id[0];
603 jedec = jedec << 8; 602 jedec = jedec << 8;
604 jedec |= id[1]; 603 jedec |= id[1];
@@ -609,19 +608,53 @@ static struct flash_info *__devinit jedec_probe(struct spi_device *spi)
609 tmp < ARRAY_SIZE(dataflash_data); 608 tmp < ARRAY_SIZE(dataflash_data);
610 tmp++, info++) { 609 tmp++, info++) {
611 if (info->jedec_id == jedec) { 610 if (info->jedec_id == jedec) {
611 DEBUG(MTD_DEBUG_LEVEL1, "%s: OTP, sector protect%s\n",
612 dev_name(&spi->dev),
613 (info->flags & SUP_POW2PS)
614 ? ", binary pagesize" : ""
615 );
612 if (info->flags & SUP_POW2PS) { 616 if (info->flags & SUP_POW2PS) {
613 status = dataflash_status(spi); 617 status = dataflash_status(spi);
614 if (status & 0x1) 618 if (status < 0) {
615 /* return power of 2 pagesize */ 619 DEBUG(MTD_DEBUG_LEVEL1,
616 return ++info; 620 "%s: status error %d\n",
617 else 621 dev_name(&spi->dev), status);
618 return info; 622 return ERR_PTR(status);
623 }
624 if (status & 0x1) {
625 if (info->flags & IS_POW2PS)
626 return info;
627 } else {
628 if (!(info->flags & IS_POW2PS))
629 return info;
630 }
619 } 631 }
620 } 632 }
621 } 633 }
622 return NULL; 634
635 /*
636 * Treat other chips as errors ... we won't know the right page
637 * size (it might be binary) even when we can tell which density
638 * class is involved (legacy chip id scheme).
639 */
640 dev_warn(&spi->dev, "JEDEC id %06x not handled\n", jedec);
641 return ERR_PTR(-ENODEV);
623} 642}
624 643
644/*
645 * Detect and initialize DataFlash device, using JEDEC IDs on newer chips
646 * or else the ID code embedded in the status bits:
647 *
648 * Device Density ID code #Pages PageSize Offset
649 * AT45DB011B 1Mbit (128K) xx0011xx (0x0c) 512 264 9
650 * AT45DB021B 2Mbit (256K) xx0101xx (0x14) 1024 264 9
651 * AT45DB041B 4Mbit (512K) xx0111xx (0x1c) 2048 264 9
652 * AT45DB081B 8Mbit (1M) xx1001xx (0x24) 4096 264 9
653 * AT45DB0161B 16Mbit (2M) xx1011xx (0x2c) 4096 528 10
654 * AT45DB0321B 32Mbit (4M) xx1101xx (0x34) 8192 528 10
655 * AT45DB0642 64Mbit (8M) xx111xxx (0x3c) 8192 1056 11
656 * AT45DB1282 128Mbit (16M) xx0100xx (0x10) 16384 1056 11
657 */
625static int __devinit dataflash_probe(struct spi_device *spi) 658static int __devinit dataflash_probe(struct spi_device *spi)
626{ 659{
627 int status; 660 int status;
@@ -632,14 +665,17 @@ static int __devinit dataflash_probe(struct spi_device *spi)
632 * If it succeeds we know we have either a C or D part. 665 * If it succeeds we know we have either a C or D part.
633 * D will support power of 2 pagesize option. 666 * D will support power of 2 pagesize option.
634 */ 667 */
635
636 info = jedec_probe(spi); 668 info = jedec_probe(spi);
637 669 if (IS_ERR(info))
670 return PTR_ERR(info);
638 if (info != NULL) 671 if (info != NULL)
639 return add_dataflash(spi, info->name, info->nr_pages, 672 return add_dataflash(spi, info->name, info->nr_pages,
640 info->pagesize, info->pageoffset); 673 info->pagesize, info->pageoffset);
641 674
642 675 /*
676 * Older chips support only legacy commands, identifing
677 * capacity using bits in the status byte.
678 */
643 status = dataflash_status(spi); 679 status = dataflash_status(spi);
644 if (status <= 0 || status == 0xff) { 680 if (status <= 0 || status == 0xff) {
645 DEBUG(MTD_DEBUG_LEVEL1, "%s: status error %d\n", 681 DEBUG(MTD_DEBUG_LEVEL1, "%s: status error %d\n",
@@ -661,13 +697,13 @@ static int __devinit dataflash_probe(struct spi_device *spi)
661 status = add_dataflash(spi, "AT45DB021B", 1024, 264, 9); 697 status = add_dataflash(spi, "AT45DB021B", 1024, 264, 9);
662 break; 698 break;
663 case 0x1c: /* 0 1 1 1 x x */ 699 case 0x1c: /* 0 1 1 1 x x */
664 status = add_dataflash(spi, "AT45DB041B", 2048, 264, 9); 700 status = add_dataflash(spi, "AT45DB041x", 2048, 264, 9);
665 break; 701 break;
666 case 0x24: /* 1 0 0 1 x x */ 702 case 0x24: /* 1 0 0 1 x x */
667 status = add_dataflash(spi, "AT45DB081B", 4096, 264, 9); 703 status = add_dataflash(spi, "AT45DB081B", 4096, 264, 9);
668 break; 704 break;
669 case 0x2c: /* 1 0 1 1 x x */ 705 case 0x2c: /* 1 0 1 1 x x */
670 status = add_dataflash(spi, "AT45DB161B", 4096, 528, 10); 706 status = add_dataflash(spi, "AT45DB161x", 4096, 528, 10);
671 break; 707 break;
672 case 0x34: /* 1 1 0 1 x x */ 708 case 0x34: /* 1 1 0 1 x x */
673 status = add_dataflash(spi, "AT45DB321x", 8192, 528, 10); 709 status = add_dataflash(spi, "AT45DB321x", 8192, 528, 10);
diff --git a/drivers/mtd/nand/Kconfig b/drivers/mtd/nand/Kconfig
index 71406e517857..02f9cc30d77b 100644
--- a/drivers/mtd/nand/Kconfig
+++ b/drivers/mtd/nand/Kconfig
@@ -104,11 +104,24 @@ config MTD_NAND_BF5XX
104 104
105config MTD_NAND_BF5XX_HWECC 105config MTD_NAND_BF5XX_HWECC
106 bool "BF5XX NAND Hardware ECC" 106 bool "BF5XX NAND Hardware ECC"
107 default y
107 depends on MTD_NAND_BF5XX 108 depends on MTD_NAND_BF5XX
108 help 109 help
109 Enable the use of the BF5XX's internal ECC generator when 110 Enable the use of the BF5XX's internal ECC generator when
110 using NAND. 111 using NAND.
111 112
113config MTD_NAND_BF5XX_BOOTROM_ECC
114 bool "Use Blackfin BootROM ECC Layout"
115 default n
116 depends on MTD_NAND_BF5XX_HWECC
117 help
118 If you wish to modify NAND pages and allow the Blackfin on-chip
119 BootROM to boot from them, say Y here. This is only necessary
120 if you are booting U-Boot out of NAND and you wish to update
121 U-Boot from Linux' userspace. Otherwise, you should say N here.
122
123 If unsure, say N.
124
112config MTD_NAND_RTC_FROM4 125config MTD_NAND_RTC_FROM4
113 tristate "Renesas Flash ROM 4-slot interface board (FROM_BOARD4)" 126 tristate "Renesas Flash ROM 4-slot interface board (FROM_BOARD4)"
114 depends on SH_SOLUTION_ENGINE 127 depends on SH_SOLUTION_ENGINE
diff --git a/drivers/mtd/nand/bf5xx_nand.c b/drivers/mtd/nand/bf5xx_nand.c
index e87a57297328..9af2a2cc1153 100644
--- a/drivers/mtd/nand/bf5xx_nand.c
+++ b/drivers/mtd/nand/bf5xx_nand.c
@@ -91,6 +91,41 @@ static const unsigned short bfin_nfc_pin_req[] =
91 P_NAND_ALE, 91 P_NAND_ALE,
92 0}; 92 0};
93 93
94#ifdef CONFIG_MTD_NAND_BF5XX_BOOTROM_ECC
95static uint8_t bbt_pattern[] = { 0xff };
96
97static struct nand_bbt_descr bootrom_bbt = {
98 .options = 0,
99 .offs = 63,
100 .len = 1,
101 .pattern = bbt_pattern,
102};
103
104static struct nand_ecclayout bootrom_ecclayout = {
105 .eccbytes = 24,
106 .eccpos = {
107 0x8 * 0, 0x8 * 0 + 1, 0x8 * 0 + 2,
108 0x8 * 1, 0x8 * 1 + 1, 0x8 * 1 + 2,
109 0x8 * 2, 0x8 * 2 + 1, 0x8 * 2 + 2,
110 0x8 * 3, 0x8 * 3 + 1, 0x8 * 3 + 2,
111 0x8 * 4, 0x8 * 4 + 1, 0x8 * 4 + 2,
112 0x8 * 5, 0x8 * 5 + 1, 0x8 * 5 + 2,
113 0x8 * 6, 0x8 * 6 + 1, 0x8 * 6 + 2,
114 0x8 * 7, 0x8 * 7 + 1, 0x8 * 7 + 2
115 },
116 .oobfree = {
117 { 0x8 * 0 + 3, 5 },
118 { 0x8 * 1 + 3, 5 },
119 { 0x8 * 2 + 3, 5 },
120 { 0x8 * 3 + 3, 5 },
121 { 0x8 * 4 + 3, 5 },
122 { 0x8 * 5 + 3, 5 },
123 { 0x8 * 6 + 3, 5 },
124 { 0x8 * 7 + 3, 5 },
125 }
126};
127#endif
128
94/* 129/*
95 * Data structures for bf5xx nand flash controller driver 130 * Data structures for bf5xx nand flash controller driver
96 */ 131 */
@@ -273,7 +308,7 @@ static int bf5xx_nand_correct_data(struct mtd_info *mtd, u_char *dat,
273 dat += 256; 308 dat += 256;
274 read_ecc += 8; 309 read_ecc += 8;
275 calc_ecc += 8; 310 calc_ecc += 8;
276 ret = bf5xx_nand_correct_data_256(mtd, dat, read_ecc, calc_ecc); 311 ret |= bf5xx_nand_correct_data_256(mtd, dat, read_ecc, calc_ecc);
277 } 312 }
278 313
279 return ret; 314 return ret;
@@ -298,7 +333,7 @@ static int bf5xx_nand_calculate_ecc(struct mtd_info *mtd,
298 ecc0 = bfin_read_NFC_ECC0(); 333 ecc0 = bfin_read_NFC_ECC0();
299 ecc1 = bfin_read_NFC_ECC1(); 334 ecc1 = bfin_read_NFC_ECC1();
300 335
301 code[0] = (ecc0 & 0x3FF) | ((ecc1 & 0x3FF) << 11); 336 code[0] = (ecc0 & 0x7ff) | ((ecc1 & 0x7ff) << 11);
302 337
303 dev_dbg(info->device, "returning ecc 0x%08x\n", code[0]); 338 dev_dbg(info->device, "returning ecc 0x%08x\n", code[0]);
304 339
@@ -310,7 +345,7 @@ static int bf5xx_nand_calculate_ecc(struct mtd_info *mtd,
310 if (page_size == 512) { 345 if (page_size == 512) {
311 ecc0 = bfin_read_NFC_ECC2(); 346 ecc0 = bfin_read_NFC_ECC2();
312 ecc1 = bfin_read_NFC_ECC3(); 347 ecc1 = bfin_read_NFC_ECC3();
313 code[1] = (ecc0 & 0x3FF) | ((ecc1 & 0x3FF) << 11); 348 code[1] = (ecc0 & 0x7ff) | ((ecc1 & 0x7ff) << 11);
314 349
315 /* second 3 bytes in ecc_code for second 256 350 /* second 3 bytes in ecc_code for second 256
316 * bytes of 512 page size 351 * bytes of 512 page size
@@ -514,7 +549,6 @@ static void bf5xx_nand_dma_write_buf(struct mtd_info *mtd,
514/* 549/*
515 * System initialization functions 550 * System initialization functions
516 */ 551 */
517
518static int bf5xx_nand_dma_init(struct bf5xx_nand_info *info) 552static int bf5xx_nand_dma_init(struct bf5xx_nand_info *info)
519{ 553{
520 int ret; 554 int ret;
@@ -547,6 +581,13 @@ static int bf5xx_nand_dma_init(struct bf5xx_nand_info *info)
547 return 0; 581 return 0;
548} 582}
549 583
584static void bf5xx_nand_dma_remove(struct bf5xx_nand_info *info)
585{
586 /* Free NFC DMA channel */
587 if (hardware_ecc)
588 free_dma(CH_NFC);
589}
590
550/* 591/*
551 * BF5XX NFC hardware initialization 592 * BF5XX NFC hardware initialization
552 * - pin mux setup 593 * - pin mux setup
@@ -605,7 +646,7 @@ static int bf5xx_nand_add_partition(struct bf5xx_nand_info *info)
605#endif 646#endif
606} 647}
607 648
608static int bf5xx_nand_remove(struct platform_device *pdev) 649static int __devexit bf5xx_nand_remove(struct platform_device *pdev)
609{ 650{
610 struct bf5xx_nand_info *info = to_nand_info(pdev); 651 struct bf5xx_nand_info *info = to_nand_info(pdev);
611 struct mtd_info *mtd = NULL; 652 struct mtd_info *mtd = NULL;
@@ -623,6 +664,7 @@ static int bf5xx_nand_remove(struct platform_device *pdev)
623 } 664 }
624 665
625 peripheral_free_list(bfin_nfc_pin_req); 666 peripheral_free_list(bfin_nfc_pin_req);
667 bf5xx_nand_dma_remove(info);
626 668
627 /* free the common resources */ 669 /* free the common resources */
628 kfree(info); 670 kfree(info);
@@ -638,7 +680,7 @@ static int bf5xx_nand_remove(struct platform_device *pdev)
638 * it can allocate all necessary resources then calls the 680 * it can allocate all necessary resources then calls the
639 * nand layer to look for devices 681 * nand layer to look for devices
640 */ 682 */
641static int bf5xx_nand_probe(struct platform_device *pdev) 683static int __devinit bf5xx_nand_probe(struct platform_device *pdev)
642{ 684{
643 struct bf5xx_nand_platform *plat = to_nand_plat(pdev); 685 struct bf5xx_nand_platform *plat = to_nand_plat(pdev);
644 struct bf5xx_nand_info *info = NULL; 686 struct bf5xx_nand_info *info = NULL;
@@ -648,22 +690,21 @@ static int bf5xx_nand_probe(struct platform_device *pdev)
648 690
649 dev_dbg(&pdev->dev, "(%p)\n", pdev); 691 dev_dbg(&pdev->dev, "(%p)\n", pdev);
650 692
651 if (peripheral_request_list(bfin_nfc_pin_req, DRV_NAME)) {
652 printk(KERN_ERR DRV_NAME
653 ": Requesting Peripherals failed\n");
654 return -EFAULT;
655 }
656
657 if (!plat) { 693 if (!plat) {
658 dev_err(&pdev->dev, "no platform specific information\n"); 694 dev_err(&pdev->dev, "no platform specific information\n");
659 goto exit_error; 695 return -EINVAL;
696 }
697
698 if (peripheral_request_list(bfin_nfc_pin_req, DRV_NAME)) {
699 dev_err(&pdev->dev, "requesting Peripherals failed\n");
700 return -EFAULT;
660 } 701 }
661 702
662 info = kzalloc(sizeof(*info), GFP_KERNEL); 703 info = kzalloc(sizeof(*info), GFP_KERNEL);
663 if (info == NULL) { 704 if (info == NULL) {
664 dev_err(&pdev->dev, "no memory for flash info\n"); 705 dev_err(&pdev->dev, "no memory for flash info\n");
665 err = -ENOMEM; 706 err = -ENOMEM;
666 goto exit_error; 707 goto out_err_kzalloc;
667 } 708 }
668 709
669 platform_set_drvdata(pdev, info); 710 platform_set_drvdata(pdev, info);
@@ -707,11 +748,16 @@ static int bf5xx_nand_probe(struct platform_device *pdev)
707 748
708 /* initialise the hardware */ 749 /* initialise the hardware */
709 err = bf5xx_nand_hw_init(info); 750 err = bf5xx_nand_hw_init(info);
710 if (err != 0) 751 if (err)
711 goto exit_error; 752 goto out_err_hw_init;
712 753
713 /* setup hardware ECC data struct */ 754 /* setup hardware ECC data struct */
714 if (hardware_ecc) { 755 if (hardware_ecc) {
756#ifdef CONFIG_MTD_NAND_BF5XX_BOOTROM_ECC
757 chip->badblock_pattern = &bootrom_bbt;
758 chip->ecc.layout = &bootrom_ecclayout;
759#endif
760
715 if (plat->page_size == NFC_PG_SIZE_256) { 761 if (plat->page_size == NFC_PG_SIZE_256) {
716 chip->ecc.bytes = 3; 762 chip->ecc.bytes = 3;
717 chip->ecc.size = 256; 763 chip->ecc.size = 256;
@@ -733,7 +779,7 @@ static int bf5xx_nand_probe(struct platform_device *pdev)
733 /* scan hardware nand chip and setup mtd info data struct */ 779 /* scan hardware nand chip and setup mtd info data struct */
734 if (nand_scan(mtd, 1)) { 780 if (nand_scan(mtd, 1)) {
735 err = -ENXIO; 781 err = -ENXIO;
736 goto exit_error; 782 goto out_err_nand_scan;
737 } 783 }
738 784
739 /* add NAND partition */ 785 /* add NAND partition */
@@ -742,11 +788,14 @@ static int bf5xx_nand_probe(struct platform_device *pdev)
742 dev_dbg(&pdev->dev, "initialised ok\n"); 788 dev_dbg(&pdev->dev, "initialised ok\n");
743 return 0; 789 return 0;
744 790
745exit_error: 791out_err_nand_scan:
746 bf5xx_nand_remove(pdev); 792 bf5xx_nand_dma_remove(info);
793out_err_hw_init:
794 platform_set_drvdata(pdev, NULL);
795 kfree(info);
796out_err_kzalloc:
797 peripheral_free_list(bfin_nfc_pin_req);
747 798
748 if (err == 0)
749 err = -EINVAL;
750 return err; 799 return err;
751} 800}
752 801
@@ -775,7 +824,7 @@ static int bf5xx_nand_resume(struct platform_device *dev)
775/* driver device registration */ 824/* driver device registration */
776static struct platform_driver bf5xx_nand_driver = { 825static struct platform_driver bf5xx_nand_driver = {
777 .probe = bf5xx_nand_probe, 826 .probe = bf5xx_nand_probe,
778 .remove = bf5xx_nand_remove, 827 .remove = __devexit_p(bf5xx_nand_remove),
779 .suspend = bf5xx_nand_suspend, 828 .suspend = bf5xx_nand_suspend,
780 .resume = bf5xx_nand_resume, 829 .resume = bf5xx_nand_resume,
781 .driver = { 830 .driver = {
diff --git a/drivers/mtd/nand/diskonchip.c b/drivers/mtd/nand/diskonchip.c
index 765d4f0f7c86..e4226e02d63e 100644
--- a/drivers/mtd/nand/diskonchip.c
+++ b/drivers/mtd/nand/diskonchip.c
@@ -1125,9 +1125,9 @@ static inline int __init nftl_partscan(struct mtd_info *mtd, struct mtd_partitio
1125 goto out; 1125 goto out;
1126 mh = (struct NFTLMediaHeader *)buf; 1126 mh = (struct NFTLMediaHeader *)buf;
1127 1127
1128 mh->NumEraseUnits = le16_to_cpu(mh->NumEraseUnits); 1128 le16_to_cpus(&mh->NumEraseUnits);
1129 mh->FirstPhysicalEUN = le16_to_cpu(mh->FirstPhysicalEUN); 1129 le16_to_cpus(&mh->FirstPhysicalEUN);
1130 mh->FormattedSize = le32_to_cpu(mh->FormattedSize); 1130 le32_to_cpus(&mh->FormattedSize);
1131 1131
1132 printk(KERN_INFO " DataOrgID = %s\n" 1132 printk(KERN_INFO " DataOrgID = %s\n"
1133 " NumEraseUnits = %d\n" 1133 " NumEraseUnits = %d\n"
@@ -1235,12 +1235,12 @@ static inline int __init inftl_partscan(struct mtd_info *mtd, struct mtd_partiti
1235 doc->mh1_page = doc->mh0_page + (4096 >> this->page_shift); 1235 doc->mh1_page = doc->mh0_page + (4096 >> this->page_shift);
1236 mh = (struct INFTLMediaHeader *)buf; 1236 mh = (struct INFTLMediaHeader *)buf;
1237 1237
1238 mh->NoOfBootImageBlocks = le32_to_cpu(mh->NoOfBootImageBlocks); 1238 le32_to_cpus(&mh->NoOfBootImageBlocks);
1239 mh->NoOfBinaryPartitions = le32_to_cpu(mh->NoOfBinaryPartitions); 1239 le32_to_cpus(&mh->NoOfBinaryPartitions);
1240 mh->NoOfBDTLPartitions = le32_to_cpu(mh->NoOfBDTLPartitions); 1240 le32_to_cpus(&mh->NoOfBDTLPartitions);
1241 mh->BlockMultiplierBits = le32_to_cpu(mh->BlockMultiplierBits); 1241 le32_to_cpus(&mh->BlockMultiplierBits);
1242 mh->FormatFlags = le32_to_cpu(mh->FormatFlags); 1242 le32_to_cpus(&mh->FormatFlags);
1243 mh->PercentUsed = le32_to_cpu(mh->PercentUsed); 1243 le32_to_cpus(&mh->PercentUsed);
1244 1244
1245 printk(KERN_INFO " bootRecordID = %s\n" 1245 printk(KERN_INFO " bootRecordID = %s\n"
1246 " NoOfBootImageBlocks = %d\n" 1246 " NoOfBootImageBlocks = %d\n"
@@ -1277,12 +1277,12 @@ static inline int __init inftl_partscan(struct mtd_info *mtd, struct mtd_partiti
1277 /* Scan the partitions */ 1277 /* Scan the partitions */
1278 for (i = 0; (i < 4); i++) { 1278 for (i = 0; (i < 4); i++) {
1279 ip = &(mh->Partitions[i]); 1279 ip = &(mh->Partitions[i]);
1280 ip->virtualUnits = le32_to_cpu(ip->virtualUnits); 1280 le32_to_cpus(&ip->virtualUnits);
1281 ip->firstUnit = le32_to_cpu(ip->firstUnit); 1281 le32_to_cpus(&ip->firstUnit);
1282 ip->lastUnit = le32_to_cpu(ip->lastUnit); 1282 le32_to_cpus(&ip->lastUnit);
1283 ip->flags = le32_to_cpu(ip->flags); 1283 le32_to_cpus(&ip->flags);
1284 ip->spareUnits = le32_to_cpu(ip->spareUnits); 1284 le32_to_cpus(&ip->spareUnits);
1285 ip->Reserved0 = le32_to_cpu(ip->Reserved0); 1285 le32_to_cpus(&ip->Reserved0);
1286 1286
1287 printk(KERN_INFO " PARTITION[%d] ->\n" 1287 printk(KERN_INFO " PARTITION[%d] ->\n"
1288 " virtualUnits = %d\n" 1288 " virtualUnits = %d\n"
diff --git a/drivers/mtd/nand/fsl_elbc_nand.c b/drivers/mtd/nand/fsl_elbc_nand.c
index 9dff51351f4f..98ad3cefcaf4 100644
--- a/drivers/mtd/nand/fsl_elbc_nand.c
+++ b/drivers/mtd/nand/fsl_elbc_nand.c
@@ -887,7 +887,7 @@ static int __devinit fsl_elbc_chip_probe(struct fsl_elbc_ctrl *ctrl,
887 goto err; 887 goto err;
888 } 888 }
889 889
890 priv->mtd.name = kasprintf(GFP_KERNEL, "%x.flash", res.start); 890 priv->mtd.name = kasprintf(GFP_KERNEL, "%x.flash", (unsigned)res.start);
891 if (!priv->mtd.name) { 891 if (!priv->mtd.name) {
892 ret = -ENOMEM; 892 ret = -ENOMEM;
893 goto err; 893 goto err;
diff --git a/drivers/mtd/nand/nandsim.c b/drivers/mtd/nand/nandsim.c
index ecd70e2504f6..556e8131ecdc 100644
--- a/drivers/mtd/nand/nandsim.c
+++ b/drivers/mtd/nand/nandsim.c
@@ -28,6 +28,7 @@
28#include <linux/module.h> 28#include <linux/module.h>
29#include <linux/moduleparam.h> 29#include <linux/moduleparam.h>
30#include <linux/vmalloc.h> 30#include <linux/vmalloc.h>
31#include <asm/div64.h>
31#include <linux/slab.h> 32#include <linux/slab.h>
32#include <linux/errno.h> 33#include <linux/errno.h>
33#include <linux/string.h> 34#include <linux/string.h>
@@ -207,13 +208,16 @@ MODULE_PARM_DESC(overridesize, "Specifies the NAND Flash size overriding the I
207#define STATE_CMD_READID 0x0000000A /* read ID */ 208#define STATE_CMD_READID 0x0000000A /* read ID */
208#define STATE_CMD_ERASE2 0x0000000B /* sector erase second command */ 209#define STATE_CMD_ERASE2 0x0000000B /* sector erase second command */
209#define STATE_CMD_RESET 0x0000000C /* reset */ 210#define STATE_CMD_RESET 0x0000000C /* reset */
211#define STATE_CMD_RNDOUT 0x0000000D /* random output command */
212#define STATE_CMD_RNDOUTSTART 0x0000000E /* random output start command */
210#define STATE_CMD_MASK 0x0000000F /* command states mask */ 213#define STATE_CMD_MASK 0x0000000F /* command states mask */
211 214
212/* After an address is input, the simulator goes to one of these states */ 215/* After an address is input, the simulator goes to one of these states */
213#define STATE_ADDR_PAGE 0x00000010 /* full (row, column) address is accepted */ 216#define STATE_ADDR_PAGE 0x00000010 /* full (row, column) address is accepted */
214#define STATE_ADDR_SEC 0x00000020 /* sector address was accepted */ 217#define STATE_ADDR_SEC 0x00000020 /* sector address was accepted */
215#define STATE_ADDR_ZERO 0x00000030 /* one byte zero address was accepted */ 218#define STATE_ADDR_COLUMN 0x00000030 /* column address was accepted */
216#define STATE_ADDR_MASK 0x00000030 /* address states mask */ 219#define STATE_ADDR_ZERO 0x00000040 /* one byte zero address was accepted */
220#define STATE_ADDR_MASK 0x00000070 /* address states mask */
217 221
218/* Durind data input/output the simulator is in these states */ 222/* Durind data input/output the simulator is in these states */
219#define STATE_DATAIN 0x00000100 /* waiting for data input */ 223#define STATE_DATAIN 0x00000100 /* waiting for data input */
@@ -240,7 +244,7 @@ MODULE_PARM_DESC(overridesize, "Specifies the NAND Flash size overriding the I
240#define ACTION_OOBOFF 0x00600000 /* add to address OOB offset */ 244#define ACTION_OOBOFF 0x00600000 /* add to address OOB offset */
241#define ACTION_MASK 0x00700000 /* action mask */ 245#define ACTION_MASK 0x00700000 /* action mask */
242 246
243#define NS_OPER_NUM 12 /* Number of operations supported by the simulator */ 247#define NS_OPER_NUM 13 /* Number of operations supported by the simulator */
244#define NS_OPER_STATES 6 /* Maximum number of states in operation */ 248#define NS_OPER_STATES 6 /* Maximum number of states in operation */
245 249
246#define OPT_ANY 0xFFFFFFFF /* any chip supports this operation */ 250#define OPT_ANY 0xFFFFFFFF /* any chip supports this operation */
@@ -373,7 +377,10 @@ static struct nandsim_operations {
373 {OPT_ANY, {STATE_CMD_READID, STATE_ADDR_ZERO, STATE_DATAOUT_ID, STATE_READY}}, 377 {OPT_ANY, {STATE_CMD_READID, STATE_ADDR_ZERO, STATE_DATAOUT_ID, STATE_READY}},
374 /* Large page devices read page */ 378 /* Large page devices read page */
375 {OPT_LARGEPAGE, {STATE_CMD_READ0, STATE_ADDR_PAGE, STATE_CMD_READSTART | ACTION_CPY, 379 {OPT_LARGEPAGE, {STATE_CMD_READ0, STATE_ADDR_PAGE, STATE_CMD_READSTART | ACTION_CPY,
376 STATE_DATAOUT, STATE_READY}} 380 STATE_DATAOUT, STATE_READY}},
381 /* Large page devices random page read */
382 {OPT_LARGEPAGE, {STATE_CMD_RNDOUT, STATE_ADDR_COLUMN, STATE_CMD_RNDOUTSTART | ACTION_CPY,
383 STATE_DATAOUT, STATE_READY}},
377}; 384};
378 385
379struct weak_block { 386struct weak_block {
@@ -579,7 +586,8 @@ static int init_nandsim(struct mtd_info *mtd)
579 if (ns->busw == 16) 586 if (ns->busw == 16)
580 NS_WARN("16-bit flashes support wasn't tested\n"); 587 NS_WARN("16-bit flashes support wasn't tested\n");
581 588
582 printk("flash size: %llu MiB\n", ns->geom.totsz >> 20); 589 printk("flash size: %llu MiB\n",
590 (unsigned long long)ns->geom.totsz >> 20);
583 printk("page size: %u bytes\n", ns->geom.pgsz); 591 printk("page size: %u bytes\n", ns->geom.pgsz);
584 printk("OOB area size: %u bytes\n", ns->geom.oobsz); 592 printk("OOB area size: %u bytes\n", ns->geom.oobsz);
585 printk("sector size: %u KiB\n", ns->geom.secsz >> 10); 593 printk("sector size: %u KiB\n", ns->geom.secsz >> 10);
@@ -588,8 +596,9 @@ static int init_nandsim(struct mtd_info *mtd)
588 printk("bus width: %u\n", ns->busw); 596 printk("bus width: %u\n", ns->busw);
589 printk("bits in sector size: %u\n", ns->geom.secshift); 597 printk("bits in sector size: %u\n", ns->geom.secshift);
590 printk("bits in page size: %u\n", ns->geom.pgshift); 598 printk("bits in page size: %u\n", ns->geom.pgshift);
591 printk("bits in OOB size: %u\n", ns->geom.oobshift); 599 printk("bits in OOB size: %u\n", ns->geom.oobshift);
592 printk("flash size with OOB: %llu KiB\n", ns->geom.totszoob >> 10); 600 printk("flash size with OOB: %llu KiB\n",
601 (unsigned long long)ns->geom.totszoob >> 10);
593 printk("page address bytes: %u\n", ns->geom.pgaddrbytes); 602 printk("page address bytes: %u\n", ns->geom.pgaddrbytes);
594 printk("sector address bytes: %u\n", ns->geom.secaddrbytes); 603 printk("sector address bytes: %u\n", ns->geom.secaddrbytes);
595 printk("options: %#x\n", ns->options); 604 printk("options: %#x\n", ns->options);
@@ -937,12 +946,18 @@ static char *get_state_name(uint32_t state)
937 return "STATE_CMD_ERASE2"; 946 return "STATE_CMD_ERASE2";
938 case STATE_CMD_RESET: 947 case STATE_CMD_RESET:
939 return "STATE_CMD_RESET"; 948 return "STATE_CMD_RESET";
949 case STATE_CMD_RNDOUT:
950 return "STATE_CMD_RNDOUT";
951 case STATE_CMD_RNDOUTSTART:
952 return "STATE_CMD_RNDOUTSTART";
940 case STATE_ADDR_PAGE: 953 case STATE_ADDR_PAGE:
941 return "STATE_ADDR_PAGE"; 954 return "STATE_ADDR_PAGE";
942 case STATE_ADDR_SEC: 955 case STATE_ADDR_SEC:
943 return "STATE_ADDR_SEC"; 956 return "STATE_ADDR_SEC";
944 case STATE_ADDR_ZERO: 957 case STATE_ADDR_ZERO:
945 return "STATE_ADDR_ZERO"; 958 return "STATE_ADDR_ZERO";
959 case STATE_ADDR_COLUMN:
960 return "STATE_ADDR_COLUMN";
946 case STATE_DATAIN: 961 case STATE_DATAIN:
947 return "STATE_DATAIN"; 962 return "STATE_DATAIN";
948 case STATE_DATAOUT: 963 case STATE_DATAOUT:
@@ -973,6 +988,7 @@ static int check_command(int cmd)
973 switch (cmd) { 988 switch (cmd) {
974 989
975 case NAND_CMD_READ0: 990 case NAND_CMD_READ0:
991 case NAND_CMD_READ1:
976 case NAND_CMD_READSTART: 992 case NAND_CMD_READSTART:
977 case NAND_CMD_PAGEPROG: 993 case NAND_CMD_PAGEPROG:
978 case NAND_CMD_READOOB: 994 case NAND_CMD_READOOB:
@@ -982,7 +998,8 @@ static int check_command(int cmd)
982 case NAND_CMD_READID: 998 case NAND_CMD_READID:
983 case NAND_CMD_ERASE2: 999 case NAND_CMD_ERASE2:
984 case NAND_CMD_RESET: 1000 case NAND_CMD_RESET:
985 case NAND_CMD_READ1: 1001 case NAND_CMD_RNDOUT:
1002 case NAND_CMD_RNDOUTSTART:
986 return 0; 1003 return 0;
987 1004
988 case NAND_CMD_STATUS_MULTI: 1005 case NAND_CMD_STATUS_MULTI:
@@ -1021,6 +1038,10 @@ static uint32_t get_state_by_command(unsigned command)
1021 return STATE_CMD_ERASE2; 1038 return STATE_CMD_ERASE2;
1022 case NAND_CMD_RESET: 1039 case NAND_CMD_RESET:
1023 return STATE_CMD_RESET; 1040 return STATE_CMD_RESET;
1041 case NAND_CMD_RNDOUT:
1042 return STATE_CMD_RNDOUT;
1043 case NAND_CMD_RNDOUTSTART:
1044 return STATE_CMD_RNDOUTSTART;
1024 } 1045 }
1025 1046
1026 NS_ERR("get_state_by_command: unknown command, BUG\n"); 1047 NS_ERR("get_state_by_command: unknown command, BUG\n");
@@ -1582,6 +1603,11 @@ static void switch_state(struct nandsim *ns)
1582 ns->regs.num = 1; 1603 ns->regs.num = 1;
1583 break; 1604 break;
1584 1605
1606 case STATE_ADDR_COLUMN:
1607 /* Column address is always 2 bytes */
1608 ns->regs.num = ns->geom.pgaddrbytes - ns->geom.secaddrbytes;
1609 break;
1610
1585 default: 1611 default:
1586 NS_ERR("switch_state: BUG! unknown address state\n"); 1612 NS_ERR("switch_state: BUG! unknown address state\n");
1587 } 1613 }
@@ -1693,15 +1719,21 @@ static void ns_nand_write_byte(struct mtd_info *mtd, u_char byte)
1693 return; 1719 return;
1694 } 1720 }
1695 1721
1696 /* 1722 /* Check that the command byte is correct */
1697 * Chip might still be in STATE_DATAOUT 1723 if (check_command(byte)) {
1698 * (if OPT_AUTOINCR feature is supported), STATE_DATAOUT_STATUS or 1724 NS_ERR("write_byte: unknown command %#x\n", (uint)byte);
1699 * STATE_DATAOUT_STATUS_M state. If so, switch state. 1725 return;
1700 */ 1726 }
1727
1701 if (NS_STATE(ns->state) == STATE_DATAOUT_STATUS 1728 if (NS_STATE(ns->state) == STATE_DATAOUT_STATUS
1702 || NS_STATE(ns->state) == STATE_DATAOUT_STATUS_M 1729 || NS_STATE(ns->state) == STATE_DATAOUT_STATUS_M
1703 || ((ns->options & OPT_AUTOINCR) && NS_STATE(ns->state) == STATE_DATAOUT)) 1730 || NS_STATE(ns->state) == STATE_DATAOUT) {
1731 int row = ns->regs.row;
1732
1704 switch_state(ns); 1733 switch_state(ns);
1734 if (byte == NAND_CMD_RNDOUT)
1735 ns->regs.row = row;
1736 }
1705 1737
1706 /* Check if chip is expecting command */ 1738 /* Check if chip is expecting command */
1707 if (NS_STATE(ns->nxstate) != STATE_UNKNOWN && !(ns->nxstate & STATE_CMD_MASK)) { 1739 if (NS_STATE(ns->nxstate) != STATE_UNKNOWN && !(ns->nxstate & STATE_CMD_MASK)) {
@@ -1715,12 +1747,6 @@ static void ns_nand_write_byte(struct mtd_info *mtd, u_char byte)
1715 switch_to_ready_state(ns, NS_STATUS_FAILED(ns)); 1747 switch_to_ready_state(ns, NS_STATUS_FAILED(ns));
1716 } 1748 }
1717 1749
1718 /* Check that the command byte is correct */
1719 if (check_command(byte)) {
1720 NS_ERR("write_byte: unknown command %#x\n", (uint)byte);
1721 return;
1722 }
1723
1724 NS_DBG("command byte corresponding to %s state accepted\n", 1750 NS_DBG("command byte corresponding to %s state accepted\n",
1725 get_state_name(get_state_by_command(byte))); 1751 get_state_name(get_state_by_command(byte)));
1726 ns->regs.command = byte; 1752 ns->regs.command = byte;