diff options
author | Roland Stigge <Roland.Stigge@philosys.de> | 2007-07-18 08:56:11 -0400 |
---|---|---|
committer | David Woodhouse <dwmw2@infradead.org> | 2007-08-02 16:46:07 -0400 |
commit | 9d7b4b5562b60c826c71cf2e1b7b63add42e527f (patch) | |
tree | a7b2f09ee2eb9b975b2b9b12761c6ff51156c807 /drivers/mtd | |
parent | 47af05dd4b98b57eeb682596a0df42d106e02167 (diff) |
[MTD] [NAND] Fix refactoring of EDB7312 hwcontrol function.
The patch ensures that the current code (kernel 2.6.22) uses the bits
like the code prior to the refactoring. The variable "bits" is employed
in a useful way now.
Signed-off-by: Roland Stigge <stigge@antcom.de>
Signed-off-by: David Woodhouse <dwmw2@infradead.org>
Diffstat (limited to 'drivers/mtd')
-rw-r--r-- | drivers/mtd/nand/edb7312.c | 10 |
1 files changed, 5 insertions, 5 deletions
diff --git a/drivers/mtd/nand/edb7312.c b/drivers/mtd/nand/edb7312.c index 1daf8231aaef..0146cdc48039 100644 --- a/drivers/mtd/nand/edb7312.c +++ b/drivers/mtd/nand/edb7312.c | |||
@@ -74,7 +74,7 @@ static struct mtd_partition partition_info[] = { | |||
74 | /* | 74 | /* |
75 | * hardware specific access to control-lines | 75 | * hardware specific access to control-lines |
76 | * | 76 | * |
77 | * NAND_NCE: bit 0 -> bit 7 | 77 | * NAND_NCE: bit 0 -> bit 6 (bit 7 = 1) |
78 | * NAND_CLE: bit 1 -> bit 4 | 78 | * NAND_CLE: bit 1 -> bit 4 |
79 | * NAND_ALE: bit 2 -> bit 5 | 79 | * NAND_ALE: bit 2 -> bit 5 |
80 | */ | 80 | */ |
@@ -83,12 +83,12 @@ static void ep7312_hwcontrol(struct mtd_info *mtd, int cmd, unsigned int ctrl) | |||
83 | struct nand_chip *chip = mtd->priv; | 83 | struct nand_chip *chip = mtd->priv; |
84 | 84 | ||
85 | if (ctrl & NAND_CTRL_CHANGE) { | 85 | if (ctrl & NAND_CTRL_CHANGE) { |
86 | unsigned char bits; | 86 | unsigned char bits = 0x80; |
87 | 87 | ||
88 | bits = (ctrl & (NAND_CLE | NAND_ALE)) << 3; | 88 | bits |= (ctrl & (NAND_CLE | NAND_ALE)) << 3; |
89 | bits = (ctrl & NAND_NCE) << 7; | 89 | bits |= (ctrl & NAND_NCE) ? 0x00 : 0x40; |
90 | 90 | ||
91 | clps_writeb((clps_readb(ep7312_pxdr) & 0xB0) | 0x10, | 91 | clps_writeb((clps_readb(ep7312_pxdr) & 0xF0) | bits, |
92 | ep7312_pxdr); | 92 | ep7312_pxdr); |
93 | } | 93 | } |
94 | if (cmd != NAND_CMD_NONE) | 94 | if (cmd != NAND_CMD_NONE) |