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authorEnrico Scholz <enrico.scholz@sigma-chemnitz.de>2008-08-29 06:59:49 -0400
committerDavid Woodhouse <David.Woodhouse@intel.com>2008-09-01 16:37:39 -0400
commit80ebf20f34c30760cfba7b5e0a418241181d2cd9 (patch)
tree3cfc47cf981911e077b9ae27d646553c2152ef30 /drivers/mtd
parentc8ac3f818e1183eab8d08a41b01b6078c5df4b43 (diff)
[MTD] [NAND] pxa3xx_nand: allow to disable builtin flash-type table
This patch adds a MTD_NAND_PXA3xx_BUILTIN configuration variables which allows to disable usage of builtin flash-type table. Not enabling this option saves some space in the generated driver. Signed-off-by: Enrico Scholz <enrico.scholz@sigma-chemnitz.de> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
Diffstat (limited to 'drivers/mtd')
-rw-r--r--drivers/mtd/nand/Kconfig7
-rw-r--r--drivers/mtd/nand/pxa3xx_nand.c4
2 files changed, 11 insertions, 0 deletions
diff --git a/drivers/mtd/nand/Kconfig b/drivers/mtd/nand/Kconfig
index 8eb2b06cf0d9..6eebe852b9b3 100644
--- a/drivers/mtd/nand/Kconfig
+++ b/drivers/mtd/nand/Kconfig
@@ -334,6 +334,13 @@ config MTD_NAND_PXA3xx
334 This enables the driver for the NAND flash device found on 334 This enables the driver for the NAND flash device found on
335 PXA3xx processors 335 PXA3xx processors
336 336
337config MTD_NAND_PXA3xx_BUILTIN
338 bool "Use builtin definitions for some NAND chips (deprecated)"
339 depends on MTD_NAND_PXA3xx
340 help
341 This enables builtin definitions for some NAND chips. This
342 is deprecated in favor of platform specific data.
343
337config MTD_NAND_CM_X270 344config MTD_NAND_CM_X270
338 tristate "Support for NAND Flash on CM-X270 modules" 345 tristate "Support for NAND Flash on CM-X270 modules"
339 depends on MTD_NAND && MACH_ARMCORE 346 depends on MTD_NAND && MACH_ARMCORE
diff --git a/drivers/mtd/nand/pxa3xx_nand.c b/drivers/mtd/nand/pxa3xx_nand.c
index 1906aba7e73c..e492804b3d98 100644
--- a/drivers/mtd/nand/pxa3xx_nand.c
+++ b/drivers/mtd/nand/pxa3xx_nand.c
@@ -164,6 +164,7 @@ static int use_dma = 1;
164module_param(use_dma, bool, 0444); 164module_param(use_dma, bool, 0444);
165MODULE_PARM_DESC(use_dma, "enable DMA for data transfering to/from NAND HW"); 165MODULE_PARM_DESC(use_dma, "enable DMA for data transfering to/from NAND HW");
166 166
167#ifdef CONFIG_MTD_NAND_PXA3xx_BUILTIN
167static struct pxa3xx_nand_cmdset smallpage_cmdset = { 168static struct pxa3xx_nand_cmdset smallpage_cmdset = {
168 .read1 = 0x0000, 169 .read1 = 0x0000,
169 .read2 = 0x0050, 170 .read2 = 0x0050,
@@ -275,6 +276,7 @@ static struct pxa3xx_nand_flash *builtin_flash_types[] = {
275 &micron1GbX16, 276 &micron1GbX16,
276 &stm2GbX16, 277 &stm2GbX16,
277}; 278};
279#endif /* CONFIG_MTD_NAND_PXA3xx_BUILTIN */
278 280
279#define NDTR0_tCH(c) (min((c), 7) << 19) 281#define NDTR0_tCH(c) (min((c), 7) << 19)
280#define NDTR0_tCS(c) (min((c), 7) << 16) 282#define NDTR0_tCS(c) (min((c), 7) << 16)
@@ -931,6 +933,7 @@ static int pxa3xx_nand_detect_flash(struct pxa3xx_nand_info *info,
931 return 0; 933 return 0;
932 } 934 }
933 935
936#ifdef CONFIG_MTD_NAND_PXA3xx_BUILTIN
934 for (i = 0; i < ARRAY_SIZE(builtin_flash_types); i++) { 937 for (i = 0; i < ARRAY_SIZE(builtin_flash_types); i++) {
935 938
936 f = builtin_flash_types[i]; 939 f = builtin_flash_types[i];
@@ -944,6 +947,7 @@ static int pxa3xx_nand_detect_flash(struct pxa3xx_nand_info *info,
944 if (id == f->chip_id) 947 if (id == f->chip_id)
945 return 0; 948 return 0;
946 } 949 }
950#endif
947 951
948 return -ENODEV; 952 return -ENODEV;
949} 953}