aboutsummaryrefslogtreecommitdiffstats
path: root/drivers/mtd/nand
diff options
context:
space:
mode:
authorLei Wen <leiwen@marvell.com>2010-08-18 06:00:03 -0400
committerDavid Woodhouse <David.Woodhouse@intel.com>2010-10-24 18:39:01 -0400
commit227a886c7ead6420465abfd1242f449895b2c332 (patch)
treee45c600a6bac08384c234d96380ba7c900827022 /drivers/mtd/nand
parentc1f82478c535f1de9fecf3cafa82014f312d5d4e (diff)
mtd: pxa3xx_nand: introduce default timing to reduce read id times
We certainly don't need to send read id command times by times, since we already know what the id is after the first read id... So create a default timing which could ensure it would successfully read id out all supported chip. Then follow the build-in table to reconfigure the timing. Signed-off-by: Lei Wen <leiwen@marvell.com> Signed-off-by: Haojian Zhuang <haojian.zhuang@marvell.com> Acked-by: Eric Miao <eric.y.miao@gmail.com> Signed-off-by: Artem Bityutskiy <Artem.Bityutskiy@nokia.com> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
Diffstat (limited to 'drivers/mtd/nand')
-rw-r--r--drivers/mtd/nand/pxa3xx_nand.c68
1 files changed, 33 insertions, 35 deletions
diff --git a/drivers/mtd/nand/pxa3xx_nand.c b/drivers/mtd/nand/pxa3xx_nand.c
index 4e40de45f4be..621fa68189fd 100644
--- a/drivers/mtd/nand/pxa3xx_nand.c
+++ b/drivers/mtd/nand/pxa3xx_nand.c
@@ -190,22 +190,27 @@ static struct pxa3xx_nand_cmdset default_cmdset = {
190}; 190};
191 191
192static struct pxa3xx_nand_timing timing[] = { 192static struct pxa3xx_nand_timing timing[] = {
193 { 10, 0, 20, 40, 30, 40, 11123, 110, 10, }, 193 { 40, 80, 60, 100, 80, 100, 90000, 400, 40, },
194 { 10, 25, 15, 25, 15, 30, 25000, 60, 10, }, 194 { 10, 0, 20, 40, 30, 40, 11123, 110, 10, },
195 { 10, 35, 15, 25, 15, 25, 25000, 60, 10, }, 195 { 10, 25, 15, 25, 15, 30, 25000, 60, 10, },
196 { 10, 35, 15, 25, 15, 25, 25000, 60, 10, },
196}; 197};
197 198
198static struct pxa3xx_nand_flash builtin_flash_types[] = { 199static struct pxa3xx_nand_flash builtin_flash_types[] = {
199 { 0x46ec, 32, 512, 16, 16, 4096, &default_cmdset, &timing[0] }, 200 { 0, 0, 2048, 8, 8, 0, &default_cmdset, &timing[0] },
200 { 0xdaec, 64, 2048, 8, 8, 2048, &default_cmdset, &timing[0] }, 201 { 0x46ec, 32, 512, 16, 16, 4096, &default_cmdset, &timing[1] },
201 { 0xd7ec, 128, 4096, 8, 8, 8192, &default_cmdset, &timing[0] }, 202 { 0xdaec, 64, 2048, 8, 8, 2048, &default_cmdset, &timing[1] },
202 { 0xa12c, 64, 2048, 8, 8, 1024, &default_cmdset, &timing[1] }, 203 { 0xd7ec, 128, 4096, 8, 8, 8192, &default_cmdset, &timing[1] },
203 { 0xb12c, 64, 2048, 16, 16, 1024, &default_cmdset, &timing[1] }, 204 { 0xa12c, 64, 2048, 8, 8, 1024, &default_cmdset, &timing[2] },
204 { 0xdc2c, 64, 2048, 8, 8, 4096, &default_cmdset, &timing[1] }, 205 { 0xb12c, 64, 2048, 16, 16, 1024, &default_cmdset, &timing[2] },
205 { 0xcc2c, 64, 2048, 16, 16, 4096, &default_cmdset, &timing[1] }, 206 { 0xdc2c, 64, 2048, 8, 8, 4096, &default_cmdset, &timing[2] },
206 { 0xba20, 64, 2048, 16, 16, 2048, &default_cmdset, &timing[2] }, 207 { 0xcc2c, 64, 2048, 16, 16, 4096, &default_cmdset, &timing[2] },
208 { 0xba20, 64, 2048, 16, 16, 2048, &default_cmdset, &timing[3] },
207}; 209};
208 210
211/* Define a default flash type setting serve as flash detecting only */
212#define DEFAULT_FLASH_TYPE (&builtin_flash_types[0])
213
209#define NDTR0_tCH(c) (min((c), 7) << 19) 214#define NDTR0_tCH(c) (min((c), 7) << 19)
210#define NDTR0_tCS(c) (min((c), 7) << 16) 215#define NDTR0_tCS(c) (min((c), 7) << 16)
211#define NDTR0_tWH(c) (min((c), 7) << 11) 216#define NDTR0_tWH(c) (min((c), 7) << 11)
@@ -945,36 +950,29 @@ static int pxa3xx_nand_detect_flash(struct pxa3xx_nand_info *info,
945 if (pxa3xx_nand_detect_config(info) == 0) 950 if (pxa3xx_nand_detect_config(info) == 0)
946 return 0; 951 return 0;
947 952
948 for (i = 0; i<pdata->num_flash; ++i) { 953 /* we use default timing to detect id */
949 f = pdata->flash + i; 954 f = DEFAULT_FLASH_TYPE;
950 955 pxa3xx_nand_config_flash(info, f);
951 if (pxa3xx_nand_config_flash(info, f)) 956 if (__readid(info, &id))
952 continue; 957 goto fail_detect;
953 958
954 if (__readid(info, &id)) 959 for (i=0; i<ARRAY_SIZE(builtin_flash_types) + pdata->num_flash - 1; i++) {
955 continue; 960 /* we first choose the flash definition from platfrom */
956 961 if (i < pdata->num_flash)
957 if (id == f->chip_id) 962 f = pdata->flash + i;
958 return 0; 963 else
959 } 964 f = &builtin_flash_types[i - pdata->num_flash + 1];
960 965 if (f->chip_id == id) {
961 for (i = 0; i < ARRAY_SIZE(builtin_flash_types); i++) { 966 dev_info(&info->pdev->dev, "detect chip id: 0x%x\n", id);
962 967 pxa3xx_nand_config_flash(info, f);
963 f = &builtin_flash_types[i];
964
965 if (pxa3xx_nand_config_flash(info, f))
966 continue;
967
968 if (__readid(info, &id))
969 continue;
970
971 if (id == f->chip_id)
972 return 0; 968 return 0;
969 }
973 } 970 }
974 971
975 dev_warn(&info->pdev->dev, 972 dev_warn(&info->pdev->dev,
976 "failed to detect configured nand flash; found %04x instead of\n", 973 "failed to detect configured nand flash; found %04x instead of\n",
977 id); 974 id);
975fail_detect:
978 return -ENODEV; 976 return -ENODEV;
979} 977}
980 978