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authorsrimugunthan <srimugunthan.dhandapani@gmail.com>2010-11-13 05:46:05 -0500
committerDavid Woodhouse <David.Woodhouse@intel.com>2010-12-03 11:27:06 -0500
commitdaf05ec00c6e60a2c705820e7f93cbd31c804fe3 (patch)
tree88928f8551bde677a806c4e8d14133a803a8a8da /drivers/mtd/nand
parentac622f583dccb025250becd2d4e60badaf571713 (diff)
mtd: nandsim: spell fixes in comments
Signed-off-by: srimugunthan <srimugunthan.dhandapani@gmail.com> Signed-off-by: Artem Bityutskiy <Artem.Bityutskiy@nokia.com> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
Diffstat (limited to 'drivers/mtd/nand')
-rw-r--r--drivers/mtd/nand/nandsim.c36
1 files changed, 18 insertions, 18 deletions
diff --git a/drivers/mtd/nand/nandsim.c b/drivers/mtd/nand/nandsim.c
index a6a73aab1253..c45e06fba154 100644
--- a/drivers/mtd/nand/nandsim.c
+++ b/drivers/mtd/nand/nandsim.c
@@ -210,12 +210,12 @@ MODULE_PARM_DESC(bbt, "0 OOB, 1 BBT with marker in OOB, 2 BBT with marker in d
210#define STATE_CMD_READ0 0x00000001 /* read data from the beginning of page */ 210#define STATE_CMD_READ0 0x00000001 /* read data from the beginning of page */
211#define STATE_CMD_READ1 0x00000002 /* read data from the second half of page */ 211#define STATE_CMD_READ1 0x00000002 /* read data from the second half of page */
212#define STATE_CMD_READSTART 0x00000003 /* read data second command (large page devices) */ 212#define STATE_CMD_READSTART 0x00000003 /* read data second command (large page devices) */
213#define STATE_CMD_PAGEPROG 0x00000004 /* start page programm */ 213#define STATE_CMD_PAGEPROG 0x00000004 /* start page program */
214#define STATE_CMD_READOOB 0x00000005 /* read OOB area */ 214#define STATE_CMD_READOOB 0x00000005 /* read OOB area */
215#define STATE_CMD_ERASE1 0x00000006 /* sector erase first command */ 215#define STATE_CMD_ERASE1 0x00000006 /* sector erase first command */
216#define STATE_CMD_STATUS 0x00000007 /* read status */ 216#define STATE_CMD_STATUS 0x00000007 /* read status */
217#define STATE_CMD_STATUS_M 0x00000008 /* read multi-plane status (isn't implemented) */ 217#define STATE_CMD_STATUS_M 0x00000008 /* read multi-plane status (isn't implemented) */
218#define STATE_CMD_SEQIN 0x00000009 /* sequential data imput */ 218#define STATE_CMD_SEQIN 0x00000009 /* sequential data input */
219#define STATE_CMD_READID 0x0000000A /* read ID */ 219#define STATE_CMD_READID 0x0000000A /* read ID */
220#define STATE_CMD_ERASE2 0x0000000B /* sector erase second command */ 220#define STATE_CMD_ERASE2 0x0000000B /* sector erase second command */
221#define STATE_CMD_RESET 0x0000000C /* reset */ 221#define STATE_CMD_RESET 0x0000000C /* reset */
@@ -230,7 +230,7 @@ MODULE_PARM_DESC(bbt, "0 OOB, 1 BBT with marker in OOB, 2 BBT with marker in d
230#define STATE_ADDR_ZERO 0x00000040 /* one byte zero address was accepted */ 230#define STATE_ADDR_ZERO 0x00000040 /* one byte zero address was accepted */
231#define STATE_ADDR_MASK 0x00000070 /* address states mask */ 231#define STATE_ADDR_MASK 0x00000070 /* address states mask */
232 232
233/* Durind data input/output the simulator is in these states */ 233/* During data input/output the simulator is in these states */
234#define STATE_DATAIN 0x00000100 /* waiting for data input */ 234#define STATE_DATAIN 0x00000100 /* waiting for data input */
235#define STATE_DATAIN_MASK 0x00000100 /* data input states mask */ 235#define STATE_DATAIN_MASK 0x00000100 /* data input states mask */
236 236
@@ -248,7 +248,7 @@ MODULE_PARM_DESC(bbt, "0 OOB, 1 BBT with marker in OOB, 2 BBT with marker in d
248 248
249/* Simulator's actions bit masks */ 249/* Simulator's actions bit masks */
250#define ACTION_CPY 0x00100000 /* copy page/OOB to the internal buffer */ 250#define ACTION_CPY 0x00100000 /* copy page/OOB to the internal buffer */
251#define ACTION_PRGPAGE 0x00200000 /* programm the internal buffer to flash */ 251#define ACTION_PRGPAGE 0x00200000 /* program the internal buffer to flash */
252#define ACTION_SECERASE 0x00300000 /* erase sector */ 252#define ACTION_SECERASE 0x00300000 /* erase sector */
253#define ACTION_ZEROOFF 0x00400000 /* don't add any offset to address */ 253#define ACTION_ZEROOFF 0x00400000 /* don't add any offset to address */
254#define ACTION_HALFOFF 0x00500000 /* add to address half of page */ 254#define ACTION_HALFOFF 0x00500000 /* add to address half of page */
@@ -263,18 +263,18 @@ MODULE_PARM_DESC(bbt, "0 OOB, 1 BBT with marker in OOB, 2 BBT with marker in d
263#define OPT_PAGE512 0x00000002 /* 512-byte page chips */ 263#define OPT_PAGE512 0x00000002 /* 512-byte page chips */
264#define OPT_PAGE2048 0x00000008 /* 2048-byte page chips */ 264#define OPT_PAGE2048 0x00000008 /* 2048-byte page chips */
265#define OPT_SMARTMEDIA 0x00000010 /* SmartMedia technology chips */ 265#define OPT_SMARTMEDIA 0x00000010 /* SmartMedia technology chips */
266#define OPT_AUTOINCR 0x00000020 /* page number auto inctimentation is possible */ 266#define OPT_AUTOINCR 0x00000020 /* page number auto incrementation is possible */
267#define OPT_PAGE512_8BIT 0x00000040 /* 512-byte page chips with 8-bit bus width */ 267#define OPT_PAGE512_8BIT 0x00000040 /* 512-byte page chips with 8-bit bus width */
268#define OPT_PAGE4096 0x00000080 /* 4096-byte page chips */ 268#define OPT_PAGE4096 0x00000080 /* 4096-byte page chips */
269#define OPT_LARGEPAGE (OPT_PAGE2048 | OPT_PAGE4096) /* 2048 & 4096-byte page chips */ 269#define OPT_LARGEPAGE (OPT_PAGE2048 | OPT_PAGE4096) /* 2048 & 4096-byte page chips */
270#define OPT_SMALLPAGE (OPT_PAGE256 | OPT_PAGE512) /* 256 and 512-byte page chips */ 270#define OPT_SMALLPAGE (OPT_PAGE256 | OPT_PAGE512) /* 256 and 512-byte page chips */
271 271
272/* Remove action bits ftom state */ 272/* Remove action bits from state */
273#define NS_STATE(x) ((x) & ~ACTION_MASK) 273#define NS_STATE(x) ((x) & ~ACTION_MASK)
274 274
275/* 275/*
276 * Maximum previous states which need to be saved. Currently saving is 276 * Maximum previous states which need to be saved. Currently saving is
277 * only needed for page programm operation with preceeded read command 277 * only needed for page program operation with preceded read command
278 * (which is only valid for 512-byte pages). 278 * (which is only valid for 512-byte pages).
279 */ 279 */
280#define NS_MAX_PREVSTATES 1 280#define NS_MAX_PREVSTATES 1
@@ -380,16 +380,16 @@ static struct nandsim_operations {
380 /* Read OOB */ 380 /* Read OOB */
381 {OPT_SMALLPAGE, {STATE_CMD_READOOB | ACTION_OOBOFF, STATE_ADDR_PAGE | ACTION_CPY, 381 {OPT_SMALLPAGE, {STATE_CMD_READOOB | ACTION_OOBOFF, STATE_ADDR_PAGE | ACTION_CPY,
382 STATE_DATAOUT, STATE_READY}}, 382 STATE_DATAOUT, STATE_READY}},
383 /* Programm page starting from the beginning */ 383 /* Program page starting from the beginning */
384 {OPT_ANY, {STATE_CMD_SEQIN, STATE_ADDR_PAGE, STATE_DATAIN, 384 {OPT_ANY, {STATE_CMD_SEQIN, STATE_ADDR_PAGE, STATE_DATAIN,
385 STATE_CMD_PAGEPROG | ACTION_PRGPAGE, STATE_READY}}, 385 STATE_CMD_PAGEPROG | ACTION_PRGPAGE, STATE_READY}},
386 /* Programm page starting from the beginning */ 386 /* Program page starting from the beginning */
387 {OPT_SMALLPAGE, {STATE_CMD_READ0, STATE_CMD_SEQIN | ACTION_ZEROOFF, STATE_ADDR_PAGE, 387 {OPT_SMALLPAGE, {STATE_CMD_READ0, STATE_CMD_SEQIN | ACTION_ZEROOFF, STATE_ADDR_PAGE,
388 STATE_DATAIN, STATE_CMD_PAGEPROG | ACTION_PRGPAGE, STATE_READY}}, 388 STATE_DATAIN, STATE_CMD_PAGEPROG | ACTION_PRGPAGE, STATE_READY}},
389 /* Programm page starting from the second half */ 389 /* Program page starting from the second half */
390 {OPT_PAGE512, {STATE_CMD_READ1, STATE_CMD_SEQIN | ACTION_HALFOFF, STATE_ADDR_PAGE, 390 {OPT_PAGE512, {STATE_CMD_READ1, STATE_CMD_SEQIN | ACTION_HALFOFF, STATE_ADDR_PAGE,
391 STATE_DATAIN, STATE_CMD_PAGEPROG | ACTION_PRGPAGE, STATE_READY}}, 391 STATE_DATAIN, STATE_CMD_PAGEPROG | ACTION_PRGPAGE, STATE_READY}},
392 /* Programm OOB */ 392 /* Program OOB */
393 {OPT_SMALLPAGE, {STATE_CMD_READOOB, STATE_CMD_SEQIN | ACTION_OOBOFF, STATE_ADDR_PAGE, 393 {OPT_SMALLPAGE, {STATE_CMD_READOOB, STATE_CMD_SEQIN | ACTION_OOBOFF, STATE_ADDR_PAGE,
394 STATE_DATAIN, STATE_CMD_PAGEPROG | ACTION_PRGPAGE, STATE_READY}}, 394 STATE_DATAIN, STATE_CMD_PAGEPROG | ACTION_PRGPAGE, STATE_READY}},
395 /* Erase sector */ 395 /* Erase sector */
@@ -1171,9 +1171,9 @@ static inline void switch_to_ready_state(struct nandsim *ns, u_char status)
1171 * of supported operations. 1171 * of supported operations.
1172 * 1172 *
1173 * Operation can be unknown because of the following. 1173 * Operation can be unknown because of the following.
1174 * 1. New command was accepted and this is the firs call to find the 1174 * 1. New command was accepted and this is the first call to find the
1175 * correspondent states chain. In this case ns->npstates = 0; 1175 * correspondent states chain. In this case ns->npstates = 0;
1176 * 2. There is several operations which begin with the same command(s) 1176 * 2. There are several operations which begin with the same command(s)
1177 * (for example program from the second half and read from the 1177 * (for example program from the second half and read from the
1178 * second half operations both begin with the READ1 command). In this 1178 * second half operations both begin with the READ1 command). In this
1179 * case the ns->pstates[] array contains previous states. 1179 * case the ns->pstates[] array contains previous states.
@@ -1186,7 +1186,7 @@ static inline void switch_to_ready_state(struct nandsim *ns, u_char status)
1186 * ns->ops, ns->state, ns->nxstate are initialized, ns->npstate is 1186 * ns->ops, ns->state, ns->nxstate are initialized, ns->npstate is
1187 * zeroed). 1187 * zeroed).
1188 * 1188 *
1189 * If there are several maches, the current state is pushed to the 1189 * If there are several matches, the current state is pushed to the
1190 * ns->pstates. 1190 * ns->pstates.
1191 * 1191 *
1192 * The operation can be unknown only while commands are input to the chip. 1192 * The operation can be unknown only while commands are input to the chip.
@@ -1195,10 +1195,10 @@ static inline void switch_to_ready_state(struct nandsim *ns, u_char status)
1195 * operation is searched using the following pattern: 1195 * operation is searched using the following pattern:
1196 * ns->pstates[0], ... ns->pstates[ns->npstates], <address input> 1196 * ns->pstates[0], ... ns->pstates[ns->npstates], <address input>
1197 * 1197 *
1198 * It is supposed that this pattern must either match one operation on 1198 * It is supposed that this pattern must either match one operation or
1199 * none. There can't be ambiguity in that case. 1199 * none. There can't be ambiguity in that case.
1200 * 1200 *
1201 * If no matches found, the functions does the following: 1201 * If no matches found, the function does the following:
1202 * 1. if there are saved states present, try to ignore them and search 1202 * 1. if there are saved states present, try to ignore them and search
1203 * again only using the last command. If nothing was found, switch 1203 * again only using the last command. If nothing was found, switch
1204 * to the STATE_READY state. 1204 * to the STATE_READY state.
@@ -1668,7 +1668,7 @@ static int do_state_action(struct nandsim *ns, uint32_t action)
1668 1668
1669 case ACTION_PRGPAGE: 1669 case ACTION_PRGPAGE:
1670 /* 1670 /*
1671 * Programm page - move internal buffer data to the page. 1671 * Program page - move internal buffer data to the page.
1672 */ 1672 */
1673 1673
1674 if (ns->lines.wp) { 1674 if (ns->lines.wp) {
@@ -1933,7 +1933,7 @@ static u_char ns_nand_read_byte(struct mtd_info *mtd)
1933 NS_DBG("read_byte: all bytes were read\n"); 1933 NS_DBG("read_byte: all bytes were read\n");
1934 1934
1935 /* 1935 /*
1936 * The OPT_AUTOINCR allows to read next conseqitive pages without 1936 * The OPT_AUTOINCR allows to read next consecutive pages without
1937 * new read operation cycle. 1937 * new read operation cycle.
1938 */ 1938 */
1939 if ((ns->options & OPT_AUTOINCR) && NS_STATE(ns->state) == STATE_DATAOUT) { 1939 if ((ns->options & OPT_AUTOINCR) && NS_STATE(ns->state) == STATE_DATAOUT) {